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21. 发明申请

US20080122623A1 System and method for tracing data storage devices 审中-公开
标题翻译：跟踪数据存储设备的系统和方法
公开(公告)号：US20080122623A1
公开(公告)日：2008-05-29
申请号：US11726907
申请日：2007-03-23
申请人： Curtis B. Hause , Stephen J. Rothermel , Jody L. Gregg , G. Phillip Rambosek , Yung Yip , Robert C. Martin , Christopher Caprio , Karen E. Conroy , Sanjay Gupta , Kevin G. Battles , Denis J. Langlois
发明人： Curtis B. Hause , Stephen J. Rothermel , Jody L. Gregg , G. Phillip Rambosek , Yung Yip , Robert C. Martin , Christopher Caprio , Karen E. Conroy , Sanjay Gupta , Kevin G. Battles , Denis J. Langlois
IPC分类号： G08B13/14
CPC分类号： G06K17/00
摘要： An electronic data storage device tracing system includes at least one data storage device and a reader system. The data storage device includes a housing having an optical label and a device RFID tag coupled to the housing. In this regard, the optical label is printed with a VOLSER number and the device RFID tag includes a chip that electronically stores the VOLSER number. The reader system is configured to read the VOLSER number from the chip and trace the at least one data storage device entering/exiting the reader system.
摘要翻译：电子数据存储装置跟踪系统包括至少一个数据存储装置和读取器系统。数据存储设备包括具有光学标签的外壳和耦合到外壳的设备RFID标签。在这方面，光学标签用VOLSER编号印刷，并且设备RFID标签包括电子存储VOLSER编号的芯片。读取器系统被配置为从芯片读取VOLSER号码并跟踪进入/退出读取器系统的至少一个数据存储设备。

22. 发明授权

US07289990B2 Method and apparatus for reducing index sizes and increasing performance of non-relational databases 失效
标题翻译：减少非关系数据库的索引大小和提高性能的方法和设备
公开(公告)号：US07289990B2
公开(公告)日：2007-10-30
申请号：US10606496
申请日：2003-06-26
申请人： Sanjay Gupta
发明人： Sanjay Gupta
IPC分类号： G06F17/30
CPC分类号： G06F17/30589 , Y10S707/99937 , Y10S707/99953
摘要： A method for increasing performance of non-relational databases with reduction in view index sizes is provided. One or more user views are provided in addition to the master view having all hierarchical/categorized data. User views are created having a subset of this hierarchical/categorized data that significantly reduces index size and improves performance. The indexes of the user view are associated with the indexes of the master view. This method improves view caching by dividing view cache into partitions based on the types of view, each with different priorities and management techniques. The master view may have a higher priority and may be used by servers while the user view may have lower priorities and may be used by users and client applications. In this way, legacy non-relational databases may continue to be suitably maintained with acceptable performance and avoiding potential cost and risk of migrating to a relational database.
摘要翻译：提供了一种提高非关系数据库性能的方法，减少视图索引大小。除了具有所有层次/分类数据的主视图之外，还提供一个或多个用户视图。创建具有该分层/分类数据的子集的用户视图，显着减少索引大小并提高性能。用户视图的索引与主视图的索引相关联。该方法通过将视图缓存分为基于视图的类型（每个具有不同的优先级和管理技术）而将视图缓存分割成分区，从而改进视图缓存。主视图可能具有较高的优先级，并且可能被服务器使用，而用户视图可能具有较低的优先级，并且可被用户和客户端应用使用。以这种方式，传统的非关系数据库可能会继续适当地保持具有可接受的性能，并避免迁移到关系数据库的潜在成本和风险。

23. 发明申请

US20070233765A1 System and Method for Test Generation for System Level Verification Using Parallel Algorithms 失效
标题翻译：使用并行算法进行系统级验证的测试生成系统和方法
公开(公告)号：US20070233765A1
公开(公告)日：2007-10-04
申请号：US11758357
申请日：2007-06-05
申请人： Sanjay Gupta , Steven Roberts , Christopher Spandikow
发明人： Sanjay Gupta , Steven Roberts , Christopher Spandikow
IPC分类号： G06F17/11
CPC分类号： G06F11/263
摘要： A system and method for test generation for system level verification using parallel algorithms are provided. The present invention generates test patterns for system level tests by exploiting the scalability of parallel algorithms while allowing for data set coloring and expected result checking. Based on the characteristics of the system being tested an iterative parallel algorithm is selected from a plurality of possible parallel algorithms. The selected parallel algorithm is then separated into separate program statements for execution by a plurality of processors. A serial version of the selected algorithm is executed to generate a set of expected results. The devised parallel version of the selected algorithm is then run to generate a set of test result data which is compared to the set of expected results. If the two sets of data match, it is determined that the system is operating correctly.
摘要翻译：提供了一种使用并行算法进行系统级验证的测试生成系统和方法。本发明通过利用并行算法的可扩展性同时允许数据集着色和预期结果检查来生成用于系统级测试的测试模式。基于被测系统的特征，从多个可能的并行算法中选择迭代并行算法。然后将所选择的并行算法分离成单独的程序语句以供多个处理器执行。执行所选算法的串行版本以产生一组预期结果。然后运行所选算法的设计的并行版本以生成与一组预期结果进行比较的一组测试结果数据。如果两组数据匹配，则确定系统正常运行。

24. 发明授权

US07260117B2 Synchronizing initial handshake in ADSL annex C to TTR 有权
标题翻译：将ADSL附件C中的初始握手同步到TTR
公开(公告)号：US07260117B2
公开(公告)日：2007-08-21
申请号：US10187388
申请日：2002-06-28
申请人： Guozhu Long , Les Brown , Sanjay Gupta
发明人： Guozhu Long , Les Brown , Sanjay Gupta
IPC分类号： H04J3/06
CPC分类号： H04L7/10 , H04L5/1438 , H04L5/1446 , H04L5/16 , H04L27/2601
摘要： Techniques for establishing TTR indication in ADSL Annex C based communication systems are disclosed. The techniques enable, for example, hyperframe alignment and synchronized initialization procedures (e.g., G.hs).
摘要翻译：公开了在ADSL附件C通信系统中建立TTR指示的技术。该技术例如能够实现超帧对准和同步初始化过程（例如，G.hs）。

25. 发明授权

US07257802B2 Method and system for hardware accelerated verification of digital circuit design and its testbench 有权
标题翻译：数字电路设计硬件加速验证方法与系统及其测试台
公开(公告)号：US07257802B2
公开(公告)日：2007-08-14
申请号：US10972361
申请日：2004-10-26
申请人： Jyotirmoy Daw , Sanjay Gupta , Suresh Krishnamurthy
发明人： Jyotirmoy Daw , Sanjay Gupta , Suresh Krishnamurthy
IPC分类号： G06F17/50
CPC分类号： G06F17/5027 , G01R31/318314
摘要： A system and method is presented for synthesizing both a design under test (DUT) and its test environment (i.e., the testbench for the DUT), into an equivalent structural model suitable for execution on a reconfigurable hardware platform. This may be achieved without any change in the existing verification methodology. Behavioral HDL may be translated into a form that can be executed on a reconfigurable hardware platform. A set of compilation transforms are provided that convert behavioral constructs into RTL constructs that can be directly mapped onto an emulator. Such transforms are provided by introducing the concepts of a behavioral clock and a time advance finite state machine (FSM) that determines simulation time and sequences concurrent computing blocks in the DUT and the testbench.
摘要翻译：提出了一种系统和方法，用于将待测设计（DUT）及其测试环境（即DUT的测试台）合并成适用于可重配置硬件平台上执行的等效结构模型。这可以在现有的验证方法没有任何改变的情况下实现。行为HDL可以被转换成可以在可重新配置的硬件平台上执行的形式。提供了一组编译变换，将行为结构转换为可直接映射到仿真器的RTL结构。通过引入行为时钟和时间推进有限状态机（FSM）的概念来提供这种变换，该时间预测有限状态机（FSM）确定DUT和测试平台中的模拟时间和序列并发计算块。

26. 发明申请

US20060019915A1 Method to modulate the immune system with a novel guanine nucleotide exchange factor 审中-公开
标题翻译：用新型鸟嘌呤核苷酸交换因子调节免疫系统的方法
公开(公告)号：US20060019915A1
公开(公告)日：2006-01-26
申请号：US11066012
申请日：2005-02-24
申请人： Jessica Fanzo , So Jang , Sanjay Gupta , Ayesha Siddiq , Steven Greenburg , Alessandra Pernis
发明人： Jessica Fanzo , So Jang , Sanjay Gupta , Ayesha Siddiq , Steven Greenburg , Alessandra Pernis
IPC分类号： A61K48/00 , A61K38/54
CPC分类号： A61K38/1709 , G01N33/505 , G01N33/573 , G01N2333/91205 , G01N2500/02
摘要： The present invention provides a method of modulating T cell receptor (“TCR”) dependant regulation of a signaling factor in a T cell, and a method of modulating the proliferation and/or differentiation of a T cell, which includes administering to the T cell an IBP modulator in an amount effective to modulate the function of IBP. The present invention further provides a method and a kit for identifying a modulator of IBP-Lck interaction, a modulator of IBP-PI(3,4,5)P3 interaction, a modulator of a signaling factor in a T cell. Also provided are compositions containing an IBP modulator.
摘要翻译：本发明提供调节T细胞中信号因子的T细胞受体（“TCR”）依赖性调节的方法，以及调节T细胞增殖和/或分化的方法，其包括向T细胞施用一种有效调节IBP功能的量的IBP调节剂。本发明还提供了用于鉴定IBP-Lck相互作用的调节剂的方法和试剂盒，IBP-PI（3,4,5）P 3相互作用的调节剂，信号因子的调节剂在T细胞中。还提供了含有IBP调节剂的组合物。

27. 发明授权

US06609222B1 Methods and circuitry for built-in self-testing of content addressable memories 有权
标题翻译：用于内容可寻址存储器的内置自检的方法和电路
公开(公告)号：US06609222B1
公开(公告)日：2003-08-19
申请号：US09654197
申请日：2000-09-01
申请人： Sanjay Gupta , G. F. Randall Gibson
发明人： Sanjay Gupta , G. F. Randall Gibson
IPC分类号： G01R3128
CPC分类号： G06F7/74 , G11C15/00 , G11C15/04 , G11C29/14 , G11C29/26 , G11C29/816 , G11C2029/2602
摘要： Methods for built-in self-test (BIST) testing and circuitry for testing a content addressable memory (CAM) core are provided. In one example, the BIST circuit includes a search port for enabling searches of the CAM core and a maintenance port for enabling addressing of locations of the CAM core. The maintenance port includes writing logic for writing to locations of the CAM core. The BIST circuit also includes a BIST controller for coordinating BIST testing of the CAM core. The BIST controller is capable of performing a BIST search on the CAM core on every cycle through the search port and performing a BIST write at selected times to the CAM core. Thus, the BIST write is capable of being performed in a same cycle as the BIST search permitting at-speed BIST. The BIST controller, performs BIST testing in a manner that limits the number of rows in the CAM that match at any given cycle, thus allowing a low-power BIST operation. The BIST controller can also be configured to coordinate simultaneous BIST testing of two or more CAM cores.
摘要翻译：提供了内置自检（BIST）测试方法和用于测试内容可寻址存储器（CAM）内核的电路。在一个示例中，BIST电路包括用于使得能够搜索CAM核心的搜索端口和用于实现对CAM核心位置的寻址的维护端口。维护端口包括用于写入CAM核心位置的写入逻辑。 BIST电路还包括用于协调CAM核心的BIST测试的BIST控制器。 BIST控制器能够通过搜索端口在每个周期上对CAM内核执行BIST搜索，并在选定的时间对CAM内核执行BIST写入。因此，BIST写入能够在与允许高速BIST的BIST搜索相同的周期中执行。 BIST控制器以限制在任何给定周期匹配的CAM数量的方式执行BIST测试，从而允许低功率BIST操作。 BIST控制器还可以配置为协调两个或多个CAM内核的同步BIST测试。

28. 发明授权

US06450832B1 Network connector for reduced EMI effects 失效
标题翻译：网络连接器，用于降低EMI效应
公开(公告)号：US06450832B1
公开(公告)日：2002-09-17
申请号：US09211372
申请日：1998-12-14
申请人： Maximino Aguilar , Sanjay Gupta
发明人： Maximino Aguilar , Sanjay Gupta
IPC分类号： H01R300
CPC分类号： H01R43/01 , H01R4/2425
摘要： A connector for use in a network interface including a connector housing, preferably formed of a conductive material such as aluminum. The housing includes a receptacle face that defines a receptacle opening. A receptacle of the connector is attached to an interior surface of the housing and suitable for receiving a terminus of the network cable through the receptacle opening. The connector has a connector circuit including a cable port coupled to the network cable and an interface port coupled to the network interface. The housing defines at least one conduit adapted for receiving a light pipe. Preferably, the network interface provides an Ethernet connection. In one embodiment, the connector circuit includes magnetic components. In the preferred embodiment, the connector comprises an RJ45 connector. The invention further contemplates a network interface integrated within a motherboard, a connector affixed to the mother, an LED attached to the motherboard, and a light pipe. The LED indicates status of the network interface. The light pipe is received within a light pipe conduit of an RJ45 or similar connector such that a first end of the light pipe terminates at a light pipe opening in the receptacle face of the housing and a second end of the light pipe terminates proximal to the LED.
摘要翻译：一种用于网络接口的连接器，包括连接器壳体，优选地由诸如铝的导电材料形成。壳体包括限定容器开口的容器面。连接器的插座附接到壳体的内表面，并且适于通过插座开口接收网络电缆的终端。连接器具有连接器电路，该连接器电路包括耦合到网络电缆的电缆端口和耦合到网络接口的接口端口。壳体限定适于接收光管的至少一个导管。优选地，网络接口提供以太网连接。在一个实施例中，连接器电路包括磁性部件。在优选实施例中，连接器包括RJ45连接器。本发明进一步考虑了集成在母板内的网络接口，固定在母体上的连接器，连接到母板的LED以及光管。 LED指示灯表示网络接口的状态。光管被接收在RJ45或类似连接器的光管道内，使得光管的第一端终止在壳体的容器面中的光管开口处，并且光管的第二端终止于 LED。

29. 发明授权

US06446138B1 Remote operator interface for a network computer 失效
标题翻译：网络计算机的远程操作员界面
公开(公告)号：US06446138B1
公开(公告)日：2002-09-03
申请号：US09177873
申请日：1998-10-23
申请人： Michael Edward Criscolo , Sanjay Gupta , Brian Michael Kerrigan , Stephen Sung , Howard Carl Tanner
发明人： Michael Edward Criscolo , Sanjay Gupta , Brian Michael Kerrigan , Stephen Sung , Howard Carl Tanner
IPC分类号： G06F300
CPC分类号： G06F3/0202 , G06F3/0227
摘要： A remote operator interface for a network computer is provided by a pocket-sized structural enclosure which remotely mounts input and output interface devices. The input and output devices providing a remote interface to control a network computer. The pocket-sized structural enclosure provides a means for electrically coupling the input and output interface devices to the network computer. The cable or data transmission medium which electronically couples the remote operator interface to the network computer provides a communication transmission medium for the network computer system. The pocket-sized structural enclosure can be mounted to a keyboard in close proximity to the operator of a network computer.
摘要翻译：用于网络计算机的远程操作员接口由口袋大小的结构外壳提供，远程安装输入和输出接口设备。输入和输出设备提供远程接口来控制网络计算机。袖珍型结构外壳提供了一种用于将输入和输出接口设备电耦合到网络计算机的装置。将远程操作员接口电子耦合到网络计算机的电缆或数据传输介质为网络计算机系统提供通信传输介质。袖珍尺寸的结构外壳可以安装在靠近网络计算机的操作者的键盘上。

30. 发明授权

US06221258B1 Method and apparatus for acoustically driven media filtration 失效
标题翻译：用于声驱动介质过滤的方法和装置
公开(公告)号：US06221258B1
公开(公告)日：2001-04-24
申请号：US08861277
申请日：1997-05-21
申请人： Donald L. Feke , Sanjay Gupta , Zenon Mandralis
发明人： Donald L. Feke , Sanjay Gupta , Zenon Mandralis
IPC分类号： B01D3700
CPC分类号： B01D21/283 , B01D21/0012 , B01D24/16 , B01D24/305 , B01D24/4631 , B01D24/4853
摘要： A method and apparatus for acoustically enhanced particle separation uses a chamber through which flows a fluid containing particles to be separated. A porous medium is disposed within the chamber. A transducer mounted on one wall of the chamber is powered to impose on the porous medium an acoustic field that is resonant to the chamber when filled with the fluid. Under the influence of the resonant acoustic field, the porous medium is able to trap particles substantially smaller than the average pore size of the medium. When the acoustic field is deactivated, the flowing fluid flushes the trapped particles from the porous medium and regenerates the medium. A collection circuit for harvesting the particles flushed from the porous medium is disclosed. Aluminum mesh, polyester foam, and unconsolidated glass beads are disclosed as porous media.
摘要翻译：用于声学增强的颗粒分离的方法和装置使用一个室，通过该室流动含有颗粒的流体被分离。多孔介质设置在室内。安装在室的一个壁上的传感器被供电以在多孔介质上施加当填充有流体时与腔共振的声场。在共振声场的影响下，多孔介质能够捕获明显小于介质平均孔径的颗粒。当声场失效时，流动的流体从多孔介质中冲洗捕获的颗粒并再生介质。公开了一种用于收集从多孔介质冲洗的颗粒的收集电路。公开了铝网，聚酯泡沫和未固结的玻璃珠作为多孔介质。

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