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21. 发明申请

US20090108256A1 THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20090108256A1
公开(公告)日：2009-04-30
申请号：US12186659
申请日：2008-08-06
申请人： Sang-Ki Kwak , Hyang-Shik Kong , Sun-Il Kim
发明人： Sang-Ki Kwak , Hyang-Shik Kong , Sun-Il Kim
IPC分类号： H01L27/088 , H01L29/12 , H01L21/70
CPC分类号： H01L27/1288 , H01L27/1225 , H01L27/124 , H01L29/7869
摘要： A thin-film transistor (TFT) substrate includes a semiconductor pattern, a conductive pattern, a first wiring pattern, an insulation pattern and a second wiring pattern. The semiconductor pattern is formed on a substrate. The conductive pattern is formed as a layer identical to the semiconductor pattern on the substrate. The first wiring pattern is formed on the semiconductor pattern. The first wiring pattern includes a source electrode and a drain electrode spaced apart from the source electrode. The insulation pattern is formed on the substrate having the first wiring pattern to cover the first wiring pattern. The second wiring pattern is formed on the insulation pattern. The second wiring pattern includes a gate electrode formed on the source and drain electrodes. Therefore, a TFT substrate is manufactured using two or three masks, so that manufacturing costs may be decreased.
摘要翻译：薄膜晶体管（TFT）衬底包括半导体图案，导电图案，第一布线图案，绝缘图案和第二布线图案。半导体图案形成在基板上。导电图案形成为与衬底上的半导体图案相同的层。第一布线图案形成在半导体图案上。第一布线图案包括与源电极间隔开的源电极和漏电极。在具有第一布线图案的基板上形成绝缘图案以覆盖第一布线图案。第二布线图案形成在绝缘图案上。第二布线图案包括形成在源极和漏极上的栅电极。因此，使用两个或三个掩模制造TFT基板，从而可以降低制造成本。

22. 发明授权

US08947623B2 Liquid crystal display and manufacturing method thereof 有权
公开(公告)号：US08947623B2
公开(公告)日：2015-02-03
申请号：US13410894
申请日：2012-03-02
申请人： Hyang-Shik Kong , Sung Hoon Yang , Se Hwan Yu , Yong Hwan Shin , Su Mi Lee , Shin Il Choi
发明人： Hyang-Shik Kong , Sung Hoon Yang , Se Hwan Yu , Yong Hwan Shin , Su Mi Lee , Shin Il Choi
IPC分类号： G02F1/1337 , G02F1/13 , G02F1/1335 , G02F1/1343
CPC分类号： G02F1/13439 , G02F1/133528 , G02F2001/133548 , G02F2001/133565
摘要： A manufacturing method of a liquid crystal display includes: forming an etch target layer including a conductive material on a first substrate; forming a first mask layer on the etch target layer; forming a block copolymer coating layer including a plurality of polymers on the first mask layer; processing the block copolymer coating layer to form a block copolymer pattern layer including first and second polymer blocks; removing one of the first or second polymer blocks to form a second mask pattern layer; etching the first mask layer by using the second mask pattern layer as an etching mask to form a first mask pattern layer; and etching the etch target layer by using the first mask pattern layer as an etching mask to form a first electrode. The first electrode includes a plurality of the first minute patterns extending in a predetermined direction and having a polarization function.

23. 发明申请

US20110025968A1 THIN FILM TRANSISTOR SUBSTRATE 有权
标题翻译：薄膜晶体管基板
公开(公告)号：US20110025968A1
公开(公告)日：2011-02-03
申请号：US12816591
申请日：2010-06-16
申请人： Se-Hwan YU , Hyang-Shik Kong , Su-Hyoung Kang
发明人： Se-Hwan YU , Hyang-Shik Kong , Su-Hyoung Kang
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G02F2001/13629
摘要： A thin film transistor array panel including a display area having a gate line, a data line insulated from and intersecting the gate line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor, and a peripheral area formed on the circumference of the display area, according to an exemplary embodiment of the present invention, includes: a driving signal line formed with the same layer as the gate line in the peripheral area and receiving an external signal; a connection signal line formed with the same layer as the data line in the peripheral area; a disconnection prevention member overlapping the side surface of the connection signal line on the connection signal line; and a connection assistance member formed on the disconnection prevention member and connecting the driving signal line and the connection signal line.
摘要翻译：一种薄膜晶体管阵列面板，包括具有栅极线的显示区域，与栅极线绝缘并与之相交的数据线，连接到栅极线和数据线的薄膜晶体管，以及连接到薄膜晶体管的像素电极以及形成在显示区域的圆周上的周边区域，根据本发明的示例性实施例，包括：形成与周边区域中的栅极线相同层并且接收外部信号的驱动信号线; 连接信号线，其与周边区域中的数据线形成相同的层; 断开防止部件与连接信号线上的连接信号线的侧面重叠; 以及连接辅助构件，其形成在所述防止断开构件上并且连接所述驱动信号线和所述连接信号线。

24. 发明申请

US20090191654A1 METHOD OF MANUFACTURING COLOR FILTER SUBSTRATE AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE 有权
标题翻译：制造彩色滤光片基板的方法及制造薄膜晶体管基板的方法
公开(公告)号：US20090191654A1
公开(公告)日：2009-07-30
申请号：US12357789
申请日：2009-01-22
申请人： Se-Hwan Yu , Byoung-Joo Kim , Hyang-Shik Kong , Kweon-Sam Hong , Yoon-Ho Kang , Young-Joo Choi
发明人： Se-Hwan Yu , Byoung-Joo Kim , Hyang-Shik Kong , Kweon-Sam Hong , Yoon-Ho Kang , Young-Joo Choi
IPC分类号： H01L21/302 , B29D11/00 , B05D5/06
CPC分类号： H01L27/124 , B29D11/00634 , G02F1/133516 , H01L21/31111 , H01L27/1262 , H01L33/42 , H01L33/58
摘要： A method of manufacturing a color filter substrate includes forming a plurality of trenches having a predetermined depth by etching a surface of a transparent substrate, disposing a color filter material in the plurality of trenches to form a color filter layer, and forming a transparent electrode on the transparent substrate including the color filter layer therein.
摘要翻译：制造滤色器基板的方法包括通过蚀刻透明基板的表面来形成具有预定深度的多个沟槽，在多个沟槽中设置滤色器材料以形成滤色器层，并且形成透明电极所述透明基板包括其中的滤色器层。

25. 发明授权

US08841144B2 Method of manufacturing color filter substrate wherein a transparent substrate is etched to form a plurality of trenches to receive color filter material 有权
标题翻译：制造滤色器基板的方法，其中对透明基板进行蚀刻以形成多个沟槽以接收滤色器材料
公开(公告)号：US08841144B2
公开(公告)日：2014-09-23
申请号：US12357789
申请日：2009-01-22
申请人： Se-Hwan Yu , Byoung-Joo Kim , Hyang-Shik Kong , Kweon-Sam Hong , Yoon-Ho Kang , Young-Joo Choi
发明人： Se-Hwan Yu , Byoung-Joo Kim , Hyang-Shik Kong , Kweon-Sam Hong , Yoon-Ho Kang , Young-Joo Choi
IPC分类号： H01L21/00
CPC分类号： H01L27/124 , B29D11/00634 , G02F1/133516 , H01L21/31111 , H01L27/1262 , H01L33/42 , H01L33/58
摘要： A method of manufacturing a color filter substrate includes forming a plurality of trenches having a predetermined depth by etching a surface of a transparent substrate, disposing a color filter material in the plurality of trenches to form a color filter layer, and forming a transparent electrode on the transparent substrate including the color filter layer therein.
摘要翻译：制造滤色器基板的方法包括通过蚀刻透明基板的表面来形成具有预定深度的多个沟槽，在多个沟槽中设置滤色器材料以形成滤色器层，并且形成透明电极所述透明基板包括其中的滤色器层。

26. 发明授权

US08427623B2 Thin film transistor substrate including disconnection prevention member 有权
标题翻译：薄膜晶体管基板，包括防断断部件
公开(公告)号：US08427623B2
公开(公告)日：2013-04-23
申请号：US12816591
申请日：2010-06-16
申请人： Se-Hwan Yu , Hyang-Shik Kong , Su-Hyoung Kang
发明人： Se-Hwan Yu , Hyang-Shik Kong , Su-Hyoung Kang
IPC分类号： G02F1/1333 , G02F1/1343 , G02F1/1345
CPC分类号： G02F1/136286 , G02F2001/13629
摘要： A thin film transistor array panel including a display area having a gate line, a data line insulated from and intersecting the gate line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor, and a peripheral area formed on the circumference of the display area, according to an exemplary embodiment of the present invention, includes: a driving signal line formed with the same layer as the gate line in the peripheral area and receiving an external signal; a connection signal line formed with the same layer as the data line in the peripheral area; a disconnection prevention member overlapping the side surface of the connection signal line on the connection signal line; and a connection assistance member formed on the disconnection prevention member and connecting the driving signal line and the connection signal line.
摘要翻译：一种薄膜晶体管阵列面板，包括具有栅极线的显示区域，与栅极线绝缘并与之相交的数据线，连接到栅极线和数据线的薄膜晶体管，以及连接到薄膜晶体管的像素电极以及形成在显示区域的圆周上的周边区域，根据本发明的示例性实施例，包括：形成与周边区域中的栅极线相同层并且接收外部信号的驱动信号线; 连接信号线，其与周边区域中的数据线形成相同的层; 断开防止部件与连接信号线上的连接信号线的侧面重叠; 以及连接辅助构件，其形成在所述防止断开构件上并且连接所述驱动信号线和所述连接信号线。

27. 发明授权

US07679596B2 Display device with reduced interference between pixels 有权
标题翻译：具有减少像素间干扰的显示设备
公开(公告)号：US07679596B2
公开(公告)日：2010-03-16
申请号：US11193975
申请日：2005-07-29
申请人： Sung-Man Kim , Jong-Hwan Lee , Seong-Young Lee , Myung-Koo Hur , Seung-Hwan Moon , Hyang-Shik Kong , Jang-Kun Song
发明人： Sung-Man Kim , Jong-Hwan Lee , Seong-Young Lee , Myung-Koo Hur , Seung-Hwan Moon , Hyang-Shik Kong , Jang-Kun Song
IPC分类号： G11C11/34
CPC分类号： G09G3/3648 , G09G3/3225 , G09G3/3266 , G09G2300/0426 , G09G2300/0465
摘要： A display device according to an exemplary embodiment of the present invention includes: a plurality of pixels including switching elements; a plurality of pairs of first and second gate lines connected to the switching elements and separated from each other, transmitting a gate-on voltage for turning on the switching elements; and a plurality of data lines connected to the switching elements, transmitting data signals, wherein each pair of first and second gate lines is disposed between two adjacent pixel rows and is connected to one of the pixel rows.
摘要翻译：根据本发明的示例性实施例的显示装置包括：包括开关元件的多个像素; 连接到开关元件并且彼此分离的多对第一和第二栅极线，传输用于接通开关元件的栅极导通电压; 以及连接到开关元件的多条数据线，发送数据信号，其中每对第一和第二栅极线设置在两个相邻的像素行之间并且连接到像素行之一。

28. 发明授权

US07655952B2 Thin films transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US07655952B2
公开(公告)日：2010-02-02
申请号：US11770012
申请日：2007-06-28
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L33/00
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge, placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并且具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

29. 发明授权

US07646444B2 Thin film transistor array panel for liquid crystal display having pixel electrode 有权
标题翻译：具有像素电极的液晶显示器的薄膜晶体管阵列面板
公开(公告)号：US07646444B2
公开(公告)日：2010-01-12
申请号：US11873767
申请日：2007-10-17
申请人： Dong-Gyu Kim , Hyang-Shik Kong , Jang-Soo Kim
发明人： Dong-Gyu Kim , Hyang-Shik Kong , Jang-Soo Kim
IPC分类号： G02F1/136 , G02F1/1343
CPC分类号： G02F1/136213 , G02F1/1337 , G02F1/133784 , G02F1/134336 , G02F1/136227 , G02F2201/123
摘要： A TFT array panel includes an insulating substrate, a gate line and a storage electrode line formed thereon. The gate line and the storage electrode line are covered with a gate insulating layer, and a semiconductor island is formed on the gate insulating layer. A pair of ohmic contacts are formed on the semiconductor island, and a data line and a drain electrode are formed thereon. The data line and the drain electrode are covered with a passivation layer having a contact hole exposing the drain electrode. A pixel electrode is formed on the passivation layer and connected to the drain electrode through the contact hole. The TFT array panel is covered with an alignment layer rubbed approximately in a direction from the upper left corner to the lower right corner of the TFT array panel or the pixel electrodes. The pixel electrode has approximately a rectangular shape and overlaps the gate line and the data line. The pixel electrode has an expansion located near the upper left corner of the pixel electrode to increase the width of the corresponding overlapping area between the pixel electrode and the gate line and/or the data line.
摘要翻译： TFT阵列面板包括绝缘基板，栅极线和形成在其上的存储电极线。栅极线和存储电极线被栅极绝缘层覆盖，并且在栅极绝缘层上形成半导体岛。在半导体岛上形成一对欧姆接触，在其上形成数据线和漏电极。数据线和漏电极被具有暴露漏电极的接触孔的钝化层覆盖。像素电极形成在钝化层上，并通过接触孔与漏电极连接。 TFT阵列面板被大致沿着从TFT阵列板的左上角到右下角或像素电极的方向摩擦的取向膜覆盖。像素电极具有大致矩形形状并且与栅极线和数据线重叠。像素电极具有位于像素电极的左上角附近的扩展部，以增加像素电极与栅极线和/或数据线之间的对应重叠区域的宽度。

30. 发明授权

US07575963B2 Method for manufacturing contact structures of wiring 有权
标题翻译：制造布线接触结构的方法
公开(公告)号：US07575963B2
公开(公告)日：2009-08-18
申请号：US11874769
申请日：2007-10-18
申请人： Hyang-Shik Kong , Myung-Koo Hur , Chi-Woo Kim
发明人： Hyang-Shik Kong , Myung-Koo Hur , Chi-Woo Kim
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： G02F1/13439 , G02F1/13458 , H01L21/76801 , H01L21/76838 , H01L23/53209 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L2924/0002 , H01L2924/00
摘要： First, a conductive material of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed by depositing nitride silicon in the range of more than 300° C. for 5 minutes, and a semiconductor layer an ohmic contact layer are sequentially formed. Next, a conductor layer of a metal such as Cr is deposited and patterned to form a data wire include a data line intersecting the gate line, a source electrode, a drain electrode and a data pad. Then, a passivation layer is deposited and patterned to form contact holes exposing the drain electrode, the gate pad and the data pad. Next, indium zinc oxide is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad respectively connected to the drain electrode, the gate pad and the data pad.
摘要翻译：首先，将铝基材料的导电材料沉积并图案化以形成包括栅极线，栅极焊盘和栅电极的栅极线。通过在大于300℃的范围内沉积氮化硅5分钟形成栅极绝缘层，并依次形成半导体层欧姆接触层。接下来，沉积并图案化诸如Cr的金属的导体层以形成数据线，其包括与栅极线相交的数据线，源电极，漏电极和数据焊盘。然后，沉积并图案化钝化层以形成暴露漏电极，栅极焊盘和数据焊盘的接触孔。接下来，沉积并图案化氧化铟锌以形成分别连接到漏电极，栅极焊盘和数据焊盘的像素电极，冗余栅极焊盘和冗余数据焊盘。

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