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21. 发明申请

US20120297618A1 PRINTED CIRCUIT BOARDS BY MASSIVE PARALLEL ASSEMBLY 审中-公开
标题翻译：印刷电路板通过大型平行线组装
公开(公告)号：US20120297618A1
公开(公告)日：2012-11-29
申请号：US13571252
申请日：2012-08-09
申请人： JengPing Lu , Eugene M. Chow
发明人： JengPing Lu , Eugene M. Chow
IPC分类号： H05K3/00
CPC分类号： H05K1/142 , H05K1/0286 , H05K1/14 , H05K3/368 , H05K2201/09963 , Y10T29/49124 , Y10T29/49126 , Y10T29/49155
摘要： A method of forming an interconnect substrate includes providing at least two unit cells, arranging the unit cells to form a desired circuit pattern, and joining the unit cells to form the interconnect substrate having the desired circuit pattern.
摘要翻译：形成互连衬底的方法包括提供至少两个单元电池，布置单元电池以形成期望的电路图案，以及连接单元电池以形成具有所需电路图案的互连衬底。

22. 发明授权

US08291823B2 Digital printing plate and system with electrostatically latched deformable membranes 有权
标题翻译：数字印版和带有静电锁定可变形膜的系统
公开(公告)号：US08291823B2
公开(公告)日：2012-10-23
申请号：US12957113
申请日：2010-11-30
申请人： Dirk De Bruyker , JengPing Lu , Jurgen H. Daniel , Eugene M. Chow , Armin R. Volkel
发明人： Dirk De Bruyker , JengPing Lu , Jurgen H. Daniel , Eugene M. Chow , Armin R. Volkel
IPC分类号： B41F3/36 , B41F9/00 , B41N1/00 , B41M1/00 , B41M1/10
CPC分类号： B41M1/10 , B41M1/04 , B41M1/06 , H05K3/207 , H05K2201/091 , H05K2203/105
摘要： A printing surface includes a substrate having latching electrodes on a first surface, a spacer layer on the first surface of the substrate, the spacer layer patterned to form wells such that the latching electrodes reside in the wells, a deformable membrane, the membrane having conductive regions, on the spacer layer to enclose the wells, each enclosed well and its associated region of the membrane forming a pixel membrane, and actuation circuitry to actuate the electrodes to cause selected ones of the pixel membranes to remain in a deflected state when the pixel membranes receive an impulse to return to an undeflected state.
摘要翻译：打印表面包括在第一表面上具有锁定电极的基板，在基板的第一表面上的间隔层，图案化的间隔层以形成孔，使得锁定电极驻留在孔中，可变形的膜，该膜具有导电区域，在间隔层上包围孔，每个封闭的井及其膜的相关区域形成像素膜，以及致动电路，用于致动电极，以使像素膜中选定的像素膜保持在偏转状态，当像素膜受到冲击以返回到未偏转的状态。

23. 发明授权

US07886662B2 Digital printing plate and system with electrostatically latched deformable membranes 有权
标题翻译：数字印版和带有静电锁定可变形膜的系统
公开(公告)号：US07886662B2
公开(公告)日：2011-02-15
申请号：US11613159
申请日：2006-12-19
申请人： Dirk De Bruyker , JengPing Lu , Jurgen H. Daniel , Eugene M. Chow , Armin R. Volkel
发明人： Dirk De Bruyker , JengPing Lu , Jurgen H. Daniel , Eugene M. Chow , Armin R. Volkel
IPC分类号： B41N1/00 , B41M1/10
CPC分类号： B41M1/10 , B41M1/04 , B41M1/06 , H05K3/207 , H05K2201/091 , H05K2203/105
摘要： A printing surface includes a substrate having latching electrodes on a first surface, a spacer layer on the first surface of the substrate, the spacer layer patterned to form wells such that the latching electrodes reside in the wells, a deformable membrane, the membrane having conductive regions, on the spacer layer to enclose the wells, each enclosed well and its associated region of the membrane forming a pixel membrane, and actuation circuitry to actuate the electrodes to cause selected ones of the pixel membranes to remain in a deflected state when the pixel membranes receive an impulse to return to an undeflected state.
摘要翻译：打印表面包括在第一表面上具有锁定电极的基板，在基板的第一表面上的间隔层，图案化的间隔层以形成孔，使得锁定电极驻留在孔中，可变形的膜，该膜具有导电区域，在间隔层上包围孔，每个封闭的井及其膜的相关区域形成像素膜，以及致动电路，用于致动电极，以使像素膜中选定的像素膜保持在偏转状态，当像素膜受到冲击以返回到未偏转的状态。

24. 发明申请

US20090160007A1 Systems and Methods for biasing high fill-factor sensor arrays and the like 有权
标题翻译：用于偏置高填充因子传感器阵列的系统和方法等
公开(公告)号：US20090160007A1
公开(公告)日：2009-06-25
申请号：US12392943
申请日：2009-02-25
申请人： JengPing Lu , James B. Boyce , Kathleen Dore Boyce
发明人： JengPing Lu , James B. Boyce , Kathleen Dore Boyce
IPC分类号： H01L31/105 , H01L27/144
CPC分类号： H01L27/1446 , H01L31/105
摘要： A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
摘要翻译：形成高填充因子光电传感器阵列，其包括P层，I层，与I层相邻并且各自耦合到N层的一个或多个半导体结构，形成在P的顶部上的导电电极以及与N层相邻并且与电压偏置源电连接的附加半导体结构。施加到附加半导体结构的偏置电压对附加的半导体结构进行充电，从而在N层和P层之间产生隧穿效应，其中电子离开N层并到达P层和导电层。电子然后在整个导电层中均匀迁移和均匀分布，这确保跨越整个光电传感器阵列的均匀偏压。本发明的偏置方案允许在不使用引线接合的情况下实现光电传感器的批量生产。

25. 发明申请

US20060255422A1 Systems and methods for biasing high fill-factor sensor arrays and the like 审中-公开
标题翻译：用于偏置高填充因子传感器阵列等的系统和方法
公开(公告)号：US20060255422A1
公开(公告)日：2006-11-16
申请号：US11491998
申请日：2006-07-25
申请人： JengPing Lu , James Boyce , Kathleen Boyce
发明人： JengPing Lu , James Boyce , Kathleen Boyce
IPC分类号： H01L31/00
CPC分类号： H01L27/1446 , H01L31/105
摘要： A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in the invention allows to achieve mass production of photosensors without the use of wire bonding.
摘要翻译：形成高填充因子光电传感器阵列，其包括P层，I层，与I层相邻并且各自耦合到N层的一个或多个半导体结构，形成在P的顶部上的导电电极以及与N层相邻并且与电压偏置源电连接的附加半导体结构。施加到附加半导体结构的偏置电压对附加的半导体结构进行充电，从而在N层和P层之间产生隧穿效应，其中电子离开N层并到达P层和导电层。电子然后在整个导电层中均匀迁移和均匀分布，这确保跨越整个光电传感器阵列的均匀偏压。本发明的偏置方案允许在不使用引线接合的情况下实现光电传感器的批量生产。

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