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21. 发明授权

US5860886A Hydraulic control device for automatic transmissions 失效
标题翻译：自动变速器液压控制装置
公开(公告)号：US5860886A
公开(公告)日：1999-01-19
申请号：US922797
申请日：1997-09-02
申请人： Tae Kyun Kim
发明人： Tae Kyun Kim
IPC分类号： F16H61/04 , F16H61/00 , F16H61/02 , B60K41/06
CPC分类号： F16H61/0206 , F16H2061/0481 , F16H2061/0485 , F16H2061/0488 , Y10T477/6895
摘要： A hydraulic control device for automatic transmissions is disclosed. The control device of this invention includes a valve means, of which the valve spool is selectively actuated by a drive pressure, the spring force of a valve spring or a control pressure from the PCV, with the control pressure being used in event of an R-N-D shifting operation. The hydraulic control device thus slowly releases the front clutch pressure during an N-D shifting operation and quickly releases the front clutch pressure during an R-N-D shifting operation, thus smoothly performing the R-N-D shifting operation without generating any shifting shock.
摘要翻译：公开了一种用于自动变速器的液压控制装置。本发明的控制装置包括阀装置，其中阀芯由驱动压力，阀弹簧的弹簧力或来自PCV的控制压力选择性地致动，其中在RND的情况下使用控制压力移动操作。因此，液压控制装置在N-D变速操作期间缓慢地释放前离合器压力，并且在R-N-D变速操作期间快速释放前离合器压力，从而平稳地进行R-N-D变速操作而不产生任何换档冲击。

22. 发明授权

US08500246B2 Inkjet print head and manufacturing method thereof 有权
标题翻译：喷墨打印头及其制造方法
公开(公告)号：US08500246B2
公开(公告)日：2013-08-06
申请号：US12254094
申请日：2008-10-20
申请人： Sung Joon Park , Jin Wook Lee , Chang Shin Park , Tae Kyun Kim
发明人： Sung Joon Park , Jin Wook Lee , Chang Shin Park , Tae Kyun Kim
IPC分类号： B41J2/135
CPC分类号： B41J2/1404 , B41J2/1603 , B41J2/1623 , B41J2/1631 , Y10T156/10
摘要： An inkjet print head including a substrate and a first film member stacked on the substrate to form an ink path, and a manufacturing method thereof. The first film member includes a path-defining layer made of a photosensitive material and formed with the ink path, and an adhesive layer made of a photosensitive material and used to stably bond the path-defining layer to the substrate. With this configuration, the path-defining layer and the adhesive layer can be simultaneously stacked on the substrate and also, can be patterned simultaneously.
摘要翻译：一种喷墨打印头及其制造方法，所述喷墨打印头包括基板和堆叠在所述基板上以形成油墨通路的第一膜构件。第一膜构件包括由感光材料制成并形成有油墨通路的路径限定层和由感光材料制成的粘合层，用于将路径限定层稳定地粘合到基底。利用这种构造，路径限定层和粘合剂层可以同时堆叠在基板上，并且也可以同时被图案化。

23. 发明授权

US07932554B2 Semiconductor device having a modified recess channel gate and a method for fabricating the same 有权
标题翻译：具有修改的凹槽通道栅极的半导体器件及其制造方法
公开(公告)号：US07932554B2
公开(公告)日：2011-04-26
申请号：US11768731
申请日：2007-06-26
申请人： Tae Kyun Kim
发明人： Tae Kyun Kim
IPC分类号： H01L29/66
CPC分类号： H01L29/4236 , H01L29/1037 , H01L29/66621
摘要： A semiconductor device having a modified recess channel gate includes active regions defined by a device isolation layer and arranged at regular intervals on a semiconductor substrate, each active region extending in a major axis and a minor axis direction, a trench formed in each active region, the trench including a stepped bottom surface in the minor axis direction of the active region, and a recess gate formed in the trench.
摘要翻译：具有修改的凹槽通道栅极的半导体器件包括由器件隔离层限定并且以规则间隔布置在半导体衬底上的有源区，每个有源区在长轴和短轴方向上延伸，在每个有源区中形成沟槽，所述沟槽包括在所述有源区的短轴方向上的阶梯状底面，以及形成在所述沟槽中的凹槽。

24. 发明授权

US07320919B2 Method for fabricating semiconductor device with metal-polycide gate and recessed channel 失效
标题翻译：用金属多晶硅栅极和凹槽形成半导体器件的方法
公开(公告)号：US07320919B2
公开(公告)日：2008-01-22
申请号：US11450789
申请日：2006-06-09
申请人： Tae Kyun Kim
发明人： Tae Kyun Kim
IPC分类号： H01L21/336
CPC分类号： H01L21/823437 , H01L21/823412 , H01L29/4236 , H01L29/42376 , H01L29/66621
摘要： A method for fabricating a semiconductor device with a metal-polycide gate and a recessed channel, including the steps of: forming trenches for a recessed channel in an active area of a semiconductor substrate; forming a gate insulating layer on the semiconductor substrate having the trenches; forming a gate conductive layer on the entire surface of the resulting structure so that the trenches are buried; forming a silicon-rich amorphous metal silicide layer and a gate hard mask on the gate conductive layer; etching the resulting structure until upper portions of the gate conductive layer are removed by a predetermined thickness, upon first patterning for gate stacks, and forming a metal layer on the entire surface of the resulting structure; forming lateral metal capping layers on sides of the silicon-rich amorphous metal silicide layer by blanket etching, completing formation of gate stacks; and thermally processing the silicon-rich amorphous metal silicide layer to form a crystallized metal silicide layer.
摘要翻译：一种制造具有金属多晶硅栅极和凹陷沟道的半导体器件的方法，包括以下步骤：在半导体衬底的有源区域中形成用于凹陷沟道的沟槽; 在具有沟槽的半导体衬底上形成栅极绝缘层; 在所得结构的整个表面上形成栅极导电层，使得沟槽被埋入; 在栅极导电层上形成富硅非晶金属硅化物层和栅极硬掩模; 蚀刻所得到的结构，直到栅极导电层的上部被去除预定厚度，首先对栅极堆叠进行图案化，并在所得结构的整个表面上形成金属层; 通过毯式蚀刻在富硅非晶金属硅化物层的侧面上形成侧面金属覆盖层，完成栅叠层的形成; 并且热处理富硅非晶金属硅化物层以形成结晶的金属硅化物层。

25. 发明授权

US07306993B2 Method for fabricating semiconductor device with recessed channel 失效
标题翻译：用于制造具有凹槽的半导体器件的方法
公开(公告)号：US07306993B2
公开(公告)日：2007-12-11
申请号：US11450764
申请日：2006-06-09
申请人： Tae Kyun Kim
发明人： Tae Kyun Kim
IPC分类号： H01L21/336
CPC分类号： H01L29/66621 , H01L21/28061 , H01L21/28114 , H01L29/42376
摘要： A method for fabricating a semiconductor device with a recessed channel, including the steps of: forming trenches for a recessed channel in an active area of a semiconductor substrate; forming a gate insulating layer on the semiconductor substrate having the trenches; forming a gate conductive layer on the entire surface of the resulting structure so that the trenches are buried; forming a silicon-rich amorphous metal silicide layer having seams on the gate conductive layer; filling the seams of the silicon-rich amorphous metal silicide layer with a metal thin film; forming a gate hard mask on the silicon-rich amorphous metal silicide layer and the metal thin film; patterning the gate insulating layer, the gate conductive layer, the silicon-rich amorphous metal silicide layer and the gate hard mask to form gate stacks; and thermally processing the silicon-rich amorphous metal silicide layer and the metal thin film to form a crystallized metal silicide layer.
摘要翻译：一种用于制造具有凹陷沟道的半导体器件的方法，包括以下步骤：在半导体衬底的有源区中形成用于凹陷沟道的沟槽; 在具有沟槽的半导体衬底上形成栅极绝缘层; 在所得结构的整个表面上形成栅极导电层，使得沟槽被埋置; 在所述栅极导电层上形成具有接缝的富硅非晶金属硅化物层; 用金属薄膜填充富硅非晶金属硅化物层的接缝; 在富硅非晶金属硅化物层和金属薄膜上形成栅极硬掩模; 图案化栅极绝缘层，栅极导电层，富硅非晶金属硅化物层和栅极硬掩模以形成栅极堆叠; 并且对富硅非晶金属硅化物层和金属薄膜进行热处理以形成结晶的金属硅化物层。

26. 发明申请

US20070040228A1 Semiconductor device utilizing a metal gate material such as tungsten and method of manufacturing the same 失效
标题翻译：利用诸如钨的金属栅极材料的半导体器件及其制造方法
公开(公告)号：US20070040228A1
公开(公告)日：2007-02-22
申请号：US11502072
申请日：2006-08-10
申请人： Tae Kyun Kim
发明人： Tae Kyun Kim
IPC分类号： H01L29/94
CPC分类号： H01L29/66621 , H01L21/28061 , H01L21/28114 , H01L21/28247 , H01L29/42376 , H01L29/4941 , H01L29/78
摘要： Known drawbacks associated with use of tungsten as a gate material in a semiconductor device are prevented. A gate oxide layer, a polysilicon layer, and a nitride layer are sequentially formed on a semiconductor substrate having a isolation layer for defining the active region. A recess is defined by etching the nitride layer. A metal nitride layer is formed in the recess in an U shape, and then a metal layer is formed to bury the recess. A hard mask layer is formed for defining a gate forming region on the nitride layer, the metal nitride layer, and the metal layer. A metal gate is formed by etching the nitride layer, the polysilicon layer, and the gate oxide layer using the hard mask layer as an etch barrier.
摘要翻译：防止了与在半导体器件中使用钨作为栅极材料相关的已知缺点。栅极氧化层，多晶硅层和氮化物层依次形成在具有用于限定有源区的隔离层的半导体衬底上。通过蚀刻氮化物层来限定凹陷。在凹部中形成U形金属氮化物层，然后形成金属层以埋设凹部。形成用于在氮化物层，金属氮化物层和金属层上限定栅极形成区域的硬掩模层。通过使用硬掩模层作为蚀刻阻挡层蚀刻氮化物层，多晶硅层和栅极氧化物层来形成金属栅极。

27. 发明申请

US20140348299A1 X-RAY IMAGING APPARATUS AND METHOD 审中-公开
标题翻译： X射线成像装置和方法
公开(公告)号：US20140348299A1
公开(公告)日：2014-11-27
申请号：US14006041
申请日：2012-10-30
申请人： Yong Hak Sung , Tae Kyun Kim
发明人： Yong Hak Sung , Tae Kyun Kim
IPC分类号： H05G1/44 , G01T1/29
CPC分类号： H05G1/44 , A61B6/4233 , A61B6/542 , G01T1/2914 , H04N5/23258 , H04N5/32
摘要： The present disclosure provides an X-ray imaging apparatus and method. When capturing an X-ray image using an automatic exposure request signal generated through detection of X-rays emitted from an X-ray generator, the X-ray imaging apparatus and method may verify validity of the automatic exposure request signal, thereby preventing unintentional generation of the automatic exposure request signal due to vibration, temperature change, noise, etc.
摘要翻译：本公开提供了一种X射线成像装置和方法。当使用通过从X射线发生器发射的X射线的检测而产生的自动曝光请求信号来拍摄X射线图像时，X射线成像装置和方法可以验证自动曝光请求信号的有效性，从而防止意外产生由于振动，温度变化，噪音等自动曝光请求信号

28. 发明授权

US08729617B2 Semiconductor memory device and method for manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08729617B2
公开(公告)日：2014-05-20
申请号：US13368054
申请日：2012-02-07
申请人： Tae Kyun Kim
发明人： Tae Kyun Kim
IPC分类号： H01L27/108
CPC分类号： H01L27/10876 , H01L27/10885 , H01L27/10891 , H01L29/41741 , H01L29/456 , H01L29/66666 , H01L29/7827
摘要： A semiconductor memory device includes: a lower pillar protruding from a substrate in a vertical direction and extending in a first direction by a trench formed in the first direction; an upper pillar protruding on the lower pillar in a second direction perpendicular to the first direction; a buried bit line junction region disposed on one sidewall of the lower pillar; a buried bit line contacting the buried bit line junction region and filling a portion of the trench; an etch stop film disposed on an exposed surface of the buried bit line; a first interlayer dielectric film recessed to expose a portion of an outer side of at least the upper pillar disposed on the etch stop film; a second interlayer dielectric film disposed on the first interlayer dielectric film; and a gate surrounding the exposed outer side of the upper pillar and crossing the buried bit line.
摘要翻译：半导体存储器件包括：从垂直方向从衬底突出并沿第一方向沿第一方向形成的沟槽延伸的下柱; 上柱在垂直于第一方向的第二方向上在下支柱上突出; 设置在下支柱的一个侧壁上的掩埋位线接合区域; 接触所述掩埋位线接合区域并填充所述沟槽的一部分的掩埋位线; 设置在所述掩埋位线的暴露表面上的蚀刻停止膜; 第一层间电介质膜，其凹入以暴露至少设置在所述蚀刻停止膜上的上柱的外侧的一部分; 设置在第一层间电介质膜上的第二层间绝缘膜; 以及围绕上部柱的暴露的外侧并与埋入位线交叉的门。

29. 发明授权

US08481390B2 Method for forming impurity region of vertical transistor and method for fabricating vertical transistor using the same 有权
标题翻译：用于形成垂直晶体管的杂质区域的方法及使用其制造垂直晶体管的方法
公开(公告)号：US08481390B2
公开(公告)日：2013-07-09
申请号：US13084220
申请日：2011-04-11
申请人： Yong Seok Eun , Tae Kyun Kim , Kyong Bong Rouh , Eun Shil Park
发明人： Yong Seok Eun , Tae Kyun Kim , Kyong Bong Rouh , Eun Shil Park
IPC分类号： H01L21/336
CPC分类号： H01L21/266 , H01L21/26513 , H01L21/26586 , H01L27/10876 , H01L29/66666 , H01L29/7827
摘要： A method for forming an impurity region of a vertical transistor includes forming an impurity ion junction region within a semiconductor substrate, and forming a trench by etching the semiconductor substrate in which the impurity ion junction region is formed. The etching process is performed to remove a portion of the impurity ion junction region, so that a remaining portion of the impurity ion junction region is exposed to a lower side wall of the trench to serve as a buried bit line junction region.
摘要翻译：用于形成垂直晶体管的杂质区域的方法包括在半导体衬底内形成杂质离子结区域，并通过蚀刻形成杂质离子结区域的半导体衬底形成沟槽。执行蚀刻处理以去除杂质离子结区域的一部分，使得杂质离子接合区域的剩余部分暴露于沟槽的下侧壁以用作掩埋位线结区域。

30. 发明授权

US08372698B2 Semiconductor device having a modified recess channel gate and a method for fabricating the same 失效
标题翻译：具有修改的凹槽通道栅极的半导体器件及其制造方法
公开(公告)号：US08372698B2
公开(公告)日：2013-02-12
申请号：US13046828
申请日：2011-03-14
申请人： Tae Kyun Kim
发明人： Tae Kyun Kim
IPC分类号： H01L21/20
CPC分类号： H01L29/4236 , H01L29/1037 , H01L29/66621
摘要： A semiconductor device having a modified recess channel gate includes active regions defined by a device isolation layer and arranged at regular intervals on a semiconductor substrate, each active region extending in a major axis and a minor axis direction, a trench formed in each active region, the trench including a stepped bottom surface in the minor axis direction of the active region, and a recess gate formed in the trench.
摘要翻译：具有修改的凹槽通道栅极的半导体器件包括由器件隔离层限定并且以规则间隔布置在半导体衬底上的有源区，每个有源区在长轴和短轴方向上延伸，在每个有源区中形成沟槽，所述沟槽包括在所述有源区的短轴方向上的阶梯状底面，以及形成在所述沟槽中的凹槽。

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