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    • 22. 发明申请
    • CLASS D AMPLIFIER CIRCUIT
    • D类放大器电路
    • US20160065158A1
    • 2016-03-03
    • US14836006
    • 2015-08-26
    • Cirrus Logic International Semiconductor Ltd.
    • John Paul LessoToru Ido
    • H03G3/30H03F3/217H03F1/34
    • H03G3/3089H03F1/26H03F1/32H03F1/34H03F3/187H03F3/217H03F3/2171H03F3/2173H03F3/2175H03F2200/102H03F2200/339H03F2200/432H03G7/002H03G7/007
    • This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).
    • 本申请涉及D类放大器电路(200)。 调制器(201)基于调制器输入信号(Dm)控制D类输出级(202),以产生代表输入信号(Din)的输出信号(Vout)。 可以包括ADC(207)的误差块(205)从输出信号和输入信号产生误差信号(&egr)。 在各种实施例中,基于输入信号(Din)的振幅的指示,可以对误差信号(&egr)贡献于调制器输入信号(Dm)的程度是可变的。 误差信号可以在信号选择器块(203)的第一输入(204)处被接收。 可以在信号选择器块(203)的第二输入(206)处接收输入信号。 信号选择器块可以在第一和第二操作模式下操作,其中在第一模式中,调制器输入信号至少部分地基于误差信号; 并且在第二模式中,调制器输入信号基于数字输入信号,并且与误差信号无关。 误差信号可以用于降低高信号电平的失真,但不会在低信号电平下使用,因此低信号电平的噪声基底不依赖于误差块的分量(205)。
    • 28. 发明授权
    • Class D amplifier circuit
    • US11121690B2
    • 2021-09-14
    • US16552843
    • 2019-08-27
    • Cirrus Logic International Semiconductor Ltd.
    • John Paul LessoToru Ido
    • H03F3/217H03G3/30H03F1/26H03F1/32H03F3/187H03F1/34H03G7/00
    • This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block.