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    • 22. 发明申请
    • THREE DIMENSIONAL DISPLAY
    • 三维显示
    • US20120019514A1
    • 2012-01-26
    • US12939177
    • 2010-11-04
    • Yue-Li ChaoChun-Chieh ChiuChien-Hung Chen
    • Yue-Li ChaoChun-Chieh ChiuChien-Hung Chen
    • G06T15/00G09G5/00
    • G09G3/3611G09G3/003G09G2310/061G09G2320/0285G09G2340/0435H04N13/00H04N13/341H04N13/398
    • A three-dimensional (3D) display including a memory unit, a signal processing unit, a display panel, a pair of shutter glasses and a timing controller is provided. In a first display period of a left eye frame period, the signal processing unit reading and outputting the first display data from the memory unit. In a third display period of a right eye frame period, the signal processing unit reading and outputting the third display data from the memory unit. In a second display period of the left eye frame period and a fourth display period of the right eye frame period, the signal processing unit outputting second display data. The timing controller controlling the shutter glass and driving the display panel according the first display data, the second display data and the third display data. As such, writing-in time and display time of frames can be increased.
    • 提供了包括存储单元,信号处理单元,显示面板,一对快门眼镜和定时控制器的三维(3D)显示器。 在左眼帧周期的第一显示周期中,信号处理单元从存储单元读取并输出第一显示数据。 在右眼帧周期的第三显示周期中,信号处理单元从存储单元读取并输出第三显示数据。 在左眼帧周期的第二显示周期和右眼帧周期的第四显示周期中,信号处理单元输出第二显示数据。 所述定时控制器根据所述第一显示数据,所述第二显示数据和所述第三显示数据来控制所述快门玻璃并驱动所述显示面板。 因此,可以增加帧的写入时间和显示时间。
    • 23. 发明授权
    • Multi-lamp driving circuit
    • 多灯驱动电路
    • US08072159B2
    • 2011-12-06
    • US12416163
    • 2009-04-01
    • Chien-Hung ChenChin-Po ChengYong-Long Lee
    • Chien-Hung ChenChin-Po ChengYong-Long Lee
    • H05B41/36
    • H05B41/282H05B41/2827
    • A multi-lamp driving circuit for driving a plurality of lamps includes at least one power stage circuit, at least one transformer circuit, a balancing circuit, and a control circuit. The power stage circuit converts external electrical signals to alternating current (AC) signals. The transformer circuit is connected to the power stage circuit, to convert the AC signals to high voltage electrical signals capable of driving the lamps. The balancing circuit balances current flowing through the lamps, and includes a capacitor balancing circuit and a transformer balancing circuit. The control circuit is connected between the balancing circuit and the power stage circuit, to control output of the power stage circuit according to variation of the current flowing through the lamps.
    • 用于驱动多个灯的多灯驱动电路包括至少一个功率级电路,至少一个变压器电路,平衡电路和控制电路。 功率级电路将外部电信号转换为交流(AC)信号。 变压器电路连接到功率级电路,将交流信号转换成能够驱动灯的高电压电信号。 平衡电路平衡流过灯的电流,并且包括电容器平衡电路和变压器平衡电路。 控制电路连接在平衡电路和功率级电路之间,根据流过灯的电流的变化来控制功率级电路的输出。
    • 24. 发明申请
    • METHOD OF MANUFACTURING FLASH MEMORY DEVICE
    • 制造闪存存储器件的方法
    • US20110250727A1
    • 2011-10-13
    • US12755418
    • 2010-04-07
    • Chih-Jen HuangChien-Hung Chen
    • Chih-Jen HuangChien-Hung Chen
    • H01L21/336
    • H01L27/11521
    • A method of manufacturing flash memory device is provided and includes the following steps. First, a substrate is provided. Then, a stacked gate structure is formed on the substrate. Subsequently, a first oxide layer is formed on the stacked gate structure. Following that, a nitride spacer is formed on the first oxide layer, wherein a nitrogen atom-introducing treatment is performed after the forming of the first oxide layer and before the forming of the nitride spacer. Accordingly, the nitrogen atom-introducing treatment of the presentation invention can improve the data retention reliability of the flash memory device.
    • 提供了一种制造闪速存储器件的方法,包括以下步骤。 首先,提供基板。 然后,在基板上形成层叠栅极结构。 随后,在堆叠的栅极结构上形成第一氧化物层。 接着,在第一氧化物层上形成氮化物间隔物,在形成第一氧化物层之后,在形成氮化物间隔物之前,进行氮原子导入处理。 因此,本发明的氮原子引入处理可以提高闪速存储装置的数据保持可靠性。
    • 25. 发明申请
    • PIXEL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    • 像素结构及其制造方法
    • US20110117707A1
    • 2011-05-19
    • US13013887
    • 2011-01-26
    • Han-Tu LinChien-Hung Chen
    • Han-Tu LinChien-Hung Chen
    • H01L21/336
    • H01L27/1288H01L27/1214
    • A method for manufacturing a pixel structure is provided. First, a first mask process is performed to form a patterned first metal layer on a substrate, wherein the patterned first metal layer includes a gate. Next, a second mask process is performed to form a patterned insulating layer and a patterned semiconductor layer over the gate, wherein the patterned insulating layer is disposed on the patterned first metal layer, and the patterned semiconductor layer is disposed on the patterned insulating layer. Then, a third mask process is performed to define a thin film transistor (TFT) and a pixel electrode connected thereto and to form a passivation layer to cover the TFT.
    • 提供了一种用于制造像素结构的方法。 首先,执行第一掩模处理以在基板上形成图案化的第一金属层,其中图案化的第一金属层包括栅极。 接下来,执行第二掩模处理以在栅极上形成图案化绝缘层和图案化半导体层,其中图案化绝缘层设置在图案化的第一金属层上,并且图案化的半导体层设置在图案化的绝缘层上。 然后,执行第三掩模处理以限定连接到其上的薄膜晶体管(TFT)和像素电极,并形成覆盖TFT的钝化层。
    • 30. 发明申请
    • Pixel structure and method for manufacturing the same
    • 像素结构及其制造方法
    • US20100051954A1
    • 2010-03-04
    • US12591019
    • 2009-11-05
    • Han-Tu LinChien-Hung Chen
    • Han-Tu LinChien-Hung Chen
    • H01L33/00H01L31/0224
    • H01L27/1288H01L27/1214
    • A method for manufacturing a pixel structure is provided. First, a first mask process is performed to form a patterned first metal layer on a substrate, wherein the patterned first metal layer includes a gate. Next, a second mask process is performed to form a patterned insulating layer and a patterned semiconductor layer over the gate, wherein the patterned insulating layer is disposed on the patterned first metal layer, and the patterned semiconductor layer is disposed on the patterned insulating layer. Then, a third mask process is performed to define a thin film transistor (TFT) and a pixel electrode connected thereto and to form a passivation layer to cover the TFT.
    • 提供了一种用于制造像素结构的方法。 首先,执行第一掩模处理以在基板上形成图案化的第一金属层,其中图案化的第一金属层包括栅极。 接下来,执行第二掩模处理以在栅极上形成图案化绝缘层和图案化半导体层,其中图案化绝缘层设置在图案化的第一金属层上,并且图案化的半导体层设置在图案化的绝缘层上。 然后,执行第三掩模处理以限定连接到其上的薄膜晶体管(TFT)和像素电极,并形成覆盖TFT的钝化层。