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    • 22. 发明授权
    • Mask profile control for controlling feature profile
    • 用于控制特征轮廓的掩模轮廓控制
    • US07341953B2
    • 2008-03-11
    • US11406485
    • 2006-04-17
    • Camelia Rusu
    • Camelia Rusu
    • H01L21/302
    • H01L21/31144H01L21/31122H01L21/31138H01L21/76802
    • A method for etching features into a dielectric layer over a substrate and existent below a polymeric hard mask is provided. The substrate is placed in a plasma processing chamber. Mask features are etched into the polymeric hard mask and necks are formed inadvertently. A plasma treatment process performed before the dielectric etch step process can selectively etch away the necks. As a result, neckless features are created into the polymeric hardmask. Features etched into the underneath dielectric layer through the neckless polymeric hard mask have straight profiles.
    • 提供了一种用于将特征蚀刻到基底上的介电层并存在于聚合物硬掩模下方的方法。 将基板放置在等离子体处理室中。 掩模特征被蚀刻到聚合物硬掩模中,并且无意中形成颈部。 在电介质蚀刻步骤处理之前执行的等离子体处理工艺可以选择性地蚀刻掉颈部。 因此,无缝特征产生在聚合物硬掩模中。 通过无颈聚合物硬掩模蚀刻到下面介电层的特征具有直的轮廓。
    • 24. 发明申请
    • CONTROLLED GAS MIXING FOR SMOOTH SIDEWALL RAPID ALTERNATING ETCH PROCESS
    • 控制的气体混合中光滑侧墙快速交替蚀刻工艺
    • US20130203256A1
    • 2013-08-08
    • US13369125
    • 2012-02-08
    • Qing XuWilliam ThieCamelia Rusu
    • Qing XuWilliam ThieCamelia Rusu
    • H01L21/302
    • H01L21/30655H01L21/32137
    • A method for etching features in a silicon layer disposed below a mask in a plasma processing chamber a plurality of cycles is provided. A deposition phase forming a deposition on the silicon layer in the plasma processing chamber is provided comprising providing a deposition gas into the plasma processing chamber wherein the deposition gas comprises a halogen containing etchant component and a fluorocarbon deposition component, forming the deposition gas into a plasma, which provides a net deposition on the silicon layer, and stopping the flow of the deposition gas. A silicon etch phase is provided, comprising providing a silicon etch gas into the plasma processing chamber that is different than the deposition gas, forming the silicon etch gas into a plasma to etch the silicon layer, and stopping the flow of the silicon etch gas.
    • 提供了一种用于在置于掩模下面在等离子体处理室中的多个周期的硅层中蚀刻特征的方法。 沉积阶段形成在等离子体处理室中的硅层上的沉积提供了一种包括提供沉积气体进入所述等离子体处理室,其中该沉积气体包括含有蚀刻剂组分和碳氟化合物的沉积成分的卤素,在形成沉积气体形成等离子体 ,它提供了在硅层上的净沉积,以及停止该沉积气体流。 甲硅蚀刻阶段提供,其包括:提供硅蚀刻气体流入该等离子体处理室比所述沉积气体不同,在形成硅蚀刻气体形成等离子体来蚀刻硅层,以及停止该硅蚀刻气体的流动。
    • 25. 发明申请
    • PRESSURE CONTROL VALVE ASSEMBLY OF PLASMA PROCESSING CHAMBER AND RAPID ALTERNATING PROCESS
    • 等离子体加工室的压力控制阀组件和快速交替过程
    • US20130115776A1
    • 2013-05-09
    • US13290657
    • 2011-11-07
    • Mirzafer AbatchevCamelia RusuBrian McMillin
    • Mirzafer AbatchevCamelia RusuBrian McMillin
    • H01L21/3065H01L21/30F16K17/00
    • F16K3/0209H01J37/32816H01J37/32834H01L21/30655Y10T137/7837
    • A pressure control valve assembly of a plasma processing chamber in which semiconductor substrates are processed includes a housing having an inlet, an outlet and a conduit extending between the inlet and the outlet, the inlet adapted to be connected to an interior of the plasma processing chamber and the outlet adapted to be connected to a vacuum pump which maintains the plasma processing chamber at desired pressure set points during rapid alternating phases of processing a semiconductor substrate in the chamber. A fixed slotted valve plate having a first set of parallel slots therein is fixed in the conduit such that gasses withdrawn from the chamber into the conduit pass through the first set of parallel slots. A movable slotted valve plate having a second set of parallel slots therein is movable with respect to the fixed slotted valve plate so as to adjust pressure in the chamber.
    • 其中处理半导体衬底的等离子体处理室的压力控制阀组件包括具有入口,出口和在入口和出口之间延伸的导管的壳体,入口适于连接到等离子体处理室的内部 并且所述出口适于连接到真空泵,所述真空泵在处理所述室中的半导体衬底的快速交替阶段期间将所述等离子体处理室维持在期望的压力设定点。 在其中具有第一组平行槽的固定开槽阀板固定在管道中,使得从腔室排出到管道中的气体通过第一组平行槽。 其中具有第二组平行槽的可移动开槽阀板可相对于固定开槽阀板移动,以调节腔室中的压力。
    • 27. 发明授权
    • Method and apparatus for providing mask in semiconductor processing
    • 用于在半导体处理中提供掩模的方法和装置
    • US07785753B2
    • 2010-08-31
    • US11383835
    • 2006-05-17
    • Yoojin KimCamelia RusuJonathan Kim
    • Yoojin KimCamelia RusuJonathan Kim
    • G03F1/00
    • H01L21/31144H01J37/32082H01J2237/3342H01L21/0273H01L21/31122H01L21/32139
    • Disclosed is a method for processing a two layer mask for use in fabrication of semiconductor devices whereby the critical dimension (CD) of a semiconductor device being fabricated with the mask can be controlled. After forming a carbon mask layer and a silicon containing photoresist layer on the carbon mask, a two-step process forms openings in the carbon mask layer, as required for subsequent device fabrication. The structure is placed in a plasma processing chamber, and an oxygen plasma is employed to partially etch the carbon layer. The oxygen plasma reacts with silicon in the photoresist to form a hard silicon oxide layer on the surface of the photoresist. A hydrogen plasma is then employed to complete the etch through the carbon layer with a reduced critical dimension. Damage to the silicon containing photoresist layer is kept to a minimum during the plasma etch process by limiting the low frequency RF power.
    • 公开了一种用于制造半导体器件的双层掩模的处理方法,由此可以控制用掩模制造的半导体器件的临界尺寸(CD)。 在碳掩模上形成碳掩模层和含硅光致抗蚀剂层之后,根据随后的器件制造的需要,两步法在碳掩模层中形成开口。 将该结构放置在等离子体处理室中,并且使用氧等离子体来部分蚀刻碳层。 氧等离子体与光致抗蚀剂中的硅反应,在光致抗蚀剂的表面上形成硬的氧化硅层。 然后使用氢等离子体来完成通过具有减小的临界尺寸的碳层的蚀刻。 通过限制低频RF功率,在等离子体蚀刻工艺期间,使含硅光致抗蚀剂层的损伤保持最小。