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21. 发明授权

US06835663B2 Hardmask of amorphous carbon-hydrogen (a-C:H) layers with tunable etch resistivity 有权
标题翻译：具有可调蚀刻电阻率的无定形碳氢（a-C：H）层的硬掩模
公开(公告)号：US06835663B2
公开(公告)日：2004-12-28
申请号：US10184127
申请日：2002-06-28
申请人： Matthias Lipinski
发明人： Matthias Lipinski
IPC分类号： H01L2100
CPC分类号： C23C16/26 , H01L21/0332 , H01L21/0337 , H01L21/32139
摘要： A process of using a-C:H layer as a hardmask material with tunable etch resistivity in a RIE process that alleviates the addition of a layer forming gas to the etchant when making a semiconductor device, comprising: a) providing a semiconductor substrate; b) forming a hardmask of amorphous carbon-hydrogen (a-C:H) layer by plasma enhancement over the semiconductor substrate; c) forming an opening in the hardmask layer to form an exposed surface portion of the hardmask layer; and d) etching the exposed surface portion of the hardmask layer without the addition of a layer forming gas using RIE to form a trench feature with sufficient masking and side wall protection.
摘要翻译：一种在RIE工艺中使用C：H层作为具有可调蚀刻电阻率的硬掩模材料的方法，该方法减轻了在制造半导体器件时向蚀刻剂加成层形成气体，其包括：a）提供半导体衬底; b）形成通过半导体衬底上的等离子体增强来形成无定形碳氢（aC：H）层的硬掩模; c）在硬掩模层中形成开口以形成硬掩模层的暴露表面部分; 并且d）使用RIE蚀刻硬掩模层的暴露表面部分而不添加形成层的气体，以形成具有足够掩蔽和侧壁保护的沟槽特征。

22. 发明申请

US20090023078A1 Lithography Masks and Methods of Manufacture Thereof 有权
标题翻译：光刻面具及其制造方法
公开(公告)号：US20090023078A1
公开(公告)日：2009-01-22
申请号：US11781105
申请日：2007-07-20
申请人： Alois Gutmann , Sajan Marokkey , Henning Haffner , Chandrasekhar Sarma , Haoren Zhuang , Matthias Lipinski
发明人： Alois Gutmann , Sajan Marokkey , Henning Haffner , Chandrasekhar Sarma , Haoren Zhuang , Matthias Lipinski
IPC分类号： G03F1/00 , G03F7/20
CPC分类号： G03F1/29 , G03F1/26
摘要： Lithography masks and methods of manufacture thereof are disclosed. For example, a method of manufacturing a lithography mask includes forming a stack over a substrate. The stack includes bottom attenuated phase shift material layers, intermediate opaque material layers, and finally top resist layers. The method further includes patterning the stack and then trimming the resist layers to uncover a portion of the opaque material layers. The uncovered opaque material layers are subsequently etched followed by removal of any remaining resist layers.
摘要翻译：公开了平版印刷掩模及其制造方法。例如，制造光刻掩模的方法包括在衬底上形成叠层。该堆叠包括底部衰减相移材料层，中间不透明材料层，最后是顶部抗蚀剂层。该方法还包括图案化叠层，然后修整抗蚀剂层以露出不透明材料层的一部分。随后蚀刻未覆盖的不透明材料层，随后除去任何剩余的抗蚀剂层。

23. 发明申请

US20080220609A1 Methods of Forming Mask Patterns on Semiconductor Wafers that Compensate for Nonuniform Center-to-Edge Etch Rates During Photolithographic Processing 有权
标题翻译：在光刻处理中补偿不均匀的中心到边缘蚀刻速率的半导体晶片上形成掩模图案的方法
公开(公告)号：US20080220609A1
公开(公告)日：2008-09-11
申请号：US11683648
申请日：2007-03-08
申请人： Chong Kwang Chang , Wan Jae Park , Len Yuan Tsou , Haoren Zhuang , Matthias Lipinski , Shailendra Mishra
发明人： Chong Kwang Chang , Wan Jae Park , Len Yuan Tsou , Haoren Zhuang , Matthias Lipinski , Shailendra Mishra
IPC分类号： H01L21/302
CPC分类号： H01L21/31144
摘要： Methods of forming integrated circuit devices include steps to selectively widen portions of a mask pattern extending adjacent an outer edge of a semiconductor wafer. These steps to selectively widen portions of the mask pattern are performed so that more uniform center-to-edge critical dimensions (CD) can be achieved when the mask pattern is used to support photolithographically patterning of underlying layers (e.g., insulating layers, antireflective coatings, etc.).
摘要翻译：形成集成电路器件的方法包括选择性地加宽邻近半导体晶片的外边缘延伸的掩模图案的部分的步骤。执行选择性拓宽掩模图案部分的这些步骤，使得当掩模图案用于支持下层（例如，绝缘层，抗反射涂层）的光刻图案化时，可以实现更均匀的中心至边缘临界尺寸（CD）等）。

24. 发明申请

US20080176344A1 Feature Dimension Control in a Manufacturing Process 有权
标题翻译：制造过程中的特征尺寸控制
公开(公告)号：US20080176344A1
公开(公告)日：2008-07-24
申请号：US11625575
申请日：2007-01-22
申请人： Haoren Zhuang , Alois Gutmann , Matthias Lipinski , Chandrasekhar Sarma , Jingyu Lian
发明人： Haoren Zhuang , Alois Gutmann , Matthias Lipinski , Chandrasekhar Sarma , Jingyu Lian
IPC分类号： H01L21/66 , C23F1/00
CPC分类号： H01L21/32137 , H01L22/12
摘要： A method for manufacturing a semiconductor device is disclosed including determining a dimension or other physical characteristic of a pattern in a layer of material that is disposed on a workpiece, and etching the layer of material using information that is related to the dimension. A system is also disclosed for manufacturing a semiconductor device including a first etch system configured to etch a layer to define a pattern in the layer, and a second etch system configured to measure a physical characteristic of the pattern, determine an etch control parameter based on the physical characteristic, and etch the layer in accordance with the etch control parameter.
摘要翻译：公开了一种用于制造半导体器件的方法，其包括确定设置在工件上的材料层中的图案的尺寸或其他物理特性，以及使用与所述尺寸相关的信息来蚀刻所述材料层。还公开了一种用于制造半导体器件的系统，该半导体器件包括被配置为蚀刻层以限定该层中的图案的第一蚀刻系统，以及被配置为测量该图案的物理特性的第二蚀刻系统，基于物理特性，并根据蚀刻控制参数刻蚀该层。

25. 发明申请

US20080044741A1 Metrology systems and methods for lithography processes 有权
标题翻译：用于光刻工艺的计量系统和方法
公开(公告)号：US20080044741A1
公开(公告)日：2008-02-21
申请号：US11504388
申请日：2006-08-15
申请人： Chandrasekhar Sarma , Jingyu Lian , Matthias Lipinski , Haoren Zhuang
发明人： Chandrasekhar Sarma , Jingyu Lian , Matthias Lipinski , Haoren Zhuang
IPC分类号： G03F1/00 , G06F17/50 , G03C5/00 , G03B27/42
CPC分类号： G03F7/70425 , G03F7/70483
摘要： Metrology systems and methods for lithography processes are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a mask having a plurality of corner rounding test patterns formed thereon. A first semiconductor device is provided, and a layer of photosensitive material of the first semiconductor device is patterned with a plurality of corner rounding test features using the mask and a lithography process. An amount of corner rounding of the lithography process is measured by analyzing the plurality of corner rounding test features relative to other of the plurality of corner rounding test features formed on the layer of photosensitive material of the semiconductor device. The lithography process or the mask is altered in response to the amount of corner rounding measured, and a second semiconductor device is provided. The second semiconductor device is affected using the altered lithography process or the altered mask.
摘要翻译：公开了用于光刻工艺的计量系统和方法。在一个实施例中，制造半导体器件的方法包括提供具有形成在其上的多个圆角圆形测试图案的掩模。提供第一半导体器件，并且使用掩模和光刻工艺，利用多个拐角圆形测试特征对第一半导体器件的感光材料层进行构图。通过分析相对于形成在半导体器件的感光材料层上的多个角圆切削测试特征中的其它角点的多个角圆测试特征来测量光刻工艺的角圆角。光刻处理或掩模响应于测量的角圆度的量而改变，并且提供第二半导体器件。使用改变的光刻工艺或改变的掩模影响第二半导体器件。

26. 发明授权

US07223525B2 Process for generating a hard mask for the patterning of a layer 有权
标题翻译：用于产生用于层的图案化的硬掩模的工艺
公开(公告)号：US07223525B2
公开(公告)日：2007-05-29
申请号：US10970483
申请日：2004-10-21
申请人： Matthias Lipinski
发明人： Matthias Lipinski
IPC分类号： G03F7/20 , G03F7/40 , B05D5/00 , C23C28/00
CPC分类号： H01L21/0332 , H01L21/31144
摘要： A process for generating a hard mask for the patterning of a first layer includes applying a second layer, which includes carbon, to the first layer that is to be patterned. A third layer, which includes silicon and carbon, is spun onto the second layer and an organic antireflection coating layer that is to be used with an overlying photoresist layer patternable using 193 nm technology, is appllied to the spun-on third layer.
摘要翻译：用于产生用于第一层的图案化的硬掩模的工艺包括将第二层（包括碳）施加到待图案化的第一层。包括硅和碳的第三层被旋涂到第二层上，并且与使用193nm技术可图案化的上覆光致抗蚀剂层一起使用的有机抗反射涂层被应用于纺丝第三层。

27. 发明申请

US20050106478A1 Process for generating a hard mask for the patterning of a layer, and hard mask for the patterning of a layer 有权
标题翻译：用于生成用于层的图案化的硬掩模的工艺，以及用于层的图案化的硬掩模
公开(公告)号：US20050106478A1
公开(公告)日：2005-05-19
申请号：US10970483
申请日：2004-10-21
申请人： Matthias Lipinski
发明人： Matthias Lipinski
IPC分类号： G03F1/00 , G03F7/00 , H01L21/033 , H01L21/308 , H01L21/311
CPC分类号： H01L21/0332 , H01L21/31144
摘要： A process for generating a hard mask for the patterning of a first layer includes applying a second layer, which includes carbon, to the first layer that is to be patterned. A third layer, which includes silicon and carbon, is spun onto the second layer and an organic antireflection coating layer is applied to the spun-on third layer.
摘要翻译：用于产生用于第一层的图案化的硬掩模的工艺包括将第二层（包括碳）施加到待图案化的第一层。包括硅和碳的第三层被旋转到第二层上，并且将有机抗反射涂层施加到纺丝的第三层上。

28. 发明授权

US08394574B2 Metrology systems and methods for lithography processes 有权
标题翻译：用于光刻工艺的计量系统和方法
公开(公告)号：US08394574B2
公开(公告)日：2013-03-12
申请号：US13246396
申请日：2011-09-27
申请人： Chandrasekhar Sarma , Jingyu Lian , Matthias Lipinski , Haoren Zhuang
发明人： Chandrasekhar Sarma , Jingyu Lian , Matthias Lipinski , Haoren Zhuang
IPC分类号： G03C5/00 , G03F9/00 , H01L23/58
CPC分类号： G03F7/70425 , G03F7/70483
摘要： Metrology systems and methods for lithography processes are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a mask having a plurality of corner rounding test patterns formed thereon. A first semiconductor device is provided, and a layer of photosensitive material of the first semiconductor device is patterned with a plurality of corner rounding test features using the mask and a lithography process. An amount of corner rounding of the lithography process is measured by analyzing the plurality of corner rounding test features relative to other of the plurality of corner rounding test features formed on the layer of photosensitive material of the semiconductor device. The lithography process or the mask is altered in response to the amount of corner rounding measured, and a second semiconductor device is provided. The second semiconductor device is affected using the altered lithography process or the altered mask.
摘要翻译：公开了用于光刻工艺的计量系统和方法。在一个实施例中，制造半导体器件的方法包括提供具有形成在其上的多个圆角圆形测试图案的掩模。提供第一半导体器件，并且使用掩模和光刻工艺，利用多个拐角圆形测试特征对第一半导体器件的感光材料层进行构图。通过分析相对于形成在半导体器件的感光材料层上的多个角圆切削测试特征中的其它角点的多个角圆测试特征来测量光刻工艺的角圆角。光刻处理或掩模响应于测量的角圆度的量而改变，并且提供第二半导体器件。使用改变的光刻工艺或改变的掩模影响第二半导体器件。

29. 发明申请

US20120013884A1 Metrology Systems and Methods for Lithography Processes 有权
标题翻译：光刻过程的计量系统和方法
公开(公告)号：US20120013884A1
公开(公告)日：2012-01-19
申请号：US13246396
申请日：2011-09-27
申请人： Chandrasekhar Sarma , Jingyu Lian , Matthias Lipinski , Haoren Zhuang
发明人： Chandrasekhar Sarma , Jingyu Lian , Matthias Lipinski , Haoren Zhuang
IPC分类号： G03B27/54
CPC分类号： G03F7/70425 , G03F7/70483
摘要： Metrology systems and methods for lithography processes are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a mask having a plurality of corner rounding test patterns formed thereon. A first semiconductor device is provided, and a layer of photosensitive material of the first semiconductor device is patterned with a plurality of corner rounding test features using the mask and a lithography process. An amount of corner rounding of the lithography process is measured by analyzing the plurality of corner rounding test features relative to other of the plurality of corner rounding test features formed on the layer of photosensitive material of the semiconductor device. The lithography process or the mask is altered in response to the amount of corner rounding measured, and a second semiconductor device is provided. The second semiconductor device is affected using the altered lithography process or the altered mask.
摘要翻译：公开了用于光刻工艺的计量系统和方法。在一个实施例中，制造半导体器件的方法包括提供具有形成在其上的多个圆角圆形测试图案的掩模。提供第一半导体器件，并且使用掩模和光刻工艺，利用多个拐角圆形测试特征对第一半导体器件的感光材料层进行构图。通过分析相对于形成在半导体器件的感光材料层上的多个角圆切削测试特征中的其它角点的多个角圆测试特征来测量光刻工艺的角圆角的量。光刻处理或掩模响应于测量的角圆度的量而改变，并且提供第二半导体器件。使用改变的光刻工艺或改变的掩模影响第二半导体器件。

30. 发明授权

US08071261B2 Lithography masks and methods of manufacture thereof 有权
标题翻译：光刻面具及其制造方法
公开(公告)号：US08071261B2
公开(公告)日：2011-12-06
申请号：US11781105
申请日：2007-07-20
申请人： Alois Gutmann , Sajan Marokkey , Henning Haffner , Chandrasekhar Sarma , Haoren Zhuang , Matthias Lipinski
发明人： Alois Gutmann , Sajan Marokkey , Henning Haffner , Chandrasekhar Sarma , Haoren Zhuang , Matthias Lipinski
IPC分类号： G03F1/00
CPC分类号： G03F1/29 , G03F1/26
摘要： Lithography masks and methods of manufacture thereof are disclosed. For example, a method of manufacturing a lithography mask includes forming a stack over a substrate. The stack includes bottom attenuated phase shift material layers, intermediate opaque material layers, and finally top resist layers. The method further includes patterning the stack and then trimming the resist layers to uncover a portion of the opaque material layers. The uncovered opaque material layers are subsequently etched followed by removal of any remaining resist layers.
摘要翻译：公开了平版印刷掩模及其制造方法。例如，制造光刻掩模的方法包括在衬底上形成叠层。该堆叠包括底部衰减相移材料层，中间不透明材料层，最后是顶部抗蚀剂层。该方法还包括图案化叠层，然后修整抗蚀剂层以露出不透明材料层的一部分。随后蚀刻未覆盖的不透明材料层，随后除去任何剩余的抗蚀剂层。

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