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    • 22. 发明申请
    • AD Converter
    • AD转换器
    • US20090160688A1
    • 2009-06-25
    • US12338875
    • 2008-12-18
    • Kazuo HasegawaHirohisa Suzuki
    • Kazuo HasegawaHirohisa Suzuki
    • H03M3/02
    • H03M3/34G01P15/12H03M3/356H03M3/43H03M3/462
    • An AD converter comprising: a delta-sigma-modulation circuit to output an analog signal from a bridge circuit as a quantized signal; a switch circuit to switch between a first state, where a first level voltage is applied to one terminal of the bridge circuit and a second level voltage different in level from the first level voltage is applied to the other terminal thereof, and a second state, where voltages opposite in level to those in the first state are applied thereto, based on a logic level of a control signal; and an up-down counter to increase a count value based on a rate of the quantized signal being one logic level, during a predetermined period, in the first state, and decrease the count value based on the rate, during the predetermined period, in the second state, the count value representing a digital signal according to the physical quantity.
    • 一种AD转换器,包括:Δ-Σ调制电路,用于将来自桥接电路的模拟信号作为量化信号输出; 在第一状态和第二状态之间进行切换,该第一状态向桥接电路的一个端子施加第一电平电压,另一端施加与第一电平电压不同的第二电平电压, 其中基于控制信号的逻辑电平对其施加与第一状态相反的电压电平; 以及升降计数器,用于在所述第一状态期间的预定时段期间,基于所述量化信号为一逻辑电平的速率来增加计数值,并且在所述预定时段期间,基于所述速率减少所述计数值 第二状态,计数值表示根据物理量的数字信号。
    • 23. 发明申请
    • Delay Circuit and Ring Oscillator Using The Same
    • 延迟电路和环形振荡器使用它
    • US20060197572A1
    • 2006-09-07
    • US11275808
    • 2006-01-30
    • Hirohisa SuzukiKazuo HasegawaEiji Akama
    • Hirohisa SuzukiKazuo HasegawaEiji Akama
    • H03H11/26
    • H03K5/133H03K3/0315H03K2005/00026H03K2005/00156H03K2005/00202
    • In a delay circuit, when a first conductivity-type transistor (M6) becomes conductive on the basis of one level of its input signal, a first current path is formed through a source side transistor (M4), the first conductivity-type transistor (M6), and a second drive transistor (M9) between a source power line and a sink power line, and its output signal being the delayed inverse of the one level of the input signal is output from a connection point of another source side transistor (M5) and a sink side transistor (M11), and when a second conductivity-type transistor (M7) becomes conductive on the basis of the other level of the input signal, a second current path is formed through a first drive transistor (M3), the second conductivity-type transistor (M7), and another sink side transistor (M10), and the output signal being the delayed inverse of the other level of the input signal is output from the connection point.
    • 在延迟电路中,当第一导电型晶体管(M 6)基于其输入信号的一个电平导通时,通过源极侧晶体管(M 4)形成第一电流路径,第一导电型 晶体管(M 6)和源极电源线和吸收电力线之间的第二驱动晶体管(M9),并且其输出信号是输入信号的一个电平的延迟的反相,从另一个的连接点输出 源极侧晶体管(M5)和漏极侧晶体管(M11),并且当第二导电型晶体管(M7)基于输入信号的其他电平导通时,形成第二电流路径 第一驱动晶体管(M 3),第二导电型晶体管(M7)和另一个漏极侧晶体管(M10),并且作为输入信号的另一个电平的延迟反相的输出信号从 连接点。
    • 24. 发明申请
    • Amplitude adjusting circuit
    • 幅度调节电路
    • US20060176084A1
    • 2006-08-10
    • US11333547
    • 2006-01-18
    • Hirohisa SuzukiKazuo HasegawaEiji Akama
    • Hirohisa SuzukiKazuo HasegawaEiji Akama
    • G01R19/00
    • H03K25/02
    • An amplitude adjusting circuit comprises a first current mirror where a variable current of a variable current source is copied into each of 1st-3rd transistors; a second current mirror where the variable current is copied into each of 11th-13th transistors; a third current mirror having 6th-7th transistors where a current through the 2nd transistor copied from the variable current flows through the 6th transistor; a fourth current mirror having 8th-9th transistors where a current through the 12th transistor copied from the variable current flows through the 8th transistor; an inverter that has 1st-2nd conductivity type transistors and produces an output signal corresponding to a current level of the 7th or 9th transistor; a fifth current mirror having 15th-14th transistors where a current through the 14th transistor copied from the 15th transistor's becomes a current sourced by the 7th transistor; and a sixth current mirror having 5th-4th transistors where a current through the 4th transistor copied from the 5th transistor's becomes a current sunk by the 9th transistor.
    • 振幅调整电路包括第一电流镜,其中可变电流源的可变电流被复制到第一至第三晶体管的每一个中; 第二电流镜,其中可变电流被复制到第十一至第十三晶体管的每一个中; 具有第六晶体管的第三电流镜,其中从可变电流复制的通过第二晶体管的电流流过第六晶体管; 具有第八晶体管的第四电流镜,其中从可变电流复制的第十二晶体管的电流流过第八晶体管; 具有第1〜第2导电型晶体管并产生与第7或第9晶体管的电流电平对应的输出信号的反相器; 具有第十五至第十四晶体管的第五电流镜,其中从第十五晶体管复制的通过第十四晶体管的电流变为由第七晶体管产生的电流; 以及具有第五至第四晶体管的第六电流镜,其中通过第五晶体管复制的第四晶体管的电流由第九晶体管成为电流。
    • 27. 发明授权
    • Drive detection device for gyroscope
    • 陀螺仪驱动检测装置
    • US06288474B1
    • 2001-09-11
    • US09578989
    • 2000-05-25
    • Yasuichi OnoKazuo HasegawaDaisuke Takai
    • Yasuichi OnoKazuo HasegawaDaisuke Takai
    • H01L408
    • G01C19/5607
    • A pair of electrodes are formed on the front surface and the rear surface of each vibrator in a longitudinal direction, and dielectric polarization is performed in the direction from the front surface to the rear surface. When I/V converters constituted by operational amplifiers are connected to electrodes of the middle vibrator, the detection electrodes can be grounded to a reference potential Vref through the imaginary short circuits of the I/V converters, so that a gyroscope can be vibrated without a conventional ground electrode. Therefore, the number of electrodes of the vibrators can be reduced, and an interval size between the drive electrodes or between the detection electrodes can be assured. For this reason, sufficient dielectric polarization can be performed when a high voltage is applied.
    • 在每个振动器的前表面和后表面上沿纵向方向形成一对电极,并且在从前表面到后表面的方向上执行介电极化。 当由运算放大器构成的I / V转换器连接到中间振子的电极时,检测电极可以通过I / V转换器的假想短路接地到参考电位Vref,使得陀螺仪可以振动而没有 常规接地电极。 因此,可以减少振动器的电极数量,并且可以确保驱动电极之间或检测电极之间的间隔尺寸。 因此,当施加高电压时,可以进行足够的介电极化。