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21. 发明授权

US07064982B2 Semiconductor memory device and portable electronic apparatus 失效
标题翻译：半导体存储器件和便携式电子设备
公开(公告)号：US07064982B2
公开(公告)日：2006-06-20
申请号：US10844562
申请日：2004-05-13
申请人： Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
发明人： Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
IPC分类号： G11C16/04
CPC分类号： H01L29/792 , G11C16/0408 , H01L21/28282
摘要： A semiconductor memory device includes a memory cell including a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having a function of retaining charges; a switching transistor circuit including a negative voltage switching circuit for applying a negative voltage to the gate electrode of the memory cell, and a switching transistor connected to an output of the negative voltage switching circuit and a first voltage source for outputting a voltage having a voltage level lower than zero volt; a pull-up circuit connected to a control terminal of the switching transistor and selectively connected to a second voltage source for outputting a voltage having a voltage level higher than zero volt; and a pull-down circuit connected to the first voltage source and the control terminal of the switching transistor.
摘要翻译：一种半导体存储器件包括：存储单元，包括通过栅极绝缘膜形成在半导体层上的栅极电极，设置在栅极电极下方的沟道区域，设置在沟道区域两侧的扩散区域，并且具有与该沟道区域相反的导电类型以及形成在栅电极的两侧并具有保持电荷的功能的存储功能单元; 开关晶体管电路，包括用于向存储单元的栅电极施加负电压的负电压切换电路，以及连接到负电压开关电路的输出的开关晶体管和用于输出具有电压的电压的第一电压源电平低于零伏; 连接到所述开关晶体管的控制端子并且选择性地连接到用于输出具有高于零伏的电压电平的电压的第二电压源的上拉电路; 以及连接到开关晶体管的第一电压源和控制端子的下拉电路。

22. 发明授权

US07023731B2 Semiconductor memory device and portable electronic apparatus 失效
标题翻译：半导体存储器件和便携式电子设备
公开(公告)号：US07023731B2
公开(公告)日：2006-04-04
申请号：US10849481
申请日：2004-05-18
申请人： Koji Hamaguchi , Masaru Nawaki , Yoshinao Morikawa , Hiroshi Iwata , Akihide Shibata
发明人： Koji Hamaguchi , Masaru Nawaki , Yoshinao Morikawa , Hiroshi Iwata , Akihide Shibata
IPC分类号： G11C16/04
CPC分类号： G11C29/46 , G11C16/04 , G11C16/06 , G11C29/14
摘要： A semiconductor memory device including: a memory cell array in which memory cells are arranged; a plurality of terminals for accepting commands issued by an external user; a command interface circuit for interfacing between the external user and the memory cell array; a write state machine for controlling the programming and erasing operations; and an output circuit for outputting an internal signal to the plurality of terminals, wherein the memory cell includes a gate electrode formed over a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional elements formed on both sides of the gate electrode and having the function of retaining charges.
摘要翻译：一种半导体存储器件，包括：存储单元阵列，其中存储单元被布置; 用于接受外部用户发出的命令的多个终端; 用于在外部用户和存储单元阵列之间进行接口的命令接口电路; 用于控制编程和擦除操作的写状态机; 以及输出电路，用于向所述多个端子输出内部信号，其中所述存储单元包括通过栅极绝缘膜形成在半导体层上的栅极电极，设置在所述栅极电极下方的沟道区域，设置在所述栅极绝缘膜两侧的扩散区域所述沟道区域具有与沟道区的导电类型相反的导电类型，以及形成在栅电极的两侧上并具有保持电荷的功能的存储功能元件。

23. 发明授权

US06985397B2 Semiconductor storage device and portable electronic equipment having the same 失效
标题翻译：半导体存储装置和具有该半导体存储装置的便携式电子设备
公开(公告)号：US06985397B2
公开(公告)日：2006-01-10
申请号：US10808581
申请日：2004-03-25
申请人： Kei Tokui , Hiroshi Iwata , Yoshifumi Yaoi , Akihide Shibata , Masaru Nawaki
发明人： Kei Tokui , Hiroshi Iwata , Yoshifumi Yaoi , Akihide Shibata , Masaru Nawaki
IPC分类号： G11C7/00 , G11C16/04
CPC分类号： G11C16/30
摘要： A semiconductor storage device has a variable-stage charge pump, and a memory cell array to which an output from an output line of the variable-stage charge pump is fed. In the variable-stage charge pump, first and second charge pumps are connected in parallel between a common input bus and a common output bus. A first n-channel MOSFET is provided on a line connecting an output terminal of the first charge pump and the common output bus, and another n-channel MOSFET is provided on a line connecting the second charge pump and the common output bus. First switches are provided between the output terminal of the first charge pump and the first n-channel MOSFET, and between the input terminal of the second charge pump and the second switch. A second switch is provided on a line connecting an input terminal of the second charge pump and the common input bus.
摘要翻译：半导体存储装置具有可变级电荷泵以及来自可变级电荷泵的输出线的输出的存储单元阵列。在可变级电荷泵中，第一和第二电荷泵在公共输入总线和公共输出总线之间并联连接。在连接第一电荷泵的输出端和公共输出总线的线路上设置第一n沟道MOSFET，并且在连接第二电荷泵和公共输出总线的线路上提供另一n沟道MOSFET。第一开关设置在第一电荷泵的输出端和第一n沟道MOSFET之间，以及第二电荷泵的输入端和第二开关之间。在连接第二电荷泵的输入端和公共输入总线的线路上设置有第二开关。

24. 发明授权

US06862251B2 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US06862251B2
公开(公告)日：2005-03-01
申请号：US10847304
申请日：2004-05-18
申请人： Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
发明人： Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
IPC分类号： G11C16/06 , G11C5/00 , G11C8/00 , G11C11/22 , G11C16/02 , G11C16/04 , G11C16/08 , H01L21/28 , H01L21/336 , H01L21/8246 , H01L21/8247 , H01L27/105 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792
CPC分类号： G11C16/08 , G11C11/22 , G11C16/0475 , H01L21/28282 , H01L21/28291 , H01L29/42332 , H01L29/66833 , H01L29/6684 , H01L29/7887
摘要： A semiconductor memory device includes a first nonvolatile memory cell, a bit line connected to the first nonvolatile memory cell, and a control circuit connected to the first nonvolatile memory cell and the bit line, and disposed and configured in such a manner as to reset the bit line to a predetermined first potential state only for a certain period “a” of time in response to transition of an input address signal. The first nonvolatile memory cell has a gate electrode formed on a semiconductor layer via a gate insulating film; a channel region disposed under the gate electrode; diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region; and memory functional units formed on both sides of the gate electrode and having the function of retaining charges.
摘要翻译：半导体存储器件包括第一非易失性存储器单元，连接到第一非易失性存储器单元的位线和连接到第一非易失性存储单元和位线的控制电路，并且被配置和配置为使复位位线到达预定的第一电位状态，仅响应于输入地址信号的转变而在一定时间段“a”。第一非易失性存储单元具有通过栅极绝缘膜形成在半导体层上的栅电极; 设置在所述栅电极下方的沟道区域; 扩散区域设置在沟道区域的两侧并且具有与沟道区域的导电类型相反的导电类型; 以及形成在栅电极的两侧并具有保持电荷的功能的存储功能单元。

25. 发明授权

US06787410B2 Semiconductor device having dynamic threshold transistors and element isolation region and fabrication method thereof 失效
标题翻译：具有动态阈值晶体管和元件隔离区域的半导体器件及其制造方法
公开(公告)号：US06787410B2
公开(公告)日：2004-09-07
申请号：US10322663
申请日：2002-12-19
申请人： Hiroshi Iwata , Akihide Shibata , Seizo Kakimoto
发明人： Hiroshi Iwata , Akihide Shibata , Seizo Kakimoto
IPC分类号： H01L218238
CPC分类号： H01L21/76229 , H01L21/823807 , H01L29/783
摘要： A semiconductor device with dynamic threshold transistors includes a complex element isolation region composed of a shallow element isolation region made of shallow trench isolation and deep element isolation regions provided on both sides of the shallow element isolation region. Since the shallow element isolation region is made of the shallow trench isolation, Bird's beak in the shallow element isolation region is small. This prevents off leakage failure due to stress caused by the bird's beak. The deep element isolation region has an approximately constant width which allows the complex element isolation region to be wide.
摘要翻译：具有动态阈值晶体管的半导体器件包括由浅沟槽隔离构成的浅元件隔离区域和设置在浅元件隔离区域两侧的深元件隔离区域构成的复合元件隔离区域。由于浅元件隔离区域由浅沟槽隔离构成，浅元件隔离区域中的鸟喙小。这可以防止由于鸟嘴引起的应力引起的泄漏故障。深元件隔离区域具有近似恒定的宽度，其允许复杂元件隔离区域宽。

26. 发明申请

US20130221385A1 LIGHT EMITTING ELEMENT AND PRODUCTION METHOD FOR SAME, PRODUCTION METHOD FOR LIGHT-EMITTING DEVICE, ILLUMINATION DEVICE, BACKLIGHT, DISPLAY DEVICE, AND DIODE 有权
标题翻译：发光元件及其制造方法，发光装置的制造方法，照明装置，背光，显示装置和二极管
公开(公告)号：US20130221385A1
公开(公告)日：2013-08-29
申请号：US13820081
申请日：2011-06-22
申请人： Akihide Shibata , Tetsu Negishi , Kenji Komiya , Yoshifumi Yaoi , Takeshi Shiomi , Hiroshi Iwata , Akira Takahashi
发明人： Akihide Shibata , Tetsu Negishi , Kenji Komiya , Yoshifumi Yaoi , Takeshi Shiomi , Hiroshi Iwata , Akira Takahashi
IPC分类号： H01L33/64 , H01L33/58 , H01L33/08 , H01L33/42
CPC分类号： H01L33/64 , G02F1/133603 , H01L25/0753 , H01L31/035227 , H01L31/03529 , H01L31/052 , H01L31/054 , H01L31/0547 , H01L33/0079 , H01L33/08 , H01L33/14 , H01L33/18 , H01L33/20 , H01L33/24 , H01L33/26 , H01L33/32 , H01L33/42 , H01L33/58 , H01L2924/0002 , Y02E10/52 , H01L2924/00
摘要： A light-emitting element includes a first conductivity type semiconductor base, a plurality of first conductivity type protrusion-shaped semiconductors formed on the semiconductor base, and a second conductivity type semiconductor layer that covers the protrusion-shaped semiconductors.
摘要翻译：发光元件包括第一导电型半导体基底，形成在半导体基底上的多个第一导电型突起状半导体，以及覆盖突起状半导体的第二导电型半导体层。

27. 发明申请

US20130027623A1 LIGHT-EMITTING DEVICE MANUFACTURING METHOD, LIGHT-EMITTING DEVICE, LIGHTING DEVICE, BACKLIGHT, LIQUID-CRYSTAL PANEL, DISPLAY DEVICE, DISPLAY DEVICE MANUFACTURING METHOD, DISPLAY DEVICE DRIVE METHOD AND LIQUID-CRYSTAL DISPLAY DEVICE 有权
标题翻译：发光装置制造方法，发光装置，照明装置，背光，液晶面板，显示装置，显示装置制造方法，显示装置驱动方法和液晶显示装置
公开(公告)号：US20130027623A1
公开(公告)日：2013-01-31
申请号：US13634030
申请日：2011-02-22
申请人： Tetsu Negishi , Akihide Shibata , Kenji Komiya , Fumiyoshi Yoshioka , Hiroshi Iwata , Akira Takahashi
发明人： Tetsu Negishi , Akihide Shibata , Kenji Komiya , Fumiyoshi Yoshioka , Hiroshi Iwata , Akira Takahashi
IPC分类号： H01L33/08 , G02F1/136 , G02F1/13357 , H01L33/50 , H05B37/00
CPC分类号： G02F1/133603 , F21K9/00 , G02F1/133605 , G02F2001/133612 , G02F2001/133614 , G02F2001/133628 , H01L24/95 , H01L25/0753 , H01L33/06 , H01L33/18 , H01L33/20 , H01L33/38 , H01L33/62 , H01L2224/48091 , H01L2224/48227 , H01L2224/49107 , H01L2224/73265 , H01L2924/00013 , H01L2924/09701 , H01L2924/12036 , H01L2924/12041 , H01L2924/15787 , H01L2924/15788 , H01L2924/3025 , H01L2933/0041 , H01L2924/00 , H01L2924/00015 , H01L2924/00014 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599
摘要： A metal line 731 is formed in a linear area S of an insulative substrate 720, and moreover a metal line 732 is formed generally parallel to the metal line 731 with a specified distance thereto. The metal line 731 is connected to an n-type semiconductor core 701 of bar-like structure light-emitting elements 710A to 710D, and the metal line 732 is connected to a p-type semiconductor layer 702. By dividing the insulative substrate 720 into a plurality of divisional substrates, a plurality of light-emitting devices in each of which a plurality of bar-like structure light-emitting elements 710 are placed on the divisional substrates are formed.
摘要翻译：金属线731形成在绝缘基板720的线性区域S中，此外，金属线732与金属线731大致平行地形成有规定的距离。金属线731连接到棒状结构发光元件710A至710D的n型半导体芯701，并且金属线732连接到p型半导体层702.通过将绝缘衬底720分成形成多个分割基板，在分割基板上形成多个棒状结构发光元件710的多个发光元件。

28. 发明授权

US07405974B2 Semiconductor memory device, page buffer resource assigning method and circuit therefor, computer system and mobile electronic device 有权
标题翻译：半导体存储器件，页缓冲器资源分配方法及其电路，计算机系统和移动电子设备
公开(公告)号：US07405974B2
公开(公告)日：2008-07-29
申请号：US10848324
申请日：2004-05-19
申请人： Yoshifumi Yaoi , Yasuaki Iwase , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
发明人： Yoshifumi Yaoi , Yasuaki Iwase , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
IPC分类号： G11C16/00
CPC分类号： G11C16/10 , G11C7/10 , G11C7/1039 , G11C2207/2245
摘要： A semiconductor memory device includes a page buffer circuit and an arrangement of memory elements each including: a gate electrode provided on a semiconductor layer with an intervening gate insulating film; a channel region provided beneath the gate electrode; a diffusion area provided on both sides of the channel region, having an opposite polarity to the channel region; and a memory functioning member provided on both sides of the gate electrodes, having a function of storing electric charge. The page buffer circuit provides a common resource shared between a memory array controller and a user. The page buffer circuit has two planes containing random access memory arrays. The page buffer circuit also includes a mode control section to facilitate access to the planes over a main bus in user mode and access to the planes by the memory array controller in memory control mode.
摘要翻译：半导体存储器件包括页缓冲电路和存储元件的布置，每个存储元件包括：设置在具有中间栅极绝缘膜的半导体层上的栅电极; 设置在栅电极下方的沟道区; 扩散区，设置在沟道区的两侧，具有与沟道区相反的极性; 以及设置在栅电极两侧的具有存储电荷功能的记忆功能部件。页面缓冲电路提供了在存储器阵列控制器和用户之间共享的公共资源。页面缓冲电路具有包含随机存取存储器阵列的两个平面。页面缓冲电路还包括模式控制部分，以便以用户模式访问主总线上的平面并且以存储器控制模式通过存储器阵列控制器访问平面。

29. 发明授权

US07312499B2 Semiconductor storage device and manufacturing method therefor, semiconductor device, portable electronic equipment and IC card 有权
标题翻译：半导体存储器件及其制造方法，半导体器件，便携式电子设备和IC卡
公开(公告)号：US07312499B2
公开(公告)日：2007-12-25
申请号：US11414226
申请日：2006-05-01
申请人： Hiroshi Iwata , Takayuki Ogura , Akihide Shibata , Kouichirou Adachi
发明人： Hiroshi Iwata , Takayuki Ogura , Akihide Shibata , Kouichirou Adachi
IPC分类号： H01L29/792
CPC分类号： H01L27/11568 , G11C16/0491 , H01L21/28282 , H01L21/28291 , H01L21/76831 , H01L21/76897 , H01L27/115 , H01L29/42332 , H01L29/6656 , H01L29/66833 , H01L29/7887 , H01L29/7923 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor storage device includes a field effect transistor which has a gate insulator, a gate electrode and a pair of source/drain diffusion regions on a semiconductor substrate. The device also includes a coating film made of a dielectric having a function of storing electric charge and formed on the substrate in such a manner as to cover an upper surface and side surfaces of the gate electrode. The device further includes an interlayer insulator formed on and in contact with the coating film. The device still further includes contact members which extend vertically through the interlayer insulator and the coating film on the source/drain diffusion regions and which are electrically connected to the source/drain diffusion regions, respectively. The coating film and the interlayer insulator are made of materials which are selectively etchable to each other. Thus, the issues of overerase and read failures due to the overerase can be solved, and the device reliability can be enhanced.
摘要翻译：半导体存储装置包括在半导体衬底上具有栅极绝缘体，栅极电极和一对源极/漏极扩散区域的场效应晶体管。该装置还包括由电介质构成的涂膜，其具有存储电荷的功能，并以覆盖栅电极的上表面和侧表面的方式形成在基板上。该装置还包括形成在涂膜上并与涂膜接触的层间绝缘体。该装置还包括分别垂直延伸通过层间绝缘体和源极/漏极扩散区上的涂膜并且分别与源/漏扩散区电连接的接触构件。涂膜和层间绝缘体由可相互选择性地蚀刻的材料制成。因此，可以解决由于过度过热导致的过度读取和读取故障的问题，并且可以提高器件的可靠性。

30. 发明授权

US07271799B2 Display driver, display device, and portable electronic apparatus 有权
标题翻译：显示驱动器，显示设备和便携式电子设备
公开(公告)号：US07271799B2
公开(公告)日：2007-09-18
申请号：US10844567
申请日：2004-05-13
申请人： Hiroshi Iwata , Akihide Shibata
发明人： Hiroshi Iwata , Akihide Shibata
IPC分类号： G09G5/00
CPC分类号： H01L29/66833 , G09G3/20 , H01L21/28282 , H01L29/792
摘要： A display driver includes a display driving part for receiving image data and outputting a drive signal to a display panel; a nonvolatile memory part for storing control information for controlling output of the display driving part; and a control part for controlling output of the display driving part on the basis of the control information, wherein the nonvolatile memory part has a nonvolatile memory cell, and the nonvolatile memory cell includes a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having a function for retaining charges.
摘要翻译：显示驱动器包括用于接收图像数据并向显示面板输出驱动信号的显示驱动部分; 非易失性存储器部分，用于存储用于控制显示驱动部分的输出的控制信息; 以及控制部分，用于根据控制信息控制显示驱动部分的输出，其中非易失性存储器部分具有非易失性存储单元，并且非易失性存储单元包括通过栅极绝缘膜形成在半导体层上的栅电极设置在所述栅电极下方的沟道区域，设置在所述沟道区域的两侧且具有与沟道区域相反的导电类型的扩散区域，以及形成在所述栅极电极两侧的存储功能单元，保留费用。

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