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21. 发明授权

US07257033B2 Inverter non-volatile memory cell and array system 有权
标题翻译：逆变器非易失性存储单元和阵列系统
公开(公告)号：US07257033B2
公开(公告)日：2007-08-14
申请号：US11084214
申请日：2005-03-17
申请人： Bin Wang , Chih-Hsin Wang , William T. Colleran
发明人： Bin Wang , Chih-Hsin Wang , William T. Colleran
IPC分类号： G11C16/04
CPC分类号： G11C16/10
摘要： NVM arrays include rows and columns of NVM cells comprising a floating gate, dual transistor, inverter storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each row of NVM cells may be used to control the supply voltage.
摘要翻译： NVM阵列包括包括浮动栅极，双晶体管，逆变器存储元件的NVM单元的行和列。在编程和擦除模式期间，所选存储元件的电源电压关闭。可以使用每个NVM单元或每行NVM单元的隔离晶体管来控制电源电压。

22. 发明授权

US07061324B2 Use of analog-valued floating-gate transistors for parallel and serial signal processing 有权
公开(公告)号：US07061324B2
公开(公告)日：2006-06-13
申请号：US11055959
申请日：2005-02-10
申请人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
发明人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
IPC分类号： H03F3/16
CPC分类号： H03F3/211 , H01L27/115 , H01L27/11521 , H01L27/11558 , H03F1/30 , H03F1/301 , H03F3/16 , H03F3/45744 , H03F2200/174 , H03F2203/45121 , H03F2203/45341 , H03F2203/45474 , H03F2203/45661 , H03G1/007
摘要： Analog-valued floating-gate transistors are used as trimmable circuit components for modifying and/or controlling the gain, phase, offset, frequency response, current consumption, and/or transfer function of signal pathways in parallel and/or serial processing circuits in radio frequency, analog, or mixed-signal integrated circuits.

23. 发明授权

US07038544B2 Use of analog-valued floating-gate transistors for parallel and serial signal processing 有权
标题翻译：使用模拟值浮栅晶体管进行并行和串行信号处理
公开(公告)号：US07038544B2
公开(公告)日：2006-05-02
申请号：US11055948
申请日：2005-02-10
申请人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
发明人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
IPC分类号： H03G3/30
CPC分类号： H03F3/211 , H01L27/115 , H01L27/11521 , H01L27/11558 , H03F1/30 , H03F1/301 , H03F3/16 , H03F3/45744 , H03F2200/174 , H03F2203/45121 , H03F2203/45341 , H03F2203/45474 , H03F2203/45661 , H03G1/007
摘要： Analog-valued floating-gate transistors are used as trimmable circuit components for modifying and/or controlling the gain, phase, offset, frequency response, current consumption, and/or transfer function of signal pathways in parallel and/or serial processing circuits in radio frequency, analog, or mixed-signal integrated circuits.
摘要翻译：模拟值浮栅晶体管用作可调节电路组件，用于修改和/或控制无线电中的并行和/或串行处理电路中的信号通路的增益，相位，偏移，频率响应，电流消耗和/或传递函数频率，模拟或混合信号集成电路。

24. 发明授权

US06958646B1 Autozeroing floating-gate amplifier 有权
标题翻译：自动调零浮栅放大器
公开(公告)号：US06958646B1
公开(公告)日：2005-10-25
申请号：US10447684
申请日：2003-05-28
申请人： William T. Colleran , Todd E. Humes , Christopher J. Diorio
发明人： William T. Colleran , Todd E. Humes , Christopher J. Diorio
IPC分类号： H03F1/02 , H03F1/30
CPC分类号： H03F1/30
摘要： An autozeroing floating-gate amplifier (AFGA) is implemented utilizing a programmable gain element, the characteristics of which may be changed by changing the amount of charge stored on a floating gate device.
摘要翻译：利用可编程增益元件实现自动调零浮栅放大器（AFGA），其可以通过改变存储在浮动栅极器件上的电荷量来改变其特性。

25. 发明授权

US07403122B1 RFID tag circuits operable at different speeds 有权
标题翻译： RFID标签电路以不同的速度工作
公开(公告)号：US07403122B1
公开(公告)日：2008-07-22
申请号：US11707509
申请日：2007-02-15
申请人： Ronald Lee Koepp , Alberto Pesavento , William T. Colleran
发明人： Ronald Lee Koepp , Alberto Pesavento , William T. Colleran
IPC分类号： G08B13/14
CPC分类号： G06K19/0723
摘要： Embodiments of RFID tag circuits and methods are described, which include a chip having a clock circuit operable to generate a clock signal having different frequencies, and one or more components operable to work at the different frequencies. In addition to a regular frequency, at least one higher frequency is possible, which is enabled in situations where a reader is known to be close to the chip. The proximity ensures that the chip generates reliably more power, which enables its operation at the higher speed.
摘要翻译：描述了RFID标签电路和方法的实施例，其包括具有可操作以产生具有不同频率的时钟信号的时钟电路的芯片，以及可操作以在不同频率工作的一个或多个组件。除了规则的频率之外，至少有一个较高的频率是可能的，这在读取器已知靠近芯片的情况下是有效的。接近确保芯片可靠地产生更多的功率，这使得其能够以更高的速度运行。

26. 发明授权

US07389101B2 Use of analog-valued floating-gate transistors for parallel and serial signal processing 有权
标题翻译：使用模拟值浮栅晶体管进行并行和串行信号处理
公开(公告)号：US07389101B2
公开(公告)日：2008-06-17
申请号：US11055958
申请日：2005-02-10
申请人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
发明人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
IPC分类号： H04B1/16 , H04B1/10
CPC分类号： H03F3/211 , H01L27/115 , H01L27/11521 , H01L27/11558 , H03F1/30 , H03F1/301 , H03F3/16 , H03F3/45744 , H03F2200/174 , H03F2203/45121 , H03F2203/45341 , H03F2203/45474 , H03F2203/45661 , H03G1/007
摘要： Analog-valued floating-gate transistors are used as trimmable circuit components for modifying and/or controlling the gain, phase, offset, frequency response, current consumption, and/or transfer function of signal pathways in parallel and/or serial processing circuits in radio frequency, analog, or mixed-signal integrated circuits.
摘要翻译：模拟值浮栅晶体管用作可调节电路组件，用于修改和/或控制无线电中的并行和/或串行处理电路中的信号通路的增益，相位，偏移，频率响应，电流消耗和/或传递函数频率，模拟或混合信号集成电路。

27. 发明授权

US07038603B2 Analog to digital converter using analog-valued floating-gate transistors 有权
标题翻译：使用模拟值浮栅晶体管的模数转换器
公开(公告)号：US07038603B2
公开(公告)日：2006-05-02
申请号：US11055947
申请日：2005-02-10
申请人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
发明人： Christopher J. Diorio , Todd E. Humes , Ronald A. Oliver , William T. Colleran , Scott A. Cooper
IPC分类号： H03M1/00
CPC分类号： H03F3/211 , H01L27/115 , H01L27/11521 , H01L27/11558 , H03F1/30 , H03F1/301 , H03F3/16 , H03F3/45744 , H03F2200/174 , H03F2203/45121 , H03F2203/45341 , H03F2203/45474 , H03F2203/45661 , H03G1/007
摘要： Analog-valued floating-gate transistors are used as trimmable circuit components for modifying and/or controlling the gain, phase, offset, frequency response, current consumption, and/or transfer function of signal pathways in parallel and/or serial processing circuits in radio frequency, analog, or mixed-signal integrated circuits.
摘要翻译：模拟值浮栅晶体管用作可调节电路组件，用于修改和/或控制无线电中的并行和/或串行处理电路中的信号通路的增益，相位，偏移，频率响应，电流消耗和/或传递函数频率，模拟或混合信号集成电路。

28. 发明授权

US5376937A Folding circuit 失效
标题翻译：折叠电路
公开(公告)号：US5376937A
公开(公告)日：1994-12-27
申请号：US20477
申请日：1993-02-22
申请人： William T. Colleran , Asad A. Abidi
发明人： William T. Colleran , Asad A. Abidi
IPC分类号： H03M1/06 , H03M1/36
CPC分类号： H03M1/0682 , H03M1/141
摘要： A folding circuit includes a differential resistance ladder and a plurality of comparators coupled to the differential resistance ladder in a manner which substantially reduces capacitive loading on the differential ladder. In addition, the folding circuit has a minimum number of output resistors to facilitate resistor matching for precision outputs. In another aspect of the invention, the folding circuit has a replica gain matching circuit which includes a replica comparator of predetermined size, which is coupled to a replica differential ladder at a predetermined location so as to replicate the currents drawn by the comparators coupled to the main differential resistance ladder for precise gain matching.
摘要翻译：折叠电路包括差分电阻梯和多个比较器，其以大大降低差分梯的容性负载的方式耦合到差分电阻梯。此外，折叠电路具有最小数量的输出电阻，以便于精确输出的电阻匹配。在本发明的另一方面，折叠电路具有复制增益匹配电路，其包括预定尺寸的复制比较器，其在预定位置处耦合到复制子梯，以便复制由耦合到主差分电阻梯，用于精确增益匹配。

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