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21. 发明授权

US5525939A Recirculating delay line digital pulse generator having high control proportionality 失效
标题翻译：具有高控制比例的再循环延迟线数字脉冲发生器
公开(公告)号：US5525939A
公开(公告)日：1996-06-11
申请号：US501269
申请日：1995-07-12
申请人： Shigenori Yamauchi , Takamoto Watanabe
发明人： Shigenori Yamauchi , Takamoto Watanabe
IPC分类号： H03K3/03 , H03K5/135 , H03B5/24 , H03K3/012 , H03K3/027
CPC分类号： H03K3/0315 , H03K5/135
摘要： In a digital control pulse generator including a ring oscillator composed of multiple inversion circuits connected in a ring for circulating a pulse, a counter and selectors which turn data of a flip-flop to high when a counted value of the pulse from a terminal of the ring oscillator becomes a value corresponding to ten high order bits of control data, a pulse selector for taking out a clock of the flip-flop from the inversion circuit at the position specified by four bit control data and a delay line and logical product circuit which turn an output signal of the system to a high level for a predetermined time when the output of the flip-flop turns high, a register and adder accumulate the four low order bits of the control data every time the output signal turns high to update the data four bit data. As a result, the ring oscillator may be continuously operated and an oscillation cycle proportional to the control data may be set.
摘要翻译：在包括环形振荡器的数字控制脉冲发生器中，所述环形振荡器由连接在环中以循环脉冲的多个反相电路组成，计数器和选择器将触发器的数据值从环形振荡器成为对应于控制数据的十个高位位的值，用于在由四位控制数据指定的位置处的反相电路中取出触发器的时钟的脉冲选择器和延迟线以及逻辑积电路，当触发器的输出变为高电平时，将系统的输出信号转换到高电平达预定时间，寄存器和加法器在每当输出信号变为高电平时累积控制数据的四个低位，以更新数据四位数据。结果，可以连续地操作环形振荡器，并且可以设置与控制数据成比例的振荡周期。

22. 发明授权

US5477196A Pulse generator 失效
标题翻译：脉冲发生器
公开(公告)号：US5477196A
公开(公告)日：1995-12-19
申请号：US362648
申请日：1994-12-23
申请人： Shigenori Yamauchi , Takamoto Watanabe
发明人： Shigenori Yamauchi , Takamoto Watanabe
IPC分类号： G01R25/00 , G01R25/08 , G01R29/02 , H03K3/03 , H03K3/354 , H03K5/00 , H03K5/135 , H03K5/26 , H03L7/06 , H03L7/085 , H03B27/00 , H03L7/083 , H03L7/18
CPC分类号： H03K3/0315 , H03K5/135
摘要： In a device for encoding a pulse phase difference or controlling an oscillation frequency based on delayed signals sequentially output by a delay circuit, the encoding of a pulse phase difference or the oscillation control can be simultaneously performed using a single delay device. There is provided a frequency converter including a ring oscillator consisting of inverting circuits interconnected in the form of a ring, a pulse phase difference encoding circuit for encoding the cycle of a reference signal into a binary digital value based on a pulse output by the ring oscillator, an arithmetic circuit for multiplying or dividing the binary digital value by a predetermined value to generate control data and a digitally controlled oscillation circuit for generating a pulse signal in a cycle in accordance with the control data based on the pulse output by the ring oscillator, the ring oscillator being shared by the encoding circuit and oscillation circuit. This makes the time resolution of the encoding and oscillation circuits constant, thereby allowing accurate frequency conversion.
摘要翻译：在根据由延迟电路顺序输出的延迟信号对脉冲相位差进行编码或控制振荡频率的装置中，可以使用单个延迟装置同时进行脉冲相位差的编码或振荡控制。提供了一种变频器，包括由环形互连的反相电路构成的环形振荡器，用于基于环形振荡器输出的脉冲将参考信号的周期编码为二进制数字值的脉冲相位差编码电路，用于将二进制数字值乘以预定值以产生控制数据的运算电路和用于根据由环形振荡器输出的脉冲输出的控制数据在一个周期内产生脉冲信号的数字控制振荡电路，环形振荡器由编码电路和振荡电路共享。这使得编码和振荡电路的时间分辨率恒定，从而允许精确的频率转换。

23. 发明授权

US08847810B2 Pulse phase difference coding circuit 有权
标题翻译：脉冲相位差编码电路
公开(公告)号：US08847810B2
公开(公告)日：2014-09-30
申请号：US13312168
申请日：2011-12-06
申请人： Shigenori Yamauchi
发明人： Shigenori Yamauchi
IPC分类号： H03M1/60 , G08C19/12
CPC分类号： G08C19/12
摘要： In a pulse phase difference coding circuit, a count unit includes a plurality of partial counters connected to each other in series so that the most significant bit of an output of the previous stage serves as an operation clock of the subsequent stage. A circulation number detecting unit includes a first latch circuit which is provided for each of the partial counters and latches an output of the partial counter according to a pulse for measurement, and a first delay circuit which treats the partial counter in the second stage or later as an object counter and delays the pulse for measurement by a total delay time in all the partial counters located at the previous stages of the object counter. The pulse for measurement is inputted into the first latch circuit which latches an output of the object counter.
摘要翻译：在脉冲相位差编码电路中，计数单元包括彼此串联连接的多个部分计数器，使得前一级的输出的最高有效位用作后级的操作时钟。循环号检测单元包括为每个部分计数器提供的第一锁存电路，并根据用于测量的脉冲锁存部分计数器的输出;以及第一延迟电路，其在第二级或更后级中处理部分计数器作为对象计数器，并且在对象计数器的前一级的所有部分计数器中将用于测量的脉冲延迟总延迟时间。用于测量的脉冲被输入到锁存对象计数器的输出的第一锁存电路。

24. 发明授权

US08307320B2 Method of placing delay units of pulse delay circuit on programmable logic device 有权
标题翻译：在可编程逻辑器件上放置脉冲延迟电路的延迟单元的方法
公开(公告)号：US08307320B2
公开(公告)日：2012-11-06
申请号：US12661156
申请日：2010-03-11
申请人： Tomohito Terazawa , Shigenori Yamauchi , Takamoto Watanabe
发明人： Tomohito Terazawa , Shigenori Yamauchi , Takamoto Watanabe
IPC分类号： G06F17/50 , H03H11/26
CPC分类号： H03K19/17736 , H03K19/17728
摘要： A method of placing delay units of a pulse delay circuit on a programmable logic device having logic cells in each of cell strings has a step of arranging each delay unit in one logic cell of the device such that the delay units are placed in respective specific cell strings aligned in a row direction and a step of serially connecting the delay units with one another as a straight delay line such that the delay units placed in the specific cell strings in the connecting order are aligned in the row direction. In the device, an inter-string transmission delay time on a line between two logic cells of different cell strings differs from an intra-string transmission delay time on a line between two logic cells of one cell string.
摘要翻译：将脉冲延迟电路的延迟单元放置在具有每个单元串中的逻辑单元的可编程逻辑器件上的方法具有将每个延迟单元布置在器件的一个逻辑单元中的步骤，使得延迟单元放置在相应的特定单元中在行方向排列的串和将延迟单元串联连接的直线延迟线的步骤，使得以连接顺序放置在特定单元串中的延迟单元在行方向上对齐。在该装置中，不同单元串的两个逻辑单元之间的行上的串间传输延迟时间与一个单元串的两个逻辑单元之间的一行上的串内传输延迟时间不同。

25. 发明申请

US20120139772A1 PULSE PHASE DIFFERENCE CODING CIRCUIT 有权
标题翻译：脉冲相位差编码电路
公开(公告)号：US20120139772A1
公开(公告)日：2012-06-07
申请号：US13312168
申请日：2011-12-06
申请人： Shigenori Yamauchi
发明人： Shigenori Yamauchi
IPC分类号： G08C19/12
CPC分类号： G08C19/12
摘要： In a pulse phase difference coding circuit, a count unit includes a plurality of partial counters connected to each other in series so that the most significant bit of an output of the previous stage serves as an operation clock of the subsequent stage. A circulation number detecting unit includes a first latch circuit which is provided for each of the partial counters and latches an output of the partial counter according to a pulse for measurement, and a first delay circuit which treats the partial counter in the second stage or later as an object counter and delays the pulse for measurement by a total delay time in all the partial counters located at the previous stages of the object counter. The pulse for measurement is inputted into the first latch circuit which latches an output of the object counter.
摘要翻译：在脉冲相位差编码电路中，计数单元包括彼此串联连接的多个部分计数器，使得前一级的输出的最高有效位用作后级的操作时钟。循环号检测单元包括为每个部分计数器提供的第一锁存电路，并根据用于测量的脉冲锁存部分计数器的输出;以及第一延迟电路，其在第二级或更后级中处理部分计数器作为对象计数器，并且在对象计数器的前一级的所有部分计数器中将用于测量的脉冲延迟总延迟时间。用于测量的脉冲被输入到锁存对象计数器的输出的第一锁存电路。

26. 发明授权

US07825696B2 Even-number-stage pulse delay device 有权
标题翻译：偶数级脉冲延时器
公开(公告)号：US07825696B2
公开(公告)日：2010-11-02
申请号：US12653664
申请日：2009-12-16
申请人： Takamoto Watanabe , Shigenori Yamauchi
发明人： Takamoto Watanabe , Shigenori Yamauchi
IPC分类号： H03K19/00
CPC分类号： H03K3/0315
摘要： The even-number-stage pulse delay includes a ring delay line constituted of an even number of inverter circuits connected in a ring around which main edge and a reset edge circulate together. The even-number-stage pulse delay is provided with an operation monitoring section configured to detect whether or not the main and reset edges are circulating around the ring delay line.
摘要翻译：偶数级脉冲延迟包括由连续在主边缘和复位边缘一起循环的环中的偶数个反相器电路构成的环形延迟线。偶数阶段脉冲延迟设置有操作监视部分，其被配置为检测主和复位边沿是否在环延迟线周围循环。

27. 发明申请

US20100156468A1 Even-number-stage pulse delay device 有权
公开(公告)号：US20100156468A1
公开(公告)日：2010-06-24
申请号：US12653664
申请日：2009-12-16
申请人： Takamoto Watanabe , Shigenori Yamauchi
发明人： Takamoto Watanabe , Shigenori Yamauchi
IPC分类号： H03K19/20 , H03H11/26
CPC分类号： H03K3/0315
摘要： The even-number-stage pulse delay includes a ring delay line constituted of an even number of inverter circuits connected in a ring around which main edge and a reset edge circulate together. The even-number-stage pulse delay is provided with an operation monitoring section configured to detect whether or not the main and reset edges are circulating around the ring delay line.

28. 发明授权

US07741986B2 Method for controlling delay time of pulse delay circuit and pulse delay circuit thereof 有权
标题翻译：用于控制脉冲延迟电路的延迟时间及其脉冲延迟电路的方法
公开(公告)号：US07741986B2
公开(公告)日：2010-06-22
申请号：US12292761
申请日：2008-11-25
申请人： Takamoto Watanabe , Shigenori Yamauchi
发明人： Takamoto Watanabe , Shigenori Yamauchi
IPC分类号： H03M1/60
CPC分类号： H03K5/133
摘要： An inverter circuit configuring a delay unit is a so-called CMOS transistor including a PMOS transistor and an NMOS transistor, of which respective gates are interconnected and respective drains are interconnected. The source and a back gate of the NMOS transistor are connected to the ground. The source of the PMOS transistor is connected to a positive drive terminal and controlled by an analog input signal. The back gate of the PMOS transistor is connected to a control terminal and controlled by a control signal.
摘要翻译：配置延迟单元的逆变器电路是所谓的CMOS晶体管，其包括PMOS晶体管和NMOS晶体管，其中相应的栅极互连并且相应的漏极互连。 NMOS晶体管的源极和背栅极连接到地。 PMOS晶体管的源极连接到正极驱动端子并由模拟输入信号控制。 PMOS晶体管的背栅极连接到控制端子并由控制信号控制。

29. 发明申请

US20060157651A1 Infrared sensor having no package can 失效
标题翻译：没有包装的红外线传感器可以
公开(公告)号：US20060157651A1
公开(公告)日：2006-07-20
申请号：US11299726
申请日：2005-12-13
申请人： Shigenori Yamauchi , Tiaki Mizuno
发明人： Shigenori Yamauchi , Tiaki Mizuno
IPC分类号： G01J5/00
CPC分类号： H01L31/0203 , G01J5/04 , G01J5/045 , G01J5/08 , G01J5/0862 , H01L2224/8592 , H01L2924/10155 , H01L2224/48091 , H01L2924/00014
摘要： An infrared sensor is composed of an optical filter plate, an infrared-detecting plate and a supporting member positioned between both plates. A detecting element for detecting infrared rays passing through the optical filter plate is formed on a front surface of the infrared-detecting plate facing the optical filter plate. The supporting member is positioned to surround the detector element on the infrared-detecting plate to firmly connect both plates and to form a predetermined gap between both plates. The supporting member may be composed of a number of discrete dots positioned to surround the detector element or of a continuous ring surrounding the detector element.
摘要翻译：红外传感器由光学滤板，红外线检测板和位于两个板之间的支撑构件组成。在红外线检测板的面向光学滤光板的前表面上形成有用于检测通过滤光板的红外线的检测元件。支撑构件被定位成围绕红外线检测板上的检测器元件以牢固地连接两个板并且在两个板之间形成预定的间隙。支撑构件可以由定位成包围检测器元件或围绕检测器元件的连续环的多个离散点构成。

30. 发明申请

US20050189952A1 Ratation angle sensor 审中-公开
标题翻译：鼠标角传感器
公开(公告)号：US20050189952A1
公开(公告)日：2005-09-01
申请号：US11061473
申请日：2005-02-22
申请人： Takashi Ejima , Yasuaki Makino , Shigenori Yamauchi
发明人： Takashi Ejima , Yasuaki Makino , Shigenori Yamauchi
IPC分类号： G01D5/24 , G01B7/30 , G01C1/00 , G01D5/14 , G01D5/241 , G01R27/26
CPC分类号： G01D5/2412
摘要： A rotation angle sensor including a variable capacitor and a C-V converting circuit, wherein the variable capacitor has a detected object fastened and fixed to its shaft, a planar shape of a movable electrode is set so that an area of overlapping parts of electrodes changes linearly with respect to a change of the rotation angle of the movable electrode, a voltage signal of the C-V converting circuit corresponds to the change of the electrostatic capacity of the variable capacitor with respect to the fixed capacitor, and consequently the voltage signal of the C-V converting circuit (detection signal) can be made to change linearly with respect to broad changes of the rotation angle of the detected object (0° to 270°).
摘要翻译：一种包括可变电容器和CV转换电路的旋转角度传感器，其中可变电容器具有被固定并固定在其轴上的检测对象，可动电极的平面形状被设定为使得电极的重叠部分的面积与对于可移动电极的旋转角度的改变，CV转换电路的电压信号对应于可变电容器相对于固定电容器的静电电容的变化，因此CV变换电路的电压信号（检测信号）可以相对于检测对象的旋转角度（0°至270°）的广泛变化而线性地改变。

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