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21. 发明申请

US20160070934A1 MEMORY CONTROLLER 审中-公开
标题翻译：内存控制器
公开(公告)号：US20160070934A1
公开(公告)日：2016-03-10
申请号：US14784038
申请日：2013-04-29
申请人： Juergen FRANK , Michael STAUDENMAIER , Manfred THANNER
发明人： JUERGEN FRANK , MICHAEL STAUDENMAIER , MANFRED THANNER
IPC分类号： G06F21/79 , G06F21/64 , G06F12/02 , G06F21/44 , G06F21/62 , G06F12/14
CPC分类号： G06F21/79 , G06F12/0246 , G06F12/1458 , G06F21/44 , G06F21/572 , G06F21/6218 , G06F21/64 , G06F2212/1052
摘要： A memory controller used to verify authenticity of data stored in a first memory unit. The memory controller includes a secure memory unit which stores a pre-stored value representative of the authenticity of the data to be written in the first memory unit. A processing system calculates a value which is representative of the data in the first memory unit after a write cycle. The calculation of the calculated value is triggered by the write cycle. The calculated value is compared with the pre-stored value in order to verify whether the data stored in the first memory unit after the write cycle has been altered in accordance with the authenticity. By comparing the calculated value with the pre-stored value authenticity of the data stored in the first memory unit after the write cycle is verified, thus preventing the memory controller from operating in case the data written to the first memory unit is not authentic.
摘要翻译：用于验证存储在第一存储器单元中的数据的真实性的存储器控制器。存储器控制器包括一个安全存储器单元，其存储表示要写入第一存储器单元的数据的真实性的预先存储的值。处理系统在写入周期之后计算代表第一存储器单元中的数据的值。计算值的计算由写周期触发。将计算出的值与预先存储的值进行比较，以便根据真实性来验证在写入周期之后存储在第一存储器单元中的数据是否已被改变。通过将经计算的值与存储在第一存储器单元中的数据的预存值真实性进行比较，在写周期被验证之后，因此在写入第一存储器单元的数据不可信的情况下防止存储器控制器操作。

22. 发明申请

US20150245116A1 AUDIO UNIT AND METHOD FOR GENERATING A SAFETY CRITICAL AUDIO SIGNAL 有权
标题翻译：用于产生安全关键音频信号的音频单元和方法
公开(公告)号：US20150245116A1
公开(公告)日：2015-08-27
申请号：US14423478
申请日：2012-08-24
申请人： Michael Staudenmaier , Vincent Aubineau , Davor Bogavac
发明人： Michael Staudenmaier , Vincent Aubineau , Davor Bogavac
IPC分类号： H04R1/00 , G08B3/00
CPC分类号： H04R1/00 , B60Q9/00 , G08B1/08 , G08B3/00 , G08B3/10 , G08B29/126 , H04R5/04 , H04R29/001 , H04R29/007 , H04R2225/41
摘要： An audio unit, connected or connectable to a safety-critical apparatus, or integrated or integrable in the apparatus, is proposed. The audio unit may comprise a driver unit, a detection unit, and an alert unit. The driver unit may generate an analog audio signal in response to a request from the apparatus, to drive an acoustic output unit and thereby generate an acoustic signal for a user of the apparatus. The detection unit may detect the audio signal. The alert unit may generate an alert signal in response to the request if the detection unit has not detected the audio signal. It can thus be checked whether the acoustic signal is generated. A method for generating a safety critical acoustic signal is also described.
摘要翻译：提出了连接或可连接到安全关键设备的音频单元，或者在该装置中集成或可集成的音频单元。音频单元可以包括驱动器单元，检测单元和警报单元。驱动器单元可以响应于来自设备的请求而产生模拟音频信号，以驱动声输出单元，从而为该设备的用户生成声信号。检测单元可以检测音频信号。如果检测单元没有检测到音频信号，则警报单元可以响应于该请求而生成警报信号。因此可以检查是否产生声信号。还描述了一种用于产生安全关键声信号的方法。

23. 发明申请

US20150208022A1 DISPLAY CONTROL UNIT AND METHOD FOR GENERATING A VIDEO SIGNAL 有权
标题翻译：显示控制单元和产生视频信号的方法
公开(公告)号：US20150208022A1
公开(公告)日：2015-07-23
申请号：US14421894
申请日：2012-08-24
申请人： Michael Staudenmaier , Kshitij Bajaj , Mehul Kumar , Sarthak Mittal
发明人： Michael Staudenmaier , Kshitij Bajaj , Mehul Kumar , Sarthak Mittal
IPC分类号： H04N5/91 , H04N5/04 , H04N5/265
CPC分类号： H04N5/91 , G06T1/60 , G09G5/001 , G09G5/393 , G09G2320/103 , G09G2360/10 , G09G2380/10 , H04N5/04 , H04N5/265
摘要： A display control unit is connected to a display and arranged to generate a video signal representing a sequence of video frames to be displayed consecutively on said display. The display control unit may include a first memory unit arranged to buffer a set of image descriptors; a second memory unit connected between said first memory unit and said display; an update unit connected to said first memory unit and arranged to update said image descriptors in said first memory unit and to generate a proceed signal only when said set of image descriptors in said first memory unit is up to date; a copy unit arranged to copy said image descriptors from said first memory unit to said second memory unit in response to said proceed signal; and a video unit arranged to generate said video signal on the basis of said image descriptors in said second memory unit.
摘要翻译：显示控制单元连接到显示器并且被布置为产生表示要在所述显示器上连续显示的视频帧序列的视频信号。显示控制单元可以包括布置成缓冲一组图像描述符的第一存储器单元; 连接在所述第一存储单元和所述显示器之间的第二存储单元; 更新单元，连接到所述第一存储器单元并且被布置为仅在所述第一存储器单元中的所述图像描述符集合是最新的时候更新所述第一存储器单元中的所述图像描述符并且产生进行信号; 复制单元，被配置为响应于所述进行信号将所述图像描述符从所述第一存储器单元复制到所述第二存储器单元; 以及视频单元，被配置为基于所述第二存储器单元中的所述图像描述符生成所述视频信号。

24. 发明申请

US20150109330A1 DISPLAY CONTROLLER WITH BLENDING STAGE 有权
标题翻译：显示控制器与混合阶段
公开(公告)号：US20150109330A1
公开(公告)日：2015-04-23
申请号：US14394682
申请日：2012-04-20
申请人： Michael Staudenmaier , Vincent Aubineau , Davor Bogavac
发明人： Michael Staudenmaier , Vincent Aubineau , Davor Bogavac
IPC分类号： G06T11/60 , G06T1/60
CPC分类号： G06T11/60 , G06T1/60 , G06T2207/20221 , H04N21/234327 , H04N21/42653
摘要： A display controller comprising a blending stage and a blending controller. The blending stage is provided for blending multiple image layers into one display output image and comprises a plurality of input channels for receiving pixel data for the multiple image layers. The blending stage further comprises multiple blenders for combining the pixel data received by at least two input channels of the plurality of input channels. The blending controller is coupled to the blending stage for controlling operation of the blending stage. The blending stage further comprises a controllable switch for coupling an output of at least one blender of the multiple blenders to a display output of the blending stage for regular on-the-fly blending or to an offline blending memory for storing a result of an offline blending task. The blending controller comprises an input for receiving layer data describing locations and/or properties of the multiple image layers and a predictor for, based on the layer data, predicting an availability of the at least one blender. The blending controller is further operative to control the blending stage to perform the offline blending task in dependence of the predicted availability
摘要翻译：一种显示控制器，包括混合台和混合控制器。提供混合阶段用于将多个图像层混合成一个显示输出图像，并且包括用于接收多个图像层的像素数据的多个输入通道。混合阶段还包括多个混合器，用于组合由多个输入通道中的至少两个输入通道接收的像素数据。混合控制器耦合到混合阶段以控制混合阶段的操作。混合阶段还包括可控开关，用于将多个搅拌器的至少一个搅拌器的输出耦合到用于常规飞行混合的混合阶段的显示输出，或者用于存储离线结果的离线混合存储器混合任务。混合控制器包括用于接收描述多个图像层的位置和/或属性的层数据的输入，以及用于基于层数据预测至少一个搅拌器的可用性的预测器。混合控制器进一步操作以根据预测的可用性来控制混合阶段来执行离线混合任务

25. 发明授权

US10534455B2 Visual display content source identifier and method 有权
公开(公告)号：US10534455B2
公开(公告)日：2020-01-14
申请号：US14897714
申请日：2013-06-19
申请人： Michael Staudenmaier , Vincent Aubineau , Daniele Dall' Acqua
发明人： Michael Staudenmaier , Vincent Aubineau , Daniele Dall' Acqua
IPC分类号： G06F3/041 , G06T1/60 , G06T11/60
摘要： The invention provides an apparatus and method which allows identification of the system which provided images for each pixel of a touchscreen display which displays merged images of arbitrary shapes supplied from a plurality of systems. It further allows routing of user inputs to the appropriate system for further processing. Colour keying may be used to superimpose one image onto another. The invention finds particular application in the automotive field where images produced by an infotainment system may be merged with those produced by a mobile phone onto the in-vehicle display screen.

26. 发明授权

US09900548B2 Display control unit and method for generating a video signal 有权
公开(公告)号：US09900548B2
公开(公告)日：2018-02-20
申请号：US14421894
申请日：2012-08-24
申请人： Michael Staudenmaier , Kshitij Bajaj , Mehul Kumar , Sarthak Mittal
发明人： Michael Staudenmaier , Kshitij Bajaj , Mehul Kumar , Sarthak Mittal
IPC分类号： G06F13/00 , H04N5/91 , G09G5/393 , G06T1/60 , H04N5/04 , H04N5/265 , G09G5/00
CPC分类号： H04N5/91 , G06T1/60 , G09G5/001 , G09G5/393 , G09G2320/103 , G09G2360/10 , G09G2380/10 , H04N5/04 , H04N5/265
摘要： A display control unit is connected to a display and arranged to generate a video signal representing a sequence of video frames to be displayed consecutively on said display. The display control unit may include a first memory unit arranged to buffer a set of image descriptors; a second memory unit connected between said first memory unit and said display; an update unit connected to said first memory unit and arranged to update said image descriptors in said first memory unit and to generate a proceed signal only when said set of image descriptors in said first memory unit is up to date; a copy unit arranged to copy said image descriptors from said first memory unit to said second memory unit in response to said proceed signal; and a video unit arranged to generate said video signal on the basis of said image descriptors in said second memory unit.

27. 发明授权

US09892088B2 Data processing system and method of controlling access to a shared memory unit 有权
公开(公告)号：US09892088B2
公开(公告)日：2018-02-13
申请号：US14358049
申请日：2011-11-24
申请人： Michael Staudenmaier , Yossi Amon , Vincent Aubineau
发明人： Michael Staudenmaier , Yossi Amon , Vincent Aubineau
IPC分类号： G06F3/00 , G06F5/00 , G06F15/173 , G06F9/50 , G06F12/084
CPC分类号： G06F15/17331 , G06F9/5083 , G06F12/084
摘要： A data processing system comprising at least a memory unit, a first client connected to the memory unit, and a second client connected to the memory unit is proposed. The first client may comprise a first memory access unit and an information unit. The first memory access unit may read data from or write data to the memory unit at a first data rate. The information unit may update internal data correlating with a minimum required value of the first data rate. The second client may comprise a second memory access unit and a data rate limiting unit. The second memory access unit may read data from or write data to the memory unit at a second data rate. The data rate limiting unit may limit the second data rate in dependence on the internal data. The first memory access unit may, for example, read data packets sequentially from the memory unit, and the information unit may update the internal data at least per data packet. A method of controlling access to a shared memory unit is also proposed.

28. 发明申请

US20140300615A1 MEMORY ACCESS CONTROLLER, DATA PROCESSING SYSTEM, AND METHOD FOR MANAGING DATA FLOW BETWEEN A MEMORY UNIT AND A PROCESSING UNIT 审中-公开
标题翻译：存储器访问控制器，数据处理系统和用于管理存储单元和处理单元之间的数据流的方法
公开(公告)号：US20140300615A1
公开(公告)日：2014-10-09
申请号：US14358051
申请日：2011-11-24
申请人： Michael Staudenmaier , Vincent Aubineau , Juergen Frank
发明人： Michael Staudenmaier , Vincent Aubineau , Juergen Frank
IPC分类号： G09G5/395 , G09G5/36
CPC分类号： G09G5/395 , G06F13/1668 , G09G5/363 , G09G2360/10
摘要： A memory access controller for managing data flow between a memory unit and a processing unit is described. The memory access controller comprises an addressing unit and an unpacking unit. The addressing unit may receive an address from said processing unit and select a data location within said memory unit in dependence on that address. The unpacking unit may read a first word from the selected data location, unpack the first word into a second word by applying a data conversion scheme which depends on the received address, and provide the second word to the processing unit. The data conversion scheme may comprise, for at least one possible address, a pixel format conversion. A data processing system and a method are also proposed.
摘要翻译：描述了一种用于管理存储器单元和处理单元之间的数据流的存储器存取控制器。存储器访问控制器包括寻址单元和拆包单元。寻址单元可以从所述处理单元接收地址，并根据该地址在所述存储器单元内选择数据位置。解包单元可以从所选择的数据位置读取第一个字，通过应用取决于接收到的地址的数据转换方案将第一个字解码成第二个字，并将第二个字提供给处理单元。对于至少一个可能的地址，数据转换方案可以包括像素格式转换。还提出了一种数据处理系统和方法。

29. 发明申请

US20140289357A1 DATA PROCESSING SYSTEM AND METHOD OF CONTROLLING ACCESS TO A SHARED MEMORY UNIT 有权
标题翻译：数据处理系统和控制访问共享存储单元的方法
公开(公告)号：US20140289357A1
公开(公告)日：2014-09-25
申请号：US14358049
申请日：2011-11-24
申请人： Michael Staudenmaier , Yossi Amon , Vincent Aubineau
发明人： Michael Staudenmaier , Yossi Amon , Vincent Aubineau
IPC分类号： G06F15/173
CPC分类号： G06F15/17331 , G06F9/5083 , G06F12/084
摘要： A data processing system comprising at least a memory unit, a first client connected to the memory unit, and a second client connected to the memory unit is proposed. The first client may comprise a first memory access unit and an information unit. The first memory access unit may read data from or write data to the memory unit at a first data rate. The information unit may update internal data correlating with a minimum required value of the first data rate. The second client may comprise a second memory access unit and a data rate limiting unit. The second memory access unit may read data from or write data to the memory unit at a second data rate. The data rate limiting unit may limit the second data rate in dependence on the internal data. The first memory access unit may, for example, read data packets sequentially from the memory unit, and the information unit may update the internal data at least per data packet. A method of controlling access to a shared memory unit is also proposed.
摘要翻译：提出一种包括至少存储单元，连接到存储器单元的第一客户端和连接到存储器单元的第二客户端的数据处理系统。第一客户端可以包括第一存储器存取单元和信息单元。第一存储器存取单元可以以第一数据速率从存储器单元读取数据或将数据写入存储器单元。信息单元可以更新与第一数据速率的最小要求值相关的内部数据。第二客户端可以包括第二存储器存取单元和数据速率限制单元。第二存储器访问单元可以以第二数据速率从存储器单元读取数据或向存储器单元写入数据。数据速率限制单元可以根据内部数据来限制第二数据速率。第一存储器存取单元可以例如从存储器单元顺序地读取数据包，并且信息单元可以至少每个数据包来更新内部数据。还提出了一种控制对共享存储器单元的访问的方法。

30. 发明申请

US20140223128A1 MEMORY DEVICE AND METHOD FOR ORGANIZING A HOMOGENEOUS MEMORY 有权
标题翻译：用于组织均质存储器的存储器件和方法
公开(公告)号：US20140223128A1
公开(公告)日：2014-08-07
申请号：US14342449
申请日：2011-10-21
申请人： Michael Staudenmaier , Vincent Aubineau , Ioseph E. Martinez-Pelayo
发明人： Michael Staudenmaier , Vincent Aubineau , Ioseph E. Martinez-Pelayo
IPC分类号： G06F3/06 , G06F12/14
CPC分类号： G06F3/0644 , G06F3/0619 , G06F3/0679 , G06F11/1012 , G06F12/0223 , G06F12/0246 , G06F12/14
摘要： A memory device comprising a memory controller and a homogeneous memory accessible by the memory controller, wherein the homogeneous memory is divided by the memory controller in a first memory partition and a second memory partition, wherein the first memory partition is allocated to a first type of information comprising user data and ECC data that are arranged interleaved with the user data, and wherein the second memory partition is allocated to a second type of information comprising further user data.
摘要翻译：一种存储器装置，包括存储器控制器和存储器控制器可访问的均质存储器，其中所述同构存储器由第一存储器分区和第二存储器分区中的存储器控制器划分，其中第一存储器分区被分配给第一类型包括与用户数据交错布置的用户数据和ECC数据的信息，并且其中将第二存储器分区分配给包括另外的用户数据的第二类型的信息。

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