专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US08638172B2 Local oscillator 失效
标题翻译：本地振荡器
公开(公告)号：US08638172B2
公开(公告)日：2014-01-28
申请号：US13230041
申请日：2011-09-12
申请人： Yoshinori Suzuki , Hiroyuki Kobayashi , Jun Deguchi
发明人： Yoshinori Suzuki , Hiroyuki Kobayashi , Jun Deguchi
IPC分类号： H03L7/099
CPC分类号： H03L7/18 , H03L2207/50
摘要： A local oscillator of an embodiment includes a digitally-controlled oscillator, a phase data generator, a subtractor, a loop filter, a multiplier, and a coefficient calculator. The digitally-controlled oscillator variably controls an oscillation frequency of an oscillation signal by using a first oscillator control value. The oscillation frequency is equal to a product of the first oscillator control value multiplied by an amount of change in the oscillation frequency per unit first oscillator control value. Set frequency data is calculated by dividing a set frequency by a reference frequency of a reference signal. The multiplier outputs the first oscillator control value obtained by multiplying a normalized control value from the loop filter by a first coefficient. The coefficient calculator divides, by the set frequency data, the first oscillator control value which makes the oscillation frequency roughly equal to the set frequency, and sets the quotient as a new first coefficient in the multiplier.
摘要翻译：实施例的本地振荡器包括数字控制振荡器，相位数据发生器，减法器，环路滤波器，乘法器和系数计算器。数字控制振荡器通过使用第一振荡器控制值来可变地控制振荡信号的振荡频率。振荡频率等于第一振荡器控制值乘以每单位第一振荡器控制值的振荡频率的变化量的乘积。通过将设定频率除以参考信号的参考频率来计算设定频率数据。乘法器输出通过将来自环路滤波器的归一化控制值乘以第一系数而获得的第一振荡器控制值。系数计算器通过设定频率数据将使振荡频率大致等于设定频率的第一振荡器控制值分频，并将乘数设置为乘法器中的新的第一系数。

22. 发明授权

US08212603B2 Mixer circuit 有权
标题翻译：搅拌机电路
公开(公告)号：US08212603B2
公开(公告)日：2012-07-03
申请号：US12894250
申请日：2010-09-30
申请人： Jun Deguchi
发明人： Jun Deguchi
IPC分类号： G06G7/44
CPC分类号： H03D7/1441 , H03D7/1433 , H03D7/1458 , H03D7/165 , H03D2200/0043 , H03D2200/0084
摘要： In a mixer circuit, addition of analog signals by capacitive coupling is used and square-law characteristics of the drain current of a MOS transistor operating in a saturated region are used. With this configuration, the voltage and power of the mixer circuit can be reduced.
摘要翻译：在混频器电路中，使用通过电容耦合的模拟信号的加法，并且使用在饱和区域中工作的MOS晶体管的漏极电流的平方特性。通过这种配置，可以减小混频器电路的电压和功率。

23. 发明申请

US20120064844A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND RADIO COMMUNICATION DEVICE 审中-公开
标题翻译：半导体集成电路和无线电通信设备
公开(公告)号：US20120064844A1
公开(公告)日：2012-03-15
申请号：US13050059
申请日：2011-03-17
申请人： Daisuke Miyashita , Jun Deguchi
发明人： Daisuke Miyashita , Jun Deguchi
IPC分类号： H04B1/40 , H03H11/16
CPC分类号： H03L7/16
摘要： According to one embodiment, a semiconductor integrated circuit includes a phase shifter, a plurality of phase matching detecting circuits, a output module. The phase shifter is configured to delay an input oscillation signal to generate a plurality of delay signals having phases different from each other. The plurality of phase matching detecting circuits is configured to store a second program for downloading a first program from an outside to the first area. The output module is configured to generate an output oscillation signal based on at least one of the delay signals having the phase difference determined to be within the predetermined range.
摘要翻译：根据一个实施例，半导体集成电路包括移相器，多个相位匹配检测电路，输出模块。移相器被配置为延迟输入振荡信号以产生具有彼此不同相位的多个延迟信号。多个相位匹配检测电路被配置为存储用于从外部向第一区域下载第一程序的第二程序。输出模块被配置为基于确定为在预定范围内的相位差的延迟信号中的至少一个来产生输出振荡信号。

24. 发明申请

US20120063520A1 SEMICONDUCTOR INTEGRATED CIRCUIT, RADIO COMMUNICATION DEVICE AND TIME TO DIGITAL CONVERTER 失效
标题翻译：半导体集成电路，无线电通信设备和数字转换器
公开(公告)号：US20120063520A1
公开(公告)日：2012-03-15
申请号：US13053396
申请日：2011-03-22
申请人： Jun Deguchi , Daisuke Miyashita , Hiroyuki Kobayashi
发明人： Jun Deguchi , Daisuke Miyashita , Hiroyuki Kobayashi
IPC分类号： H04L27/00 , H03L7/06
CPC分类号： H03L7/1803 , H03L2207/50 , H04L27/0014 , H04L2027/0053 , H04L2027/0069
摘要： According to one embodiment, a semiconductor integrated device includes a digitally controlled oscillator, a counter, a time to digital converter, an adder, and a control signal generator. The time to digital converter includes a frequency-divider, a plurality of impedance elements, and a phase difference detector. The frequency-divider is configured to frequency-divide the oscillation signal to generate a plurality of frequency-divided signals. The plurality of impedance elements is configured to voltage-divide the frequency-divided signals to generate a plurality of delay signals of the oscillation signal. The phase difference detector is configured to output the third digital signal corresponding to the phase difference between the reference signal and the oscillation signal by comparing the reference signal with each of the delay signals.
摘要翻译：根据一个实施例，半导体集成器件包括数字控制振荡器，计数器，时间到数字转换器，加法器和控制信号发生器。数字转换器的时间包括分频器，多个阻抗元件和相位差检测器。分频器被配置为对振荡信号进行分频以产生多个分频信号。多个阻抗元件被配置为对分频信号进行分压以产生振荡信号的多个延迟信号。相位差检测器被配置为通过将参考信号与每个延迟信号进行比较来输出与参考信号和振荡信号之间的相位差相对应的第三数字信号。

25. 发明授权

US08135374B2 Frequency converting circuit and receiver 失效
公开(公告)号：US08135374B2
公开(公告)日：2012-03-13
申请号：US12240093
申请日：2008-09-29
申请人： Shouhei Kousai , Daisuke Miyashita , Jun Deguchi
发明人： Shouhei Kousai , Daisuke Miyashita , Jun Deguchi
IPC分类号： H04B1/26
CPC分类号： H03D7/125
摘要： A frequency converting circuit that outputs an output signal obtained by mixing a first input signal and a second input signal, has: a first input terminal to which the first input signal is input; a second input terminal to which the second input signal is input; an output terminal from which the output signal is output; a frequency converting element that has a first input part connected to the first input terminal and an output part connected to the output terminal, restricts the signal input to the first input part according to a signal input to a second input part and outputs the restricted signal to the output part; and a pulse controlling circuit that receives the second input signal via the second input terminal and outputs a pulse signal obtained by restricting the pulses of the second input signal to the second input part of the frequency converting element.

26. 发明授权

US08040187B2 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US08040187B2
公开(公告)日：2011-10-18
申请号：US12556115
申请日：2009-09-09
申请人： Jun Deguchi , Naoki Kobayashi
发明人： Jun Deguchi , Naoki Kobayashi
IPC分类号： H03F3/04
CPC分类号： H03F3/3028 , H03F3/45179 , H03F3/45183 , H03F3/505 , H03F2200/453 , H03F2203/45236 , H03F2203/45244 , H03F2203/45394 , H03F2203/45508 , H03F2203/45528 , H03F2203/45544 , H03F2203/45696 , H03F2203/45698 , H03F2203/45702
摘要： A semiconductor integrated circuit device constituting an inverting amplifier employs a cascode current source as a current source. In the semiconductor integrated circuit device, a high-potential-side transistor of the cascode current source and a low-potential-side transistor constituting an amplification portion are shared. The configuration can not only make an output impedance of the cascode current source high and improve current source characteristics but also make a minimum potential at a minimum potential point of the amplification portion low and ensure a sufficient power supply voltage margin.
摘要翻译：构成反相放大器的半导体集成电路器件采用共源共栅电流源作为电流源。在半导体集成电路器件中，共享共源共栅电流源的高电位侧晶体管和构成放大部分的低电位侧晶体管。该配置不仅可以使共源共栅电流源的输出阻抗高，并且提高电流源特性，而且使放大部分的最小电位处的最小电位降低，并确保足够的电源电压裕度。

27. 发明申请

US20110037510A1 MIXER CIRCUIT 有权
标题翻译：混频器电路
公开(公告)号：US20110037510A1
公开(公告)日：2011-02-17
申请号：US12894250
申请日：2010-09-30
申请人： Jun Deguchi
发明人： Jun Deguchi
IPC分类号： G06F7/44
CPC分类号： H03D7/1441 , H03D7/1433 , H03D7/1458 , H03D7/165 , H03D2200/0043 , H03D2200/0084
摘要： In a mixer circuit, addition of analog signals by capacitive coupling is used and square-law characteristics of the drain current of a MOS transistor operating in a saturated region are used. With this configuration, the voltage and power of the mixer circuit can be reduced.
摘要翻译：在混频器电路中，使用通过电容耦合的模拟信号的加法，并且使用在饱和区域中工作的MOS晶体管的漏极电流的平方特性。通过这种配置，可以减小混频器电路的电压和功率。

28. 发明申请

US20100244964A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
标题翻译：半导体集成电路设备
公开(公告)号：US20100244964A1
公开(公告)日：2010-09-30
申请号：US12556115
申请日：2009-09-09
申请人： Jun Deguchi , Naoki Kobayashi
发明人： Jun Deguchi , Naoki Kobayashi
IPC分类号： H03F3/16
CPC分类号： H03F3/3028 , H03F3/45179 , H03F3/45183 , H03F3/505 , H03F2200/453 , H03F2203/45236 , H03F2203/45244 , H03F2203/45394 , H03F2203/45508 , H03F2203/45528 , H03F2203/45544 , H03F2203/45696 , H03F2203/45698 , H03F2203/45702
摘要： A semiconductor integrated circuit device constituting an inverting amplifier employs a cascode current source as a current source. In the semiconductor integrated circuit device, a high-potential-side transistor of the cascode current source and a low-potential-side transistor constituting an amplification portion are shared. The configuration can not only make an output impedance of the cascode current source high and improve current source characteristics but also make a minimum potential at a minimum potential point of the amplification portion low and ensure a sufficient power supply voltage margin.
摘要翻译：构成反相放大器的半导体集成电路器件采用共源共栅电流源作为电流源。在半导体集成电路器件中，共享共源共栅电流源的高电位侧晶体管和构成放大部分的低电位侧晶体管。该配置不仅可以使共源共栅电流源的输出阻抗高，并且提高电流源特性，而且使放大部分的最小电位处的最小电位降低，并确保足够的电源电压裕度。

29. 发明申请

US20100109781A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
标题翻译：半导体集成电路设备
公开(公告)号：US20100109781A1
公开(公告)日：2010-05-06
申请号：US12560828
申请日：2009-09-16
申请人： Jun DEGUCHI , Daisuke Miyashita
发明人： Jun DEGUCHI , Daisuke Miyashita
IPC分类号： H03F3/04
CPC分类号： H03F3/45183 , H03F1/30 , H03F3/45632 , H03F2200/453 , H03F2203/45244 , H03F2203/45508
摘要： A semiconductor integrated circuit device includes: an amplifier circuit which respectively has one or more input terminals and one or more output terminals; a replica circuit which has the same DC characteristics as those of the amplifier circuit; a reference voltage generation circuit which is connected to a bias terminal of the replica circuit, and which generates a predetermined reference voltage at the bias terminal; and a feedback circuit which takes a difference between the reference voltage generated at the bias terminal of the replica circuit and the voltage generated at a bias terminal of the amplifier circuit, and which performs feedback control by providing negative feedback of the difference to the bias terminal of the amplifier circuit so that the voltage generated at the bias terminal of the amplifier circuit is made equal to the reference voltage generated at the bias terminal of the replica circuit.
摘要翻译：一种半导体集成电路器件，包括：分别具有一个或多个输入端子和一个或多个输出端子的放大器电路; 具有与放大电路相同的DC特性的复制电路; 参考电压产生电路，其连接到所述复制电路的偏置端子，并且在所述偏置端子处产生预定的参考电压; 以及反馈电路，其将复制电路的偏置端子处产生的参考电压与在放大器电路的偏置端子处产生的电压之间产生差异，并且通过向偏置端子提供差分的负反馈来执行反馈控制使得在放大器电路的偏置端产生的电压等于在复制电路的偏置端产生的参考电压。

30. 发明授权

US08781410B2 Radio communication device, transmission circuit and buffer circuit 失效
标题翻译：无线电通信设备，传输电路和缓冲电路
公开(公告)号：US08781410B2
公开(公告)日：2014-07-15
申请号：US13237069
申请日：2011-09-20
申请人： Jun Deguchi
发明人： Jun Deguchi
IPC分类号： H03L5/00 , H04B1/40 , H04B1/02
CPC分类号： H04B1/403 , H03F3/24 , H04B1/04 , H04B1/40 , H04B2001/0408 , H04W52/029 , Y02D70/142 , Y02D70/40
摘要： According to one embodiment, a buffer circuit has a capacitor comprising a first terminal and a second terminal, an input signal being inputted to the first terminal, a first inverting amplifier circuit configured to invert and amplify a signal of the second terminal of the capacitor, a second inverting amplifier circuit configure to invert and amplify an output signal of the first inverting amplifier circuit, and a MOS (Metal Oxide Semiconductor) transistor comprising a third terminal, a fourth terminal and a gate, the third terminal being connected to the second terminal of the capacitor, the fourth terminal being connected to a connection node of the first and the second inverting amplifier circuits, an inversion signal of the input signal being inputted to the gate.
摘要翻译：根据一个实施例，缓冲电路具有包括第一端子和第二端子的电容器，输入信号被输入到第一端子，第一反相放大器电路被配置为反相和放大电容器的第二端子的信号，第二反相放大器电路，被配置为反转和放大第一反相放大器电路的输出信号;以及MOS（金属氧化物半导体）晶体管，包括第三端子，第四端子和栅极，第三端子连接到第二端子电容器的第四端子连接到第一和第二反相放大器电路的连接节点，输入信号的反相信号被输入到门。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式