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21. 发明专利

JPS59205612A Simulation device of sequence control 失效
标题翻译：序列控制的仿真设备
公开(公告)号：JPS59205612A
公开(公告)日：1984-11-21
申请号：JP7989383
申请日：1983-05-07
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： TAKAGI MASAOKI , NONAKA HIROTO
IPC分类号： G06F11/28 , G05B19/05 , G05B23/02
CPC分类号： G05B19/058 , G05B2219/13142
摘要： PURPOSE:To reduce greatly the debug work processes by displaying a simulation input/output matrix chart on a CRT screen and then displaying with process control the output which had a state change together with said matrix chart when a simulation debug is executed based on the matrix chart. CONSTITUTION:A sequence program processor 8 is provided together with a process input/output controller 9 and a display work memory 14 which reads and stores the contents of a buffer memory 10 which is provided to both processors 8 and 9 to store the sequence input/output data. In addition, a buffer memory 15 is provided to display a simulation matrix chart on the screen of a CRT4 which monitors a simulation debug of sequence. Here it is possible to set the input data of the simulation debug on the displayed simulation input/output matrix. Then the information corresponding to the output data which had a state change is displayed.
摘要翻译：目的：通过在CRT屏幕上显示仿真输入/输出矩阵图，然后在基于矩阵执行仿真调试时，与过程控制一起显示具有状态变化的输出以及所述矩阵图，从而大大减少了调试工作过程图表。构成：序列程序处理器8与进程输入/输出控制器9和显示工作存储器14一起提供，显示工作存储器14读取并存储提供给两个处理器8和9的缓冲存储器10的内容，以存储序列输入/ 输出数据。此外，提供缓冲存储器15以在监视序列的模拟调试的CRT4的屏幕上显示模拟矩阵图。这里可以在显示的仿真输入/输出矩阵上设置仿真调试的输入数据。然后显示与具有状态改变的输出数据相对应的信息。

22. 发明专利

JPS59205605A Sequence controller 失效
标题翻译：序列控制器
公开(公告)号：JPS59205605A
公开(公告)日：1984-11-21
申请号：JP7989583
申请日：1983-05-07
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： TAKAGI MASAOKI
IPC分类号： G05B19/02 , G05B19/048 , G05B19/05 , G06F9/40
CPC分类号： G06F9/4425 , G05B19/05 , G05B2219/13083
摘要： PURPOSE: To reduce greatly the processing time for process advance control by setting the contents of the head address where a processing program is stored to a sequence processing program counter and driving a sequence arithmetic processor.
CONSTITUTION: A sequence program memory part 133 contains program memory groups 211 which are divided in accordance with processes and a process advance main program 212 which starts only the needed sequence processing. When the signal of a sequence processing instruction 121 of the program 212 is turned on, an interruption signal 217 is delivered to a sequence arithmetic processor 130. Thus a program priority deciding OS214 is actuated to decide a sequence processing program number that should be processed with the highest priority for reading. Then the contents of the head address where a sequence processing program to be started is stored are set to a sequence processing program counter 13. Then the processor 130 is driven to process the sequence processing program.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：通过将存储处理程序的头地址的内容设置为序列处理程序计数器并驱动序列运算处理器，大大减少了处理提前控制的处理时间。构成：序列程序存储器部分133包含根据处理被划分的程序存储器组211和仅启动所需的序列处理的处理提前主程序212。当程序212的序列处理指令121的信号被接通时，中断信号217被传送到序列算术处理器130.因此，程序优先级决定OS214被启动以决定应该用...处理的序列处理程序号阅读的最高优先级。然后将要启动的序列处理程序的头地址的内容存储在序列处理程序计数器13中。然后驱动处理器130来处理序列处理程序。

23. 发明专利

JPS6184708A Dispersion type programmable logic controller 失效
标题翻译：分散型可编程逻辑控制器
公开(公告)号：JPS6184708A
公开(公告)日：1986-04-30
申请号：JP20635184
申请日：1984-10-03
申请人： Hitachi Control Syst Co Ltd , Hitachi Eng Co Ltd , Hitachi Ltd , Nissan Motor Co Ltd
发明人： SUZUKI TOSHIHARU , SUGIYAMA SADAKAZU , SASAKI NAOKI , OGINO KOICHI , ONODERA KATSUYUKI , ASADA KAZUYOSHI , ARAOKA MANABU , TAKAGI MASAOKI , HASEGAWA KEIICHI , HIGUMA TADAAKI
IPC分类号： G05B19/05
CPC分类号： G05B19/052
摘要： PURPOSE:To shorten build up and changing time of a facility by installing a dispersion type PLC (programmable logic controller) for every unit of machine processing facilities, installing the operation processing part and the memory part which can be independently controlled and obtaining the interlock. CONSTITUTION:A dispersion type PLC has a CPU712, and a process input output device for a sequencer is connected. From CPU712, CPU16 is connected with linkage between PLC, the interlock is taken and the CPU16 has the same performance as that of one large-sized PLC with the whole as single body. PLC#1 has IF711 as an interface to execute linkage between PLC and to CPU712 connected with this, an internal relay 713 for the interlock is connected. Other PLC are also composed in the same way. SUB-PLC is connected with an interface IF at the circuit 702, a unitized trial run can be adjusted and PLC can be mutually connected and controlled easily.
摘要翻译：目的：通过为每台机器处理设备安装分散式PLC（可编程逻辑控制器），安装可独立控制的操作处理部分和存储器部分，获得互锁，从而缩短设备的建立和更换时间。构成：分散式PLC具有CPU712，并且连接了用于定序器的过程输入输出装置。从CPU712起，CPU16与PLC之间的联动连接，采用互锁，CPU16与整体为一体的大型PLC具有相同的性能。 PLC＃1具有IF711作为一个接口，用于执行PLC与连接的CPU712之间的连接，连接用于互锁的内部继电器713。其他PLC也以相同的方式组成。 SUB-PLC与电路702的接口IF连接，可以调整组合式试运行，并可以方便地对PLC进行相互连接和控制。

24. 发明专利

JPS6170415A Measuring instrument of quantity of discharge from gate 失效
标题翻译：从门口量度量测仪器
公开(公告)号：JPS6170415A
公开(公告)日：1986-04-11
申请号：JP19163284
申请日：1984-09-14
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： HANDA YOSHIHISA
IPC分类号： G01F1/00 , G01F15/02
CPC分类号： G01F15/022 , G01F1/00
摘要： PURPOSE:To make the quantity of discharge found from the opening of a discharge data approach the real quantity of discharge by compensating the former value by the water level changing ratio of a storing reservoir. CONSTITUTION:In a measuring instrument of the quantity of discharge from a gate, the water level of the storing reservoir 6 which is found out by a water level meter 7 is smoothed and held at a smoothed water level H by removing the influence of water level variation due to waves of the storing reservoir 6. A water level variation rate calculating part 153 inputs the water level H, outputs its water level changing rate DELTAH and then outputs the water level H and the opening C of the discharge port 8 obtained by a gate opening meter 9 to a gate opening base discharge volume calculating part 152 to obtain the quantity Q0b of discharge from a gate opening base. A reference water level changing rate setting part 154 outputs a reference water level changing rate DELTAH0 at the water level H and the opening C. The quantity Q0 of discharge is obtained from a discharge volume compensating value Q0 obtained by inputting the deviation DELTAh between the changing rate DELTAH0 and the changing rate DELTAH obtained from the calculating part 153 in a discharge volume compensating value calculating part 155 and the quantity Q0b of discharge from the gate base. Namely the quantity Q0 of discharge is compensated by the deviation value DELTAh between the reference water level compensating rate DELTAH0 and a current water level changing rate DELTAH and approach to the real quantity of discharge.
摘要翻译：目的：通过对储存库的水位变化率进行补偿，使排放数据开放中发现的排放量达到实际排放量。构成：在从闸门排出量的测量仪器中，通过除去水位的影响，使水位计7发现的储存容器6的水位平滑化并保持在平滑的水位H 水位变化率计算部153输入水位H，输出其水位变化率DELTAH，然后输出由水位变化率H获得的排出口8的水位H和开口C 闸门开度计9到闸门开口底部排放量计算部分152以获得从闸门开口底部排出的量Q0b。基准水位变化率设定部154在水位H和开度C输出基准水位变化率DELTAH0。从通过输入变化后的偏差DELTAh得到的排出量补偿值Q0，求出排出量Q0 速度DELTAH0和从放电量补偿值计算部155中的计算部153获得的变化率DELTAH以及从栅极基底的放电量Q0b。即，通过基准水位补偿率DELTAH0与当前水位变化率DELTAH之间的偏差值DELTAh补偿放电量Q0，并接近实际的放电量。

25. 发明专利

JPS60197097A Automatic controller 失效
标题翻译：自动控制器
公开(公告)号：JPS60197097A
公开(公告)日：1985-10-05
申请号：JP5214684
申请日：1984-03-21
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： SUZUKI TADAYOSHI
IPC分类号： H04Q9/00
CPC分类号： H04Q9/00
摘要： PURPOSE:To perform appropriately a control without being conscious of a site interlocking by carrying out a control while the entire control of a controller and of an interlocking device is decided to be normal or not. CONSTITUTION:A computer system 3 has an automatic control equipment, and consists mainly of a computer body 6, in addition to a display device 7, a control setting table 8 and a coupling device 9. Operating conditions of each device 10 in a remote substation group 2 are stored in a memory 6 by means of transmitted information of a telecomunication slave station 5 and a telecomunication master station 4. Control command from the computer to equipments are transmitted in a simular manner, and control the equipment 10. In accordance with the information of each substation centralized in the computer system 3, the CPU6 outputs automatic control commands quickly and properly.
摘要翻译：目的：通过在控制器和互锁装置的整体控制被判定为正常的同时执行控制来适当地执行控制而不意识到位置互锁。规定：计算机系统3具有自动控制设备，除了显示装置7，控制设定表8和耦合装置9之外，主要由计算机主体6组成。远程变电站中的每个设备10的操作条件组2通过电信从站5和电信主站4的发送信息存储在存储器6中。从计算机到设备的控制命令以模拟的方式传输，并且控制设备10.根据每个变电站的信息集中在计算机系统3中，CPU6快速正确地输出自动控制命令。

26. 发明专利

JPS60193051A Error analyzer 失效
标题翻译：错误分析器
公开(公告)号：JPS60193051A
公开(公告)日：1985-10-01
申请号：JP4707084
申请日：1984-03-14
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： AKEDA YUKIFUMI , MASAI KENJI
IPC分类号： G06F11/00 , G06F11/07
CPC分类号： G06F11/0745 , G06F11/0703
摘要： PURPOSE:To simplify the error analysis by using an input information store memory containing a control table which stores the maximum number of cases for input/output information to be stored to an input/output information table and an NEXT register pointer showing the position where the input/output data is stored. CONSTITUTION:An input/output information memory 5 is provided with an control table 51 consisting of an NEXT register pointer which indicates the position where the input/output information is stored and the maximum number of register cases for input/output information, and an input/output information table 52 to which input/output information is stored. The data outputted from or inputted to a computer is stored to the table 52 according to the information on the table 51. While an error analysis routine is stored to an error analysis program.
摘要翻译：目的：通过使用包含控制表的输入信息存储存储器来简化误差分析，控制表存储要存储到输入/输出信息表的输入/输出信息的最大数量的情况，以及显示位置的NEXT寄存器指针存储输入/输出数据。构成：输入/输出信息存储器5具有由NEXT寄存器指针组成的控制表51，该指示器指示存储输入/输出信息的位置和输入/输出信息的最大寄存器数量，以及输入 /输出信息表52存储输入/输出信息。从计算机输出或输入到计算机的数据根据表51上的信息被存储到表52中。当误差分析程序被存储到错误分析程序中时。

27. 发明专利

JPS60190020A Cmos integrated circuit device 失效
标题翻译： CMOS集成电路设备
公开(公告)号：JPS60190020A
公开(公告)日：1985-09-27
申请号：JP4547184
申请日：1984-03-12
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： KODAMA KAZUYUKI , KITATSUME YOSHIAKI , AKIYAMA MASAKAZU , ISHIKAWA KATSUFUMI , OONUMA KUNIHIKO
IPC分类号： H03K19/0948 , G01R31/28 , G06F1/04 , G10L11/00 , G10L15/28 , H03K17/16
CPC分类号： H03K17/16
摘要： PURPOSE:To decrease a peak value of a power noise produced at signal switching without incurring the increase in a chip area by retarding a switching timing of plural output signals by a prescribed time at each several signal line bundles. CONSTITUTION:In case of, e.g., a voice recognition CMOSLSI circuit, 20 data lines D are divided into D1 in 6-bit and D2, D3 in 7-bit, the D1 is latched to a memory address register MAR1 in the timing of CK, the D2 is latched to an MAR2 by using a clock CK2 delayed by a delay time of the two stages of inverters INV than the time of the CK, and the D3 is latched in an MAR3 by using a clock CK3 delayed by the delay time of two stages of the INV than the time of the CK2. Thus, six lines are switched in the timing of the CK, seven lines are switched in the timing of the CK2 and seven lines are switched sequentially in the timing of the CK3 in the output circuit. Thus, the peak current produced in the output circuit and power supply is decreased at the switching of data in 20-bit.
摘要翻译：目的：降低在信号切换时产生的功率噪声的峰值，而不会在每个几个信号线束处延迟多个输出信号的开关定时预定时间，而不会导致芯片面积的增加。规定：在例如语音识别CMOSLSI电路的情况下，20条数据线D被分成6位的D1和D2，7位的D3，在CK的定时中将D1锁存到存储器地址寄存器MAR1 通过使用延迟了两级反相器INV的延迟时间的时钟CK2比CK的时间将D2锁存到MAR2，并且通过使用延迟延迟时间的时钟CK3将D3锁存在MAR3中的两个阶段的INV比CK2的时间。因此，在CK的定时中切换六条线，在CK2的定时切换七条线，并且在输出电路中的CK3的定时中顺序切换七条线。因此，在20位的数据切换时，输出电路和电源产生的峰值电流降低。

28. 发明专利

JPS5769422A Controlling method for gate of driver_mouth dam 失效
标题翻译：驾驶员大坝控制方法
公开(公告)号：JPS5769422A
公开(公告)日：1982-04-28
申请号：JP14299080
申请日：1980-10-15
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： KUBOTA SATORU , SATOU NOBUHIKO
IPC分类号： E02B7/20 , G01F1/00 , G05D9/12
CPC分类号： G01F1/002
摘要： PURPOSE:To eliminate the variance of calculation result, by smoothing discharge synchronizing with the time measurement of variations in water level. CONSTITUTION:Gate discharge Qcm, the intake quantity of water Qp and fishway discharge Qf are found and inputted to an adding circuit 13 to calculate the total discharge. Then, a discharge integral-value calculating circuit 20 uses clock pulses B to find the product Qoi.Ti of discharge Qoi for every calculated sample and a sampling time. The timing of a flip-flop 21, cm the other hand, is used as the AND condition to integrate (n) on vairations in water level through an integrating circuit 14 by the Qoi.Ti from an AND element 22. This integrated value is divided by a dividing circuit 15 to calculate mean discharge Q'o.
摘要翻译：目的：消除计算结果的差异，通过平滑放电与水位变化的时间测量同步。构成：找出栅极放电Qcm，进水量Qp和鱼道排出量Qf，并将其输入到加法电路13以计算总放电量。然后，放电积分值计算电路20使用时钟脉冲B找出每个计算样本的放电次数Qoi和采样时间。另一方面，触发器21cm的定时被用作AND条件，通过来自AND元件22的Qoi.Ti通过积分电路14在水位上积分（n）。该积分值是除以电路15分解平均放电量Q'o。

29. 发明专利

JPS61118878A Image recognizing device 失效
标题翻译：图像识别装置
公开(公告)号：JPS61118878A
公开(公告)日：1986-06-06
申请号：JP24034884
申请日：1984-11-14
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： NAKAMURA YOSHIYUKI , IWAI KATSUTOSHI , SAKAI KUNIZO
IPC分类号： G06T1/00 , G06F15/16 , G06K9/00 , G06T1/20 , G06T7/00
摘要： PURPOSE: To increase a processing speed by operating in parallel a system processor and an image processing processor.
CONSTITUTION: An arithmetic evaluating program of an image is executed by a system processor (SYSP) 1, and executes an access to an image memory (IMU) 4 and the start of an image processing processor (IP) 3 through an address processor (AP) 2. In such a case, the AP2 and the IP3 become a busy state until an operation is ended, and after the operation is ended, the busy state is released, and the arithmetic evaluating program inputs an image operation result and executes an evaluation processing. Also, while the SYSP1 is executing the arithmetic evaluating program, the image operation of the next object to be evaluated is executed by the IP3, it is operated in parallel to the AP2 and the idle time is curtailed, and the time of the whole image processing is shortened.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：通过并行处理系统处理器和图像处理处理器来提高处理速度。构成：图像的算术评估程序由系统处理器（SYSP）1执行，并且通过地址处理器（AP）执行对图像存储器（IMU）4的访问和图像处理处理器（IP）3的启动））2.在这种情况下，AP2和IP3变为忙状态，直到操作结束，并且在操作结束之后，释放忙碌状态，并且算术评估程序输入图像操作结果并执行评估处理。此外，SYSP1正在执行算术评价程序时，通过IP3执行下一个被评估对象的图像动作，并且与AP2并行地进行操作，并且缩短了整个图像的时间处理缩短。

30. 发明专利

JPS61112214A Output device for estimated guidance 失效
标题翻译：用于估计指导的输出设备
公开(公告)号：JPS61112214A
公开(公告)日：1986-05-30
申请号：JP23320484
申请日：1984-11-07
申请人： Hitachi Control Syst Co Ltd , Hitachi Ltd
发明人： HASHIMOTO SHIGEO , ABE SANAE
IPC分类号： G05B23/02 , G05B19/418 , G06Q10/04 , G06Q50/00 , G06Q50/04 , G21C17/00
CPC分类号： G21C17/00
摘要： PURPOSE:To improve both the safety and reliability of a plant by delivering previously the operating guidance for future operations to an operator based on the results given from a device that estimates a plant state quantity. CONSTITUTION:A data base 10 of an atomic power plant is formed with the plant state quantity signal supplied from a process input device. In such a case that a scrum occurs, a present value processor 121 informs a plant state estimating device 122 of the breakage scale if the occurrence is caused by a loss of a cooling accident or sticking in an open state of a S/R valve. Otherwise the device 122 is started for analysis of the fault phenomenon performed on the basis of the results of the base 10 and the processor 121. Then the state quantity of a primary parameter is estimated for the state quantity of the power plant. The result of analysis is delivered to a color CRT display device 14 via a display drive circuit 13.
摘要翻译：目的：通过根据估计工厂状态数量的设备给出的结果，向运营商提供以后的运营指导，从而提高工厂的安全性和可靠性。构成：原子发电厂的数据库10由从处理输入装置提供的工厂状态量信号形成。在出现Scrum的情况下，如果发生是由于S / R阀的打开状态的冷却事故的损失或粘着而引起的，则现值处理器121通知工厂状态估计装置122破损标尺。否则，启动装置122，以分析基于基座10和处理器121的结果执行的故障现象。然后，根据发电厂的状态量来估计主要参数的状态量。通过显示驱动电路13将分析结果传送给彩色CRT显示装置14。

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