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11. 发明授权

US08065516B2 Hard disk drive with certification function 有权
标题翻译：具有认证功能的硬盘驱动器
公开(公告)号：US08065516B2
公开(公告)日：2011-11-22
申请号：US11528958
申请日：2006-09-27
申请人： Yoshiju Watanabe , Tatsuya Hirai
发明人： Yoshiju Watanabe , Tatsuya Hirai
IPC分类号： H04L29/00
CPC分类号： G06F21/10
摘要： A magnetic disk drive is provided capable of reducing a processing load even in a mode of, for example, reproduction during recording. In one embodiment, a magnetic disk drive includes a storage unit for storing certificate information that relates to the magnetic disk drive and corresponds to a root key of a certification organization. The certificate information is used on the host side to perform authentication processing of the magnetic disk drive.
摘要翻译：提供了即使在记录期间例如再现的模式中也能够减少处理负荷的磁盘驱动器。在一个实施例中，磁盘驱动器包括存储单元，用于存储与磁盘驱动器相关的证书信息，并且对应于认证组织的根密钥。在主机侧使用证书信息来执行磁盘驱动器的认证处理。

12. 发明申请

US20090015960A1 Magnetic disk drive and magnetic disk medium 审中-公开
标题翻译：磁盘驱动器和磁盘介质
公开(公告)号：US20090015960A1
公开(公告)日：2009-01-15
申请号：US12217075
申请日：2008-06-30
申请人： Naoki Satoh , Yoshiteru Ishida , Yoshiju Watanabe , Terumi Takashi
发明人： Naoki Satoh , Yoshiteru Ishida , Yoshiju Watanabe , Terumi Takashi
IPC分类号： G11B15/46
CPC分类号： G11B19/26
摘要： Embodiments of the invention increase the convenience of a magnetic disk drive for portable use by shortening a period of time required to record a large amount of data, and by increasing the reproduction time, in the magnetic disk drive. In one embodiment, an area between servo data parts is interpolated by servo data parts, each of which stores a burst signal, so that the allocation density of a burst signal is made k times. At the time of write operation in which data is written, only the servo data parts are made use of to perform the servo control while a disk is driven at high rotational speed so as to reduce the recording time. At the time of read operation in which data is reproduced, the servo data parts are made use of to ensure the required precision of the servo control at low rotational speed that is 1/k of the rotational speed at the time of write operation. The reproduction at low rotational speed enables the reduction in power consumption.
摘要翻译：本发明的实施例通过缩短记录大量数据所需的时间周期以及通过增加磁盘驱动器中的再现时间来增加用于便携式使用的磁盘驱动器的便利性。在一个实施例中，伺服数据部分之间的区域由伺服数据部分内插，每个伺服数据部分存储脉冲串信号，使得脉冲信号的分配密度为k次。在写入数据的写入操作时，仅利用伺服数据部分来执行伺服控制，同时以高转速驱动盘，以便减少记录时间。在再现数据的读取操作时，利用伺服数据部分来确保在写入操作时转速为1 / k的低转速下的伺服控制所要求的精度。在低转速下的再现能够降低功耗。

13. 发明申请

US20080075282A1 Data recording device, and data management method 审中-公开
标题翻译：数据记录装置和数据管理方法
公开(公告)号：US20080075282A1
公开(公告)日：2008-03-27
申请号：US11894834
申请日：2007-08-21
申请人： Yoshiju Watanabe , Toshio Kakihara
发明人： Yoshiju Watanabe , Toshio Kakihara
IPC分类号： H04L9/00
CPC分类号： G11B20/00086 , G11B20/00137 , G11B20/00152 , G11B20/00173 , G11B20/0021
摘要： Embodiments in accordance with the present invention provide a data recording device that is capable of easily managing, on a user basis, data key used for data encryption, and to provide a data management method thereof. According to one embodiment, a data encryption/decryption circuit performs the steps of: encrypting write data inputted from the host side, and then outputting the encrypted write data to the magnetic disk side; and decrypting read data inputted from the magnetic disk side, and then outputting the decrypted read data to the host side. A data-key management circuit manages a data key used to operate the data encryption/decryption circuit.
摘要翻译：根据本发明的实施例提供一种数据记录装置，其能够容易地在用户的基础上管理用于数据加密的数据密钥，并提供其数据管理方法。根据一个实施例，数据加密/解密电路执行以下步骤：加密从主机侧输入的写入数据，然后将加密的写入数据输出到磁盘侧; 并且解密从磁盘侧输入的读取数据，然后将解密的读取数据输出到主机侧。数据密钥管理电路管理用于操作数据加密/解密电路的数据密钥。

14. 发明授权

US07268707B2 Coding device and decoding device 有权
标题翻译：编码设备和解码设备
公开(公告)号：US07268707B2
公开(公告)日：2007-09-11
申请号：US11394531
申请日：2006-03-30
申请人： Terumi Takashi , Yoshiju Watanabe , Morishi Izumita , Yasuyuki Itou
发明人： Terumi Takashi , Yoshiju Watanabe , Morishi Izumita , Yasuyuki Itou
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/10175 , G11B20/10296 , G11B20/1426 , G11B20/1833 , G11B20/1866 , G11B2220/2516
摘要： Embodiments of the invention allow relatively simple circuits to provide a coding device capable of coding longer bit-length data suitably for disk apparatus and a decoding device capable of decoding the data coded by the coding device. In one embodiment, a coding device comprises: a coder which, based on an M bits code string, produces an (M+1) bits coded string where each of the plural bits which may appear in the M bits code string is limited in run length; a preprocessor which produces an M bits code string by removing (N−M) bits respectively from predefined (N−M) positions of an incoming N bits code string and outputs the M bits code string to the coder; and a postprocessor which produces and outputs an (N+1) bits code string by inserting the (N−M) bits, which are removed by the preprocessor, into predefined (N−M) respective insertion positions of the (M+1) bits coded string output from the coder.
摘要翻译：本发明的实施例允许相对简单的电路提供能够适当地对盘装置编码较长位长数据的编码装置和能够对由编码装置编码的数据进行解码的解码装置。在一个实施例中，编码装置包括：编码器，其基于M比特码串产生（M + 1）比特编码串，其中可能出现在M比特码串中的多个比特中的每一个在运行中被限制长度; 通过从输入N位代码串的预定义（N-M）位移除（N-M）位来产生M位代码串的预处理器，并将M位代码串输出到编码器; 以及后处理器，其通过将由预处理器移除的（NM）位插入到（M + 1）位编码串输出的预定义（NM）相应插入位置中来产生并输出（N + 1）位代码串从编码器。

15. 发明授权

US07256953B2 Data synchronizing signal detector, signal processing device using the detector, information recording and reproducing apparatus having the detector and the device, data synchronizing signal detecting method, and information recording medium for using in the method 失效
标题翻译：数据同步信号检测器，使用检测器的信号处理装置，具有检测器和装置的信息记录和再现装置，数据同步信号检测方法和用于该方法的信息记录介质
公开(公告)号：US07256953B2
公开(公告)日：2007-08-14
申请号：US10910532
申请日：2004-08-03
申请人： Yoshiju Watanabe , Terumi Takashi
发明人： Yoshiju Watanabe , Terumi Takashi
IPC分类号： G11B5/09 , G11B5/035
CPC分类号： H04L1/0047 , G11B5/012 , G11B5/09 , G11B20/10009 , G11B27/10 , G11B27/3027 , H04L1/0041 , H04L1/0054 , H04L7/0008 , H04L7/04
摘要： A data discriminating unit includes a data discriminator and a sync signal discriminator. A data sync signal is detected for the bit string discriminated from the output of the sync signal discriminator, and the data is demodulated for the bit string discriminated from the output of the data discriminator, thereby optimizing the signal to a form suitable for discrimination and detection of the data sync signal and demodulation for data reproduction. As a result, the detection performance of the data sync signal can be improved while maintaining the data discrimination performance. A Viterbi decoder is used for discrimination by the data discriminator and the sync signal discriminator for the optimization thereby to optimize the number of states, the number of paths for state transition and the path memory length. A signal having no continuous inversions of the recording data is used as the data sync signal.
摘要翻译：数据识别单元包括数据鉴别器和同步信号鉴别器。针对从同步信号鉴别器的输出识别的比特串检测数据同步信号，并且对于与数据鉴别器的输出鉴别的比特串对数据进行解调，从而将信号优化为适合于鉴别和检测的形式的数据同步信号和解调用于数据再现。结果，可以在保持数据辨别性能的同时提高数据同步信号的检测性能。维特比解码器用于由数据鉴别器和用于优化的同步信号鉴别器进行鉴别，从而优化状态数量，状态转换路径数和路径存储器长度。作为数据同步信号，使用没有连续反转记录数据的信号。

16. 发明授权

US07020833B2 Data synchronization detection method, information recording method, and information reproduction method 失效
标题翻译：数据同步检测方法，信息记录方法和信息再现方法
公开(公告)号：US07020833B2
公开(公告)日：2006-03-28
申请号：US09930215
申请日：2001-08-16
申请人： Yoshiju Watanabe , Yasuyuki Ito
发明人： Yoshiju Watanabe , Yasuyuki Ito
IPC分类号： G06F11/00
CPC分类号： H04L1/0047 , G11B20/10 , G11B20/12 , G11B27/3027 , G11B2220/20 , H04L1/0046 , H04L1/0075 , H04L7/0066 , H04L7/046
摘要： Data synchronization detection is provided between data identification and code demodulation in a data reproduction system, which performs data synchronization detection using code-modulated data. A specified bit pattern generated in a data codeword is calculated in each phase (bit), using a specified bit sequence pattern that is not generated in a specified phase of the data codeword. For example, a specified bit sequence pattern is generated only in a specified phase of the codeword). The positions of the data codeword partitions are thereby identified. Scrambling is then applied to the write data as required in order to ensure accurate synchronization detection.
摘要翻译：在数据再现系统中的数据识别和码解调之间提供数据同步检测，数据同步检测使用码调制数据执行数据同步检测。使用在数据码字的指定阶段不产生的指定位序列模式，在每个相位（位）中计算在数据码字中生成的指定位模式。例如，仅在码字的指定阶段中生成指定的比特序列模式）。由此识别数据码字分区的位置。然后根据需要将加扰应用于写入数据，以确保准确的同步检测。

17. 发明申请

US20050053181A1 Data synchronizing signal detecting device 失效
标题翻译：数据同步信号检测装置
公开(公告)号：US20050053181A1
公开(公告)日：2005-03-10
申请号：US10969951
申请日：2004-10-22
申请人： Yoshiju Watanabe
发明人： Yoshiju Watanabe
IPC分类号： G11B20/10 , G11B20/12 , G11B20/14 , G11B20/18 , G11B27/30 , H04L7/04 , H04L7/00
CPC分类号： G11B27/3027 , G11B20/1217 , G11B2220/20 , H04L7/042
摘要： A data sync signal detecting device for detecting a sync signal having sync signal detection errors. The detecting device applies the output data of a most-likelihood decoder to shift register bit cells. The data is sequentially shifted and held in the bit cells of the shift register. The bit cell outputs are separated into odd-numbered and even-numbered bit string and applied to first and second pattern matching circuits. The odd-numbered bit string is matched with “01001”; by a first pattern matching circuit. The even-numbered bit string is matched with “01011” by a second pattern matching circuit. First and second matching results are applied to a coincidence number adder/majority decision circuit. When coincidence occurs, the matching result is “1”, and when non-coincidence occurs, the matching result is “0”. The coincidence number adder/majority decision circuit produces a sync signal detection output when the first or second matching result is “1”.
摘要翻译：一种用于检测具有同步信号检测误差的同步信号的数据同步信号检测装置。检测装置将最可能解码器的输出数据应用于移位寄存器位单元。数据被顺序移位并保持在移位寄存器的位单元中。位单元输出被分成奇数和偶数位串，并被施加到第一和第二模式匹配电路。奇数位串与“01001”匹配; 通过第一模式匹配电路。偶数位串由第二模式匹配电路与“01011”匹配。第一和第二匹配结果被应用于符号数加法器/多数判定电路。当符合时，匹配结果为“1”，当不一致时，匹配结果为“0”。当第一或第二匹配结果为“1”时，符号数加法器/多数决定电路产生同步信号检测输出。

18. 发明授权

US06856660B1 Signal processing method and apparatus and disk device using the method and apparatus 失效
标题翻译：使用该方法和装置的信号处理方法和装置以及盘装置
公开(公告)号：US06856660B1
公开(公告)日：2005-02-15
申请号：US09400856
申请日：1999-09-21
申请人： Yoshiju Watanabe , Masaharu Kondo
发明人： Yoshiju Watanabe , Masaharu Kondo
IPC分类号： G11B20/10 , G11B20/12 , G11B20/18 , G11B27/30 , H04L7/04 , H04L7/00
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/1217 , G11B20/1833 , G11B27/3027 , G11B2220/20 , H04L7/042
摘要： A signal processing circuit having a data sync signal detector and a disk device. Input data read from a magnetic disk is input to a data discriminator. A data discrimination output constituting a code bit output discriminated by the data discriminator is input to a post-coder the output of which is input to a decoder and a (1+D) processing unit. The processed output of the processing unit is input to an error detection/correction unit and separated into bit strings of odd numbered bits and even numbered bits, divided into groups. An error detection/correction output is input to a data sync signal detector, and matched against a sync pattern. When the number of coincident groups is greater than a threshold value, a sync signal is output and upon detection causes the decoder to demodulate the data.
摘要翻译：一种具有数据同步信号检测器和盘装置的信号处理电路。从磁盘读取的输入数据被输入到数据鉴别器。构成由数据鉴别器鉴别的码位输出的数据识别输出被输入到输出到解码器和（1 + D）处理单元的后置编码器。处理单元的处理输出被输入到错误检测/校正单元，并分成奇数位和偶数位的位串，被分成组。错误检测/校正输出被输入到数据同步信号检测器，并且与同步模式匹配。当同步组的数量大于阈值时，输出同步信号，一旦检测到解码器解调数据。

19. 发明授权

US06704154B2 Decoding apparatus and decoding method 失效
标题翻译：解码装置和解码方法
公开(公告)号：US06704154B2
公开(公告)日：2004-03-09
申请号：US09986597
申请日：2001-11-09
申请人： Akihiko Hirano , Seiichi Mita , Yoshiju Watanabe
发明人： Akihiko Hirano , Seiichi Mita , Yoshiju Watanabe
IPC分类号： G11B2014
CPC分类号： G11B20/1833 , G11B5/012 , G11B5/09 , G11B20/10009 , H03M5/145 , H03M13/31
摘要： In a coding method which does not restrict a run length of “1” while data is recorded/reproduced, there are such a drawback that when an error correction is carried out, a total number of error data to be corrected is increased, and also errors of not-detectable data are increased. While data is coded, a continuous number of “1” contained in a code word is limited, and then an error correction is carried out inside a coding/decoding process operation. Thus, a recording/reproducing apparatus having a small number of decoding errors is available.
摘要翻译：在数据被记录/再现时不限制游程长度为“1”的编码方法存在这样的缺点：当执行错误校正时，增加要纠正的错误数据的总数，并且还不可检测数据的错误增加。在对数据进行编码的同时，对码字中包含的连续数“1”进行限制，然后在编码/解码处理动作中进行纠错。因此，具有少量解码错误的记录/再现装置是可用的。

20. 发明授权

US06661594B2 Signal processing circuit and information recording/reproducing apparatus using the same, and method for optimizing coefficients of equalizer circuit 有权
标题翻译：信号处理电路和使用该信号的信息记录/再现装置，以及用于优化均衡器电路的系数的方法
公开(公告)号：US06661594B2
公开(公告)日：2003-12-09
申请号：US10277695
申请日：2002-10-23
申请人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
发明人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
IPC分类号： G11B535
CPC分类号： G11B20/10055 , G11B5/035 , G11B5/09 , G11B20/10009 , G11B20/10481
摘要： A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.
摘要翻译：一种用于至少包括AGC，PLL，LPF，均衡器电路和检测电路的磁记录/再现装置的信号处理电路，其中通过定义均衡器电路的结构形成系数补偿电路，错误提供检测电路，其通过接收来自检测电路的输入而工作，并且LSI由多个模拟和数字芯片形成，并且模拟和数字芯片通过电流输出型D / A转换器连接至少至少 AGC和PLL。

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