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    • 14. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US07241685B2
    • 2007-07-10
    • US10390413
    • 2003-03-18
    • Hiroshi MoriyaTomio IwasakiHideo MiuraShinji NishiharaMasashi Sahara
    • Hiroshi MoriyaTomio IwasakiHideo MiuraShinji NishiharaMasashi Sahara
    • H01L21/44
    • H01L23/53223H01L2924/0002H01L2924/00
    • There is provided a semiconductor device having a wiring structure which reduces possibility of a short circuit, and method of making the device. Besides, there is provided a semiconductor device having high reliability. Further, there is provided a semiconductor device having high yield. A wiring line is formed at one main surface side of a semiconductor substrate, and has a laminate structure of an adjacent conductor layer and a main wiring layer. The main wiring layer contains an added element to prevent migration. The adjacent conductor layer is formed of a material for preventing a main constituent element and the added element of the main wiring layer from diffusing into the substrate beneath the adjacent conductor layer, and the concentration of the added element at a location close to an interface between the adjacent conductor layer and the main wiring layer is low compared to the concentration of the added element in the main wiring layer spaced from the adjacent conductor layer.
    • 提供一种具有降低短路可能性的布线结构的半导体器件及其制造方法。 此外,提供了具有高可靠性的半导体器件。 此外,提供了一种具有高产率的半导体器件。 在半导体衬底的一个主表面侧形成布线,并且具有相邻导体层和主布线层的叠层结构。 主配线层包含一个添加的元素以防止迁移。 相邻的导体层由用于防止主要构成元素和主配线层的添加元素扩散到相邻导体层下方的基板中的材料形成,并且添加元素在靠近界面处的位置的浓度 与相邻的导体层间隔开的主配线层的添加元素的浓度相比,相邻的导体层和主布线层的电位低。