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    • 11. 发明申请
    • Methods and Compositions for Sealing Fractures, Voids, and Pores of Subterranean Rock Formations
    • 地下岩层断裂,空隙和孔隙的方法和组成
    • US20070187099A1
    • 2007-08-16
    • US11672104
    • 2007-02-07
    • Ling Wang
    • Ling Wang
    • E21B33/138E21B21/00
    • C09K8/80C09K8/516E21B33/138
    • A region of a borehole with one or more openings to be sealed off, such as one or more fractures, voids, and or pores, may or may not be sealed off around a tubular string with a borehole seal such as a packer or plug. A carrying fluid may be utilized to transport a filtration material into the opening to create a bridge, which at least partially seals the opening, but still provides a flow path that permits fluid flow therethrough. A solid material and/or settable material may then utilize the fluid flow subsequently or be simultaneously spotted with or behind the filtration material to thereby form compositions which effectively seals off the flow path into the one or more openings.
    • 具有一个或多个要被密封的开口的井眼的区域,例如一个或多个裂缝,空隙和/或孔隙,可以围绕具有诸如封隔器或塞子的钻孔密封件的管状管柱密封或不被密封。 可以使用携带流体将过滤材料输送到开口中以产生至少部分地密封开口的桥,但仍提供允许流体流过其中的流动路径。 然后,固体材料和/或可固化材料可随后利用流体流,或者与过滤材料之间或之后同时点样,从而形成有效地密封流入一个或多个开口的流动路径的组合物。
    • 17. 发明申请
    • RECONFIGURABLE CIRCUIT AND DECODER THEREFOR
    • 可重构电路及其解码器
    • US20150048863A1
    • 2015-02-19
    • US14277053
    • 2014-05-14
    • Ling WangHuangsheng DingShayan ZhangWanggen Zhang
    • Ling WangHuangsheng DingShayan ZhangWanggen Zhang
    • G01R31/3177
    • G01R31/31701G01R31/3177H04L25/4902
    • A digital decoder, used in a reconfigurable circuit, for decoding digital pulses includes a phase indicator module having inputs coupled to a reference pulse input and a data pulse input. The phase indicator module has timing information outputs that provide logic values indicative of rising and falling edges of pulses occurring on the reference pulse input and the data pulse input. A phase decoder module has inputs coupled to the timing information outputs, and outputs decoded binary data values. In operation, the phase decoder module compares at least two of the logic values at the timing information outputs with a signal representative leading and trailing edges of a pulse applied to one of the phase inputs to determine a pulse arrival order sequence on the phase inputs and thereby provide the decoded binary data values.
    • 在可重构电路中用于解码数字脉冲的数字解码器包括具有耦合到参考脉冲输入和数据脉冲输入的输入的相位指示器模块。 相位指示器模块具有提供指示在参考脉冲输入和数据脉冲输入上出现的脉冲的上升沿和下降沿的逻辑值的定时信息输出。 相位解码器模块具有耦合到定时信息输出的输入,并且输出解码的二进制数据值。 在操作中,相位解码器模块将定时信息输出处的至少两个逻辑值与施加到相位输入之一的脉冲的代表性的前沿和后沿的信号进行比较,以确定相位输入上的脉冲到达顺序序列, 从而提供解码的二进制数据值。