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11. 发明申请

US20090051358A1 Flaw Detector and Flaw Detection Method For Silicon Layer of Wafer 审中-公开
标题翻译：瑕疵检测器和硅片硅片探伤方法
公开(公告)号：US20090051358A1
公开(公告)日：2009-02-26
申请号：US12087993
申请日：2006-09-04
申请人： Tomohisa Shirasaka , Tetsuo Sakaki , Tsuneo Kobayashi
发明人： Tomohisa Shirasaka , Tetsuo Sakaki , Tsuneo Kobayashi
IPC分类号： G01N27/90
CPC分类号： G01N27/902 , G01N27/9026
摘要： The present invention is achieved for the purpose of easily detecting a crack or flaw existing in the silicon layer of a wafer in a short period of time. The flaw detector thus provided includes a coil sensor placed at a predetermined distance from the surface of the silicon layer; a radiofrequency applier for applying a radiofrequency to the coil sensor; a scanner for relatively moving the silicon layer and the coil sensor with a constant distance between the surface of the silicon layer and the coil sensor; and a crack detector for detecting a crack or flaw existing in the silicon layer by detecting the change of a signal provided from the coil sensor or the change in the radiofrequency applied by the radiofrequency applier. The frequency of the radiofrequency applied by the radiofrequency applier may be set between 5 MHz and 200 MHz. This enables a flaw detection for a silicon layer which has been considered to be impossible. In the case where the silicon to be flaw-detected is low resistivity silicon, the frequency applied may be set between 0.5 MHz and 200 MHz.
摘要翻译：本发明是为了容易地在短时间内检测存在于晶片的硅层中的裂纹或缺陷的目的而实现的。由此提供的缺陷检测器包括：距离硅层表面预定距离放置的线圈传感器; 用于向线圈传感器施加射频的射频施加器; 用于使硅层和线圈传感器在硅层的表面与线圈传感器之间具有恒定距离的相对移动的扫描器; 以及裂纹检测器，用于通过检测从线圈传感器提供的信号的变化或由射频施加器施加的射频的变化来检测存在于硅层中的裂纹或缺陷。由射频施加器施加的射频的频率可以设置在5MHz和200MHz之间。这使得已经被认为是不可能的硅层的探伤。在要被探伤的硅是低电阻率硅的情况下，施加的频率可以设置在0.5MHz和200MHz之间。

12. 发明授权

US5128929A Time division switching system capable of broad band communications service 失效
标题翻译：具有宽带通信业务的时分交换系统
公开(公告)号：US5128929A
公开(公告)日：1992-07-07
申请号：US437016
申请日：1989-11-14
申请人： Tsuneo Kobayashi
发明人： Tsuneo Kobayashi
IPC分类号： H04Q11/06
CPC分类号： H04Q11/06
摘要： Sometimes digital data become out of order as it passes through a time division switching system. This invention restores the proper order by transmitting sequence information with the digital data. At the receive end, the data is assembled in its proper and original order in buffer storage means responsive to the sequence information.
摘要翻译：有时数字数据在通过时分交换系统时变得不正常。本发明通过使用数字数据发送序列信息来恢复正确的顺序。在接收端，响应于序列信息，以缓冲存储装置的顺序和原始顺序组合数据。

13. 发明授权

US4135876A Method for simultaneously calcining first kind of pulverized materials containing combustible compounds and second kind of pulverized materials 失效
标题翻译：同时煅烧含有可燃化合物和第二种粉碎材料的第一种粉碎材料的方法
公开(公告)号：US4135876A
公开(公告)日：1979-01-23
申请号：US793413
申请日：1977-05-03
申请人： Norio Nakamura , Satoshi Tominaga , Tsuneo Kobayashi , Mitsuo Nagaoka
发明人： Norio Nakamura , Satoshi Tominaga , Tsuneo Kobayashi , Mitsuo Nagaoka
IPC分类号： C04B7/44 , B01J6/00 , F23D1/00 , F27B7/20 , F27B15/00
CPC分类号： B01J6/002 , F23D1/00 , F27B7/2033 , Y02E20/348
摘要： Disclosed is a method for calcining pulverized raw cement materials or alumina materials prior to a burning process, a first kind of pulverized materials containing combustible compounds and a second kind of pulverized materials being simultaneously calcined.
摘要翻译：公开了一种在燃烧过程之前煅烧粉碎的原料水泥材料或氧化铝材料的方法，第一种含有可燃化合物的粉碎材料和第二种粉碎材料同时煅烧。

14. 发明申请

US20190065672A1 DATA COLLECTION METHOD TO BE USED FOR CLASSIFYING CANCER LIFE 审中-公开
公开(公告)号：US20190065672A1
公开(公告)日：2019-02-28
申请号：US16080465
申请日：2017-02-27
申请人： Tsuneo Kobayashi , Yuriko Uchino
发明人： Tsuneo Kobayashi
IPC分类号： G06F19/18 , G01N27/447 , G01N33/49 , C12Q1/42 , G06F19/16
摘要： Blood serum is applied on a support that has been impregnated in a buffer solution, the support is fractionated by electrophoresis at a predetermined liquid temperature to isolate proteins in the blood serum, an ALP isozyme is detected by color-developing with an ALP isozyme staining solution, the mobility, chromosome shape, density, and the like of each isozyme are determined by matching the protein fraction image against the ALP isozyme, development of a minute cancer that is occurring is discovered, and also the risk of tumor and risk of cancer are evaluated by matching against the analysis results of a tumor marker to classify the life of the cancer for early cancer discovery.

15. 发明授权

US06600567B2 Method and apparatus for inspecting appearance and shape of subject body 有权
标题翻译：用于检查主体外观和形状的方法和装置
公开(公告)号：US06600567B2
公开(公告)日：2003-07-29
申请号：US09737796
申请日：2000-12-18
申请人： Tomoyuki Kaneko , Tokuhiro Murayama , Tsuneo Kobayashi , Takao Kokubu
发明人： Tomoyuki Kaneko , Tokuhiro Murayama , Tsuneo Kobayashi , Takao Kokubu
IPC分类号： G01B1124
CPC分类号： G01M17/027
摘要： A method and an apparatus for inspecting appearance and shape of a subject body is provided. Installation cost and installation space are reduced, working efficiency is superior and judgement accuracy is high. A first picture taking structure takes a picture of a linear portion of a subject body lighted by a first slit light to obtain appearance data, and a second picture taking structure takes a picture of the same linear portion lighted by a second slit light to obtain shape data. The quality of appearance and shape of the subject body is judged based on the appearance data and the shape data.
摘要翻译：提供了一种用于检查被检体的外观和形状的方法和装置。安装成本和安装空间减少，工作效率高，判断准确度高。第一拍摄结构拍摄由第一狭缝光照亮的被摄体的直线部分的图片以获得外观数据，并且第二拍摄结构拍摄由第二狭缝光照亮的相同直线部分的图片以获得形状数据。基于外观数据和形状数据判断被检体的外观和形状的质量。

16. 发明授权

US5210041A Process for manufacturing semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件制造工艺
公开(公告)号：US5210041A
公开(公告)日：1993-05-11
申请号：US732280
申请日：1991-07-18
申请人： Tsuneo Kobayashi , Kensuke Nakata
发明人： Tsuneo Kobayashi , Kensuke Nakata
IPC分类号： H01L21/66
CPC分类号： H01L22/20 , H01L2924/014
摘要： A wafer manufacturing process for a semiconductor integrated circuit device, including testing the semiconductor wafer at a unit of chip each time a predetermined treating step is performed. The test results are feed to a computer control for restricting succeeding treatments or further testing of chip or chips based on the test results and the predetermined number of chips to be produced. Semiconductor wafer(s) is/are loaded for manufacture on the basis of the number of chips to be produced, taking into account of any losses created by defective chips detected during each testing step and any excess created by additional semiconductor wafers loaded in response to shortages created by defects. The excess chips are monitored by the computer control and any succeeding treatments or further testing of the excess chips are halted to save time and manufacturing costs.
摘要翻译：一种用于半导体集成电路器件的晶片制造方法，包括每次执行预定的处理步骤时以芯片为单位测试半导体晶片。测试结果是基于测试结果和要生产的预定数量的芯片馈送到计算机控制器以限制后续处理或芯片或芯片的进一步测试。考虑到在每个测试步骤期间检测到的缺陷芯片产生的任何损耗以及由响应于其中的附加半导体晶片而产生的任何额外的过剩，基于要生产的芯片的数量来加载半导体晶片以进行制造缺陷造成的缺陷。通过计算机控制来监控多余的芯片，并且停止任何后续处理或进一步测试多余的芯片以节省时间和制造成本。

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