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11. 发明授权

US4532589A Digital data processor with two operation units 失效
标题翻译：具有两个操作单元的数字数据处理器
公开(公告)号：US4532589A
公开(公告)日：1985-07-30
申请号：US446002
申请日：1982-12-01
申请人： Yoichi Shintani , Kenichi Wada , Tsuguo Shimizu , Akira Yamaoka
发明人： Yoichi Shintani , Kenichi Wada , Tsuguo Shimizu , Akira Yamaoka
IPC分类号： G06F9/38 , G06F9/00
CPC分类号： G06F9/3889 , G06F9/3824 , G06F9/3836 , G06F9/3885
摘要： In a data processing apparatus executing a plurality of instructions in a pipeline mode by dividing each of the instructions into a plurality of stages, its operation circuit includes a first execution (E) unit capable of execution of operations required by all of the plural instructions and a second E unit capable of execution of operations required by part of the plural instructions only. A queue of data including decoded information of the instructions required for execution of operation stages are stored in a circuit to be selectively supplied by first and second circuits to the first and second E units, respectively. The first and second circuits sequentially select succeeding data in synchronism with the end of operations in the first and second E units respectively. As a result, when a stage of a succeeding instruction requires the result of operation of a preceding instruction being executed, that stage of the succeeding instruction is executed after the second E unit completes the operation of the preceding instruction, even when the first E unit is executing an instruction further preceding the preceding instruction.
摘要翻译：在通过将每个指令分成多个级来执行流水线模式的多个指令的数据处理装置中，其操作电路包括能够执行所有多个指令所需的操作的第一执行（E）单元，以及能够执行多个指令的一部分所需的操作的第二E单元。包括执行操作阶段所需指令的解码信息的数据队列被存储在电路中，以分别由第一和第二电路选择性地提供给第一和第二E单元。第一和第二电路分别顺序地选择与第一和第二E单元中的操作结束同步的后续数据。结果，当后续指令的阶段需要执行前一指令的操作结果时，即使在第一E单元完成了第二E单元完成前一指令的操作之后，执行后续指令的该阶段正在执行进一步在前面的指令之前的指令。

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