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    • 11. 发明授权
    • Plasma etching method
    • 等离子蚀刻法
    • US06914005B2
    • 2005-07-05
    • US10085002
    • 2002-03-01
    • Muneo FuruseMitsuru SuehiroHiroshi KanekiyoKunihiko KoroyasuTomoyuki Tamura
    • Muneo FuruseMitsuru SuehiroHiroshi KanekiyoKunihiko KoroyasuTomoyuki Tamura
    • H01J37/32H01L21/302H01L21/461
    • H01J37/32449H01J37/32082
    • A plasma etching method and apparatus in which a processing gas is supplied from a shower plate arranged on an electrode opposed to an electrode for generating a plasma or a sample toward the sample center, and the gas is transformed into a plasma thereby to etch the sample. RF power is applied between a sample stage and the electrode to apply the energy to charged particles in the plasma to thereby etch the sample. In the process, apart from the incidence of the charged particles to the sample, the charged particles enter also the shower plate of the electrode by application of the RF power. The charged particles entering the processing gas supply holes of the shower plate are neutralized to prevent abnormal discharge on the shower plate and consequently suppress the generation of foreign matter.
    • 一种等离子体蚀刻方法和装置,其中处理气体从布置在与用于产生等离子体或样品的电极相对的电极上的淋浴板供给到样品中心,并且将气体转化为等离子体,从而蚀刻样品 。 在样品台和电极之间施加RF功率以将能量施加到等离子体中的带电粒子上,从而蚀刻样品。 在该过程中,除了带电粒子对样品的入射之外,带电粒子通过施​​加RF功率也进入电极的喷淋板。 进入喷淋板的处理气体供给孔的带电粒子被中和,以防止喷淋板上的异常放电,从而抑制异物的产生。
    • 13. 发明授权
    • Semiconductor wafer processing apparatus and method
    • 半导体晶片加工装置及方法
    • US06549393B2
    • 2003-04-15
    • US09946615
    • 2001-09-06
    • Seiichiro KannoHironobu KawaharaMitsuru SuehiroSaburo KanaiKen Yoshioka
    • Seiichiro KannoHironobu KawaharaMitsuru SuehiroSaburo KanaiKen Yoshioka
    • H02N1300
    • H01L21/67109H01J2237/2001
    • A wafer stage 2 for holding a semiconductor wafer in a plasma treatment apparatus by setting the wafer on the wafer stage, said wafer stage 2 comprising a base material 26 equipped with refrigerant flow paths for allowing a refrigerant for temperature adjustment to flow; a stress-reducing member 28 provided on the wafer setting side of said base material 26 and having a smaller thermal expansion coefficient than does said base material; a dielectric film 30 provided on the wafer setting side of said stress-reducing member; and a deflection-preventing member 29 provided on the wafer non-setting side of said base material and having a smaller thermal expansion coefficient than does said base material. When the wafer stage is used, the temperature of the wafer as a substrate to be processed can be controlled uniformly and very accurately.
    • 晶片载物台2,用于通过将晶片放置在晶片台上,将半导体晶片保持在等离子体处理装置中,所述晶片台2包括配备有制冷剂流路的基材26,所述制冷剂流路用于使用于温度调节的制冷剂流动; 设置在所述基材26的晶片固定侧并且具有比所述基材更小的热膨胀系数的应力减小构件28; 设置在所述减压构件的晶片固定侧的电介质膜30; 以及设置在所述基材的晶片非凝固侧并且具有比所述基材更小的热膨胀系数的防偏转构件29。 当使用晶片台时,可以均匀且非常精确地控制作为被处理基板的晶片的温度。