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    • 14. 发明授权
    • Semiconductor device and manufacturing process therefor
    • 半导体器件及其制造工艺
    • US08330234B2
    • 2012-12-11
    • US12094755
    • 2006-11-21
    • Takashi Hase
    • Takashi Hase
    • H01L29/78H01L21/70H01L23/48H01L23/52H01L29/40H01L21/8238H01L21/336H01L21/3205H01L21/4763H01L21/44
    • H01L21/823842H01L21/28097H01L21/823871H01L29/4975H01L29/66545
    • In a semiconductor device, a gate electrode having a uniform composition prevents deviation in a work function. Controlling a Vth provides excellent operation properties. The semiconductor device includes an NMOS transistor and a PMOS transistor with a common line electrode. The line electrode includes electrode sections (A) and (B) and a diffusion barrier region formed over an isolation region so that (A) and (B) are kept out of contact. The diffusion barrier region meets at least one of: (1) The diffusion coefficient in the above diffusion barrier region of the constituent element of the above electrode section (A) is lower than the interdiffusion coefficient of the constituent element between electrode section (A) materials; and (2) The diffusion coefficient in the above diffusion barrier region of the constituent element of the above electrode section (B) is lower than the interdiffusion coefficient of the constituent element between electrode section (B) materials.
    • 在半导体器件中,具有均匀组成的栅电极防止功函数的偏差。 控制Vth提供优异的操作性能。 半导体器件包括NMOS晶体管和具有公共线电极的PMOS晶体管。 线电极包括电极部分(A)和(B)以及形成在隔离区域上的扩散阻挡区域,使得(A)和(B)保持不接触。 扩散阻挡区域满足以下至少一个:(1)上述电极部分(A)的构成元素的上述扩散阻挡区域中的扩散系数低于电极部分(A)之间的构成元素的相互扩散系数, 材料; (2)上述电极部(B)的构成元素的上述扩散阻挡区域的扩散系数低于电极部(B)材料之间的构成元素的相互扩散系数。
    • 15. 发明授权
    • Method of manufacturing semiconductor device
    • 制造半导体器件的方法
    • US07858462B2
    • 2010-12-28
    • US12046531
    • 2008-03-12
    • Takashi Hase
    • Takashi Hase
    • H01L21/8238
    • H01L21/28097H01L21/823835H01L29/66545
    • A method of manufacturing a semiconductor device including an NMOS transistor and a PMOS transistor is provided. The method includes: forming a silicon layer over a substrate through a gate insulating film; forming a first gate electrode and a second gate electrode by patterning the silicon layer, the first gate electrode being a gate electrode of the NMOS transistor, and the second gate electrode being a gate electrode of the PMOS transistor; selectively forming a silicon oxide film on the first gate electrode which is formed of silicon; after the selectively forming the silicon oxide film, forming a first metallic layer formed of a metal capable of forming a silicide over the first and second gate electrodes; and performing a first heat treatment such that a first silicide layer of a silicide of the first metallic layer is formed.
    • 提供一种制造包括NMOS晶体管和PMOS晶体管的半导体器件的方法。 该方法包括:通过栅极绝缘膜在衬底上形成硅层; 通过图案化硅层形成第一栅电极和第二栅电极,第一栅电极是NMOS晶体管的栅电极,第二栅电极是PMOS晶体管的栅电极; 在由硅形成的第一栅电极上选择性地形成氧化硅膜; 在选择性地形成氧化硅膜之后,在第一和第二栅极上形成能够形成硅化物的金属形成的第一金属层; 以及进行第一热处理,使得形成第一金属层的硅化物的第一硅化物层。
    • 17. 发明申请
    • Nb3Sn superconducting wire, precursor or same, and method for producing precursor
    • Nb3Sn超导线,前驱体等,以及前体的制造方法
    • US20080287303A1
    • 2008-11-20
    • US12081475
    • 2008-04-16
    • Hiroyuki KatoTakashi HaseKyoji Zaitsu
    • Hiroyuki KatoTakashi HaseKyoji Zaitsu
    • H01B12/10H01L39/24H01B12/00
    • H01L39/2409H01L39/14Y10T29/49014
    • A precursor for producing a Nb3Sn superconducting wire includes a bundle of single-element wires each including a Cu or Cu-based alloy matrix, Nb or Nb-based alloy filaments, at least one Sn or Sn-based alloy core, the Nb or Nb-based alloy filaments and at least one Sn or Sn-based alloy core being arranged in the Cu or Cu-based alloy matrix, an diffusion barrier layer around the periphery of the Cu or Cu-based alloy matrix, the inner diffusion barrier layer being composed of Nb or a Nb-based alloy, and a Cu or Cu-based alloy layer around the periphery of the diffusion barrier layer; an outer diffusion barrier layer around the periphery of the bundle of the single-element wires, the outer diffusion barrier layer being composed of Nb, a Nb-based alloy, Ta, a Ta-based alloy, or a combination thereof; and a stabilizing copper layer around the periphery of the outer diffusion barrier layer.
    • 用于制造Nb 3 Sn超导线的前体包括:包含Cu或Cu基合金基体,Nb或Nb基合金细丝,至少一种Sn或Sn的单元线束 基于Nb或Nb的合金芯,并且在Cu或Cu基合金基体中布置有至少一种Sn或Sn基合金芯,围绕Cu或Cu基合金芯的周围的扩散阻挡层 合金基体,内扩散阻挡层由Nb或Nb基合金构成,以及在扩散阻挡层周围的Cu或Cu基合金层; 所述外部扩散阻挡层围绕所述单个元件线束的周围,所述外部扩散阻挡层由Nb,Nb基合金,Ta,Ta基合金或其组合构成; 以及围绕外部扩散阻挡层的周边的稳定的铜层。