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    • 17. 发明申请
    • NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
    • 非易失性半导体存储器件
    • US20090129155A1
    • 2009-05-21
    • US12272161
    • 2008-11-17
    • Yasuhiko HONDATakahiro SUZUKIMasao IWAMOTOKiyochika KINJO
    • Yasuhiko HONDATakahiro SUZUKIMasao IWAMOTOKiyochika KINJO
    • G11C16/00G11C16/04G11C16/06
    • G11C16/10G11C11/5628G11C29/00
    • A nonvolatile semiconductor storage device capable of storing a plurality of bits of data in one memory cell by assigning multivalued data having a higher-order bit selected from one of a pair of data in a first unit and a lower-order bit selected from the other of the pair of data to each threshold voltage of the memory cell, wherein in a first write operation that processes data in the first unit, the logic of one of the higher-order bit and the lower-order bit is fixed, and two pieces of multivalued data that maximize the difference between the threshold voltages are assigned, thereby storing one bit of input data in the one memory cell in a pseudo binary state, and in a second write operation that processes data in a second unit larger than the first unit, a plurality of bits of input data is stored in the one memory cell in a multivalued state, and parity data for error correction in the second unit is stored in the memory cell.
    • 一种非易失性半导体存储装置,其能够通过分配具有从第一单位中选择的一对数据中的一个中选择的高阶位的多值数据和从另一个存储单元中选择的低位位来存储多个数据位在一个存储单元中 所述数据对与所述存储单元的每个阈值电压相关,其中在处理所述第一单元中的数据的第一写入操作中,所述高位和低位中的一个的逻辑被固定,并且两个 分配最大化阈值电压之间的差异的多值数据,从而将一位存储单元中的一位输入数据存储在伪二进制状态,并且在第二写入操作中处理大于第一单元的第二单元中的数据 输入数据的多个位以多值状态存储在一个存储单元中,第二单元中用于纠错的奇偶校验数据被存储在存储单元中。