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11. 发明申请

US20100326709A1 PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：印刷线路板及其制造方法
公开(公告)号：US20100326709A1
公开(公告)日：2010-12-30
申请号：US12817685
申请日：2010-06-17
申请人： Shuichi Kawano , Koichi Tsunoda
发明人： Shuichi Kawano , Koichi Tsunoda
IPC分类号： H05K1/09 , H05K3/10
CPC分类号： H05K3/4644 , H05K3/06 , H05K3/108 , H05K3/388 , H05K3/421 , H05K3/4602 , H05K2201/0175 , H05K2203/0361
摘要： A printed wiring board includes a first insulation layer, a first conductive circuit formed on the first insulation layer, a second insulation layer formed on the first insulation layer and the first conductive circuit and having an opening portion reaching the first conductive circuit, a second conductive circuit formed on the second insulation layer, and a via conductor formed in the opening portion and connecting the first conductive circuit and the second conductive circuit. The via conductor is formed an inner-wall surface of the opening portion and has a seed layer including a nitride compound and/or a carbide compound containing Ti, Zr, Hf, V, Nb, Ta or Si and a plated-metal film formed in the opening portion, and the plated-metal film and the first conductive circuit have at least portions making direct contact.
摘要翻译：印刷电路板包括第一绝缘层，形成在第一绝缘层上的第一导电电路，形成在第一绝缘层上的第二绝缘层和第一导电电路，并具有到达第一导电电路的开口部分，第二导电形成在第二绝缘层上的电路，以及形成在开口部分中并连接第一导电电路和第二导电电路的通孔导体。通孔导体形成为开口部的内壁面，并且具有包含氮化物化合物和/或含有Ti，Zr，Hf，V，Nb，Ta或Si的碳化物的种子层和形成的镀覆金属膜在开口部分中，电镀金属膜和第一导电电路具有直接接触的至少部分。

12. 发明授权

US09068835B2 Functional element, sensor element, electronic apparatus, and method for producing a functional element 有权
标题翻译：功能元件，传感器元件，电子设备以及功能元件的制造方法
公开(公告)号：US09068835B2
公开(公告)日：2015-06-30
申请号：US13449619
申请日：2012-04-18
申请人： Mitsuhiro Yoda , Shuichi Kawano , Shigekazu Takagi , Seiji Yamazaki
发明人： Mitsuhiro Yoda , Shuichi Kawano , Shigekazu Takagi , Seiji Yamazaki
IPC分类号： H05K1/11 , G01C19/5783 , G01P15/08 , G01P15/125
CPC分类号： G01C19/5783 , G01P15/0802 , G01P15/125 , G01P2015/0814 , H05K1/118
摘要： A functional element including a substrate having a principal surface, a groove portion (a first groove portion, a second groove portion) disposed on the principal surface, and a fixed electrode section (a first fixed electrode finger, a second fixed electrode finger) laid across the groove portion on the substrate, wherein, in the groove portion, a raised portion formed by using at least one of the substrate and the fixed electrode section is provided in a position overlapping with the fixed electrode section in a plan view, the raised portion has a bonded surface (an end face), a wiring line (a first wiring line, a second wiring line) is disposed on the bonded surface, and the substrate and the fixed electrode section are connected with the wiring line sandwiched between the substrate and the fixed electrode section.
摘要翻译：一种功能元件，包括具有主表面的基底，设置在主表面上的凹槽部分（第一凹槽部分，第二凹槽部分）和固定电极部分（第一固定电极指，第二固定电极指）横跨基板上的凹槽部分，其中在凹槽部分中，通过使用基板和固定电极部分中的至少一个形成的凸起部分设置在与固定电极部分重叠的位置，平面图中，凸起部分具有接合表面（端面），在接合表面上布置布线（第一布线，第二布线），并且基板和固定电极部分与夹在基板之间的布线相连接和固定电极部。

13. 发明授权

US08997344B2 Method for manufacturing interposer 有权
标题翻译：内插制造方法
公开(公告)号：US08997344B2
公开(公告)日：2015-04-07
申请号：US13183782
申请日：2011-07-15
申请人： Hajime Sakamoto , Shuichi Kawano , Daiki Komatsu , Hiroshi Segawa
发明人： Hajime Sakamoto , Shuichi Kawano , Daiki Komatsu , Hiroshi Segawa
IPC分类号： H01K3/10 , H01L21/48 , H01L23/538 , H01L23/00
CPC分类号： H01L21/4857 , H01L21/486 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L24/16 , H01L2224/13099 , H01L2224/16237 , H01L2224/73204 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/10253 , H01L2924/12042 , H01L2924/15174 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： A method for manufacturing an interposer including forming a first insulating layer comprising an inorganic material on a supporting substrate, forming a first wire in the first insulating layer, forming a second insulating layer on a first side of the first insulating layer, forming a second wire with a longer wire length and a greater thickness than the first wire on the second insulating layer, and removing the supporting substrate.
摘要翻译：一种内插件的制造方法，包括在支撑基板上形成包括无机材料的第一绝缘层，在所述第一绝缘层中形成第一布线，在所述第一绝缘层的第一侧上形成第二绝缘层，形成第二布线具有比第二绝缘层上的第一线更长的线长度和更大的厚度，并且移除支撑衬底。

14. 发明授权

US08436252B2 Printed wiring board and method for manufacturing the same 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US08436252B2
公开(公告)日：2013-05-07
申请号：US12817685
申请日：2010-06-17
申请人： Shuichi Kawano , Koichi Tsunoda
发明人： Shuichi Kawano , Koichi Tsunoda
IPC分类号： H05K1/09 , H05K3/10
CPC分类号： H05K3/4644 , H05K3/06 , H05K3/108 , H05K3/388 , H05K3/421 , H05K3/4602 , H05K2201/0175 , H05K2203/0361
摘要： A printed wiring board includes a first insulation layer, a first conductive circuit formed on the first insulation layer, a second insulation layer formed on the first insulation layer and the first conductive circuit and having an opening portion reaching the first conductive circuit, a second conductive circuit formed on the second insulation layer, and a via conductor formed in the opening portion and connecting the first conductive circuit and the second conductive circuit. The via conductor is formed an inner-wall surface of the opening portion and has a seed layer including a nitride compound and/or a carbide compound containing Ti, Zr, Hf, V, Nb, Ta or Si and a plated-metal film formed in the opening portion, and the plated-metal film and the first conductive circuit have at least portions making direct contact.
摘要翻译：印刷电路板包括第一绝缘层，形成在第一绝缘层上的第一导电电路，形成在第一绝缘层上的第二绝缘层和第一导电电路，并具有到达第一导电电路的开口部分，第二导电形成在第二绝缘层上的电路，以及形成在开口部分中并连接第一导电电路和第二导电电路的通孔导体。通孔导体形成为开口部的内壁面，并且具有包含氮化物化合物和/或含有Ti，Zr，Hf，V，Nb，Ta或Si的碳化物的种子层和形成的镀覆金属膜在开口部分中，电镀金属膜和第一导电电路具有直接接触的至少部分。

15. 发明授权

US07742277B2 Dielectric film capacitor and method of manufacturing the same 有权
标题翻译：介电薄膜电容器及其制造方法
公开(公告)号：US07742277B2
公开(公告)日：2010-06-22
申请号：US11508204
申请日：2006-08-23
申请人： Tomotaka Shinoda , Kinji Yamada , Takahiro Kitano , Yoshiki Yamanishi , Muneo Harada , Tatsuzo Kawaguchi , Yoshihiro Hirota , Katsuya Okumura , Shuichi Kawano
发明人： Tomotaka Shinoda , Kinji Yamada , Takahiro Kitano , Yoshiki Yamanishi , Muneo Harada , Tatsuzo Kawaguchi , Yoshihiro Hirota , Katsuya Okumura , Shuichi Kawano
IPC分类号： H01G4/06 , H01G4/005
CPC分类号： H01L28/65 , H01L27/11507 , H01L28/55 , Y10T29/435
摘要： A dielectric film capacitor includes a lower electrode having an opening and formed of a material including platinum, a dielectric film provided over the lower electrode and including an oxide having an ABOx crystal structure, and an upper electrode provided over the dielectric film. The planar area of the lower electrode is 50% or more of the area of a formation region of the dielectric film. A dielectric film capacitor includes a lower electrode formed of a material including platinum and having a thickness of 10 to 100 nm, a dielectric film provided over the lower electrode and including an oxide having an ABOx crystal structure, and an upper electrode provided over the dielectric film.
摘要翻译：电介质膜电容器包括具有开口并由包括铂的材料形成的下电极，设置在下电极上并包括具有ABOx晶体结构的氧化物的电介质膜和设置在电介质膜上的上电极。下部电极的平面面积为电介质膜的形成区域的面积的50％以上。电介质膜电容器包括由包括铂的材料形成的厚度为10至100nm的下电极，设置在下电极上并包括具有ABOx晶体结构的氧化物的电介质膜，以及设置在电介质上的上电极电影。

16. 发明申请

US20090173530A1 INTERPOSER AND METHOD FOR MANUFACTURING INTERPOSER 有权
标题翻译：插件和制造插件的方法
公开(公告)号：US20090173530A1
公开(公告)日：2009-07-09
申请号：US12345426
申请日：2008-12-29
申请人： Hajime SAKAMOTO , Shuichi Kawano , Daiki Komatsu , Hiroshi Segawa
发明人： Hajime SAKAMOTO , Shuichi Kawano , Daiki Komatsu , Hiroshi Segawa
IPC分类号： H01R12/04 , H05K3/10
CPC分类号： H01L21/4857 , H01L21/486 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L24/16 , H01L2224/13099 , H01L2224/16237 , H01L2224/73204 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/10253 , H01L2924/12042 , H01L2924/15174 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： An interposer includes a first insulating layer made of an inorganic material and having a first land, a second land and a first wiring electrically connecting the first land and the second land, and a second insulating layer formed over a first surface of the first insulating layer and having a second wiring, a second pad for loading a second electronic component over the second insulating layer and a first via conductor electrically connecting the second land and the second wire. The first wiring and the second wiring electrically connect the first land and the second pad. The first land and second land are positioned such that a first electronic component is mounted over a second surface of the first insulating layer on the opposite side of the first surface. The second wiring has a longer wiring length and a greater thickness than the first wiring.
摘要翻译：插入器包括由无机材料制成的第一绝缘层，具有第一焊盘，第二焊盘和电连接第一焊盘和第二焊盘的第一布线，以及形成在第一绝缘层的第一表面上的第二绝缘层并具有第二布线，用于将第二电子部件装载在第二绝缘层上的第二焊盘和电连接第二焊盘和第二焊丝的第一通孔导体。第一布线和第二布线将第一焊盘和第二焊盘电连接。第一平台和第二平台被定位成使得第一电子部件安装在第一绝缘层的与第一表面相反的一侧的第二表面上。第二布线具有比第一布线更长的布线长度和更大的厚度。

17. 发明授权

US07911802B2 Interposer, a method for manufacturing the same and an electronic circuit package 有权
标题翻译：内插器，其制造方法和电子电路封装
公开(公告)号：US07911802B2
公开(公告)日：2011-03-22
申请号：US11949795
申请日：2007-12-04
申请人： Shuichi Kawano , Liyi Chen
发明人： Shuichi Kawano , Liyi Chen
IPC分类号： H05K1/18
CPC分类号： H01G4/35 , H01G4/01 , H01G4/236 , H01L2224/16265 , H01L2924/15311 , H01L2924/157 , H01L2924/19011 , H01L2924/19041 , H01L2924/19103 , Y10T29/49165
摘要： An interposer including: a substrate including a first layer and second layer, wherein the first layer and second layer are positioned parallel to each other; electrodes each having a concave-convex structure formed on each facing surface of the first layer and second layer of the substrate; a dielectric layer sandwiched between the electrodes which are formed on each facing surface of the first layer and second layer of the substrate; a first conductive part which vertically passes through the first layer of the substrate from a first outer surface of the substrate and is electrically connected to an electrode formed on a surface of the second layer of the substrate that faces the first layer of the substrate; and a second conductive part which vertically passes through the second layer of the substrate from a second outer surface of the substrate and is electrically connected to an electrode formed on a surface of the first layer of the substrate that faces the second layer of the substrate.
摘要翻译：一种插入器，包括：包括第一层和第二层的衬底，其中所述第一层和第二层彼此平行地定位; 每个具有形成在基板的第一层和第二层的每个相对表面上的凹凸结构的电极; 夹在电极之间的电介质层，其形成在基板的第一层和第二层的每个相对表面上; 第一导电部件，其从衬底的第一外表面垂直地穿过衬底的第一层，并且电连接到形成在衬底的面向衬底的第一层的第二层的表面上的电极; 以及第二导电部件，其从所述基板的第二外表面垂直地穿过所述基板的所述第二层，并且电连接到形成在所述基板的所述第一层的面向所述基板的第二层的表面上的电极。

18. 发明申请

US20090231827A1 INTERPOSER AND METHOD FOR MANUFACTURING INTERPOSER 有权
标题翻译：插件和制造插件的方法
公开(公告)号：US20090231827A1
公开(公告)日：2009-09-17
申请号：US12336697
申请日：2008-12-17
申请人： Toshiki Furutani , Atsushi Sakai , Kiyohisa Hasegawa , Hiroshi Segawa , Shuichi Kawano , Hajime Sakamoto
发明人： Toshiki Furutani , Atsushi Sakai , Kiyohisa Hasegawa , Hiroshi Segawa , Shuichi Kawano , Hajime Sakamoto
IPC分类号： H05K7/02 , H01L23/48 , C23F1/00
CPC分类号： H01L23/49822 , H01L23/49816 , H01L23/49827 , H01L2224/16 , H01L2224/16235 , H01L2924/01004 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15192 , H01L2924/19107
摘要： An interposer and a method of manufacturing the same are provided. The interposer includes a substrate and a conductor portion formed inside the substrate. At least one insulating layer is formed on the substrate and on the conductor portion. A signal wiring portion is formed inside the insulating layer or on the insulating layer. A first pad is configured to receive an electronic part, and is formed on an outermost insulating layer of the at least one insulating layer. A connection conductor is formed in the at least one insulating layer so as to electrically connect the conductor portion to the first pad.
摘要翻译：提供了插入件及其制造方法。内插件包括基板和形成在基板内部的导体部分。在基板上和导体部分上形成至少一个绝缘层。在绝缘层内或绝缘层上形成信号布线部分。第一焊盘被配置为接收电子部件，并且形成在所述至少一个绝缘层的最外绝缘层上。连接导体形成在所述至少一个绝缘层中，以便将导体部分电连接到第一焊盘。

19. 发明授权

US07589394B2 Interposer 有权
标题翻译：内插
公开(公告)号：US07589394B2
公开(公告)日：2009-09-15
申请号：US11969606
申请日：2008-01-04
申请人： Shuichi Kawano
发明人： Shuichi Kawano
IPC分类号： H01L29/00 , H01L23/52 , H01L23/48 , H01L29/40 , H01L27/08 , H05K1/18
CPC分类号： H05K1/162 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L2924/0002 , H01L2924/3011 , H05K3/3436 , H05K3/423 , H05K2201/0179 , H05K2201/09763 , H05K2201/10378 , H05K2201/10734 , H05K2203/0733 , H01L2924/00
摘要： An interposer is constructed with a substrate body having first and second through-holes, a capacitor formed by a laminating dielectric layer and a second electrode portion on a first electrode portion, which is structured on inner surfaces of first and second through-holes and on the first surface of the substrate body. An insulation layer is formed by filling insulation material in the space within the first through-hole surrounded by second electrode portion, and a first post passes through the insulation layer, one end being electrically connected to the first electrode portion, while the first post is electrically insulated from the second electrode portion. Furthermore, a second post is formed in the second through-hole, and is connected to the second electrode portion at its peripheral surface while being electrically insulated from the first electrode portion.
摘要翻译：内插件由具有第一通孔和第二通孔的基板本体构成，电容器由第一电极部分上的叠层电介质层和第二电极部分构成，该第一电极部分构造在第一通孔和第二通孔的内表面上，衬底主体的第一表面。通过在由第二电极部包围的第一通孔内的空间内填充绝缘材料形成绝缘层，第一柱通过绝缘层，一端电连接到第一电极部分，而第一柱为与第二电极部分电绝缘。此外，第二通孔形成在第二通孔中，并且在与第一电极部分电绝缘的同时在其外周面与第二电极部分连接。

20. 发明申请

US20090173522A1 INTERPOSER AND METHOD FOR MANUFACTURING INTERPOSER 有权
标题翻译：插件和制造插件的方法
公开(公告)号：US20090173522A1
公开(公告)日：2009-07-09
申请号：US12345349
申请日：2008-12-29
申请人： Hajime Sakamoto , Shuichi Kawano , Daiki Komatsu , Toshiki Furutani , Hiroshi Segawa
发明人： Hajime Sakamoto , Shuichi Kawano , Daiki Komatsu , Toshiki Furutani , Hiroshi Segawa
IPC分类号： H05K1/02 , H05K13/00
CPC分类号： H01L23/5386 , H01L21/4857 , H01L21/486 , H01L23/5383 , H01L23/5384 , H01L2224/16 , H01L2924/01004 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/15192 , H01L2924/3011 , Y10T29/49155
摘要： An interposer having a support substrate, a first insulation layer made of an inorganic material and formed over the support substrate, and a second insulation layer formed over the first insulation layer. The first insulation layer has a first land, a second land and a first wiring electrically connecting the first land and the second land. The second insulation layer has a first pad positioned to load a first electronic component, a second pad positioned to load a second electronic component, a second wiring electrically connected to the second pad, a first via conductor electrically connecting the first land and the first pad, and a second via conductor electrically connecting the second land and the second wiring. The first wiring and second wiring electrically connect the first pad and the second pad, and the second wiring has a lower wiring resistance per unit length than the first wiring.
摘要翻译：具有支撑衬底的中介层，由无机材料制成并形成在支撑衬底上的第一绝缘层，以及形成在第一绝缘层上的第二绝缘层。第一绝缘层具有第一焊盘，第二焊盘和电连接第一焊盘和第二焊盘的第一布线。所述第二绝缘层具有第一焊盘，所述第一焊盘定位成装载第一电子部件，第二焊盘定位成装载第二电子部件，电连接到所述第二焊盘的第二焊盘，将所述第一焊盘和所述第一焊盘电连接的第一通孔导体以及电连接第二焊盘和第二布线的第二通孔导体。第一布线和第二布线将第一焊盘和第二焊盘电连接，并且第二布线具有比第一布线更低的每单位长度的布线电阻。

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