专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20070005280A1 Photomask quality estimation system and method for use in manufacturing of semiconductor device, and method for manufacturing the semiconductor device 失效
标题翻译：用于制造半导体器件的光掩模质量估计系统和方法以及半导体器件的制造方法
公开(公告)号：US20070005280A1
公开(公告)日：2007-01-04
申请号：US11475075
申请日：2006-06-27
申请人： Yukiyasu Arisawa , Tadahito Fujisawa , Shoji Mimotogi
发明人： Yukiyasu Arisawa , Tadahito Fujisawa , Shoji Mimotogi
IPC分类号： G06F19/00
CPC分类号： G03F1/84
摘要： A photomask quality estimation system comprises a measuring unit, a latitude computation unit and an estimation unit. The measuring unit measures the mask characteristic of each of a plurality of chip patterns formed on a mask substrate. The latitude computation unit computes the exposure latitude of each chip pattern based on the mask characteristic. The estimation unit estimates the quality of each chip pattern based on the exposure latitude.
摘要翻译：光掩模质量估计系统包括测量单元，纬度计算单元和估计单元。测量单元测量形成在掩模基板上的多个芯片图案中的每一个的掩模特性。纬度计算单元基于掩模特性来计算每个码片模式的曝光宽容度。估计单元基于曝光宽容度估计每个芯片图案的质量。

12. 发明授权

US07365830B2 Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method 有权
标题翻译：晶片平坦度评估方法，执行评估方法的晶片平整度评估装置，使用评估方法的晶片制造方法，使用评估方法的晶片质量保证方法，使用评估方法的半导体器件制造方法和使用由评估方法
公开(公告)号：US07365830B2
公开(公告)日：2008-04-29
申请号：US11710410
申请日：2007-02-26
申请人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
发明人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
IPC分类号： G03B27/58 , G03B27/32 , G03B27/52
CPC分类号： G01B21/30 , G01B11/306 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
摘要翻译：公开了一种晶片平坦度评估方法，其包括测量晶片的前后表面形状。测量的晶圆正面分为几个部位。然后，根据要评估的位置的位置选择平坦度计算方法，并获得晶片表面的平坦度。

13. 发明授权

US07108945B2 Photomask having a focus monitor pattern 失效
公开(公告)号：US07108945B2
公开(公告)日：2006-09-19
申请号：US10396309
申请日：2003-03-26
申请人： Takumichi Sutani , Kyoko Izuha , Tadahito Fujisawa , Soichi Inoue
发明人： Takumichi Sutani , Kyoko Izuha , Tadahito Fujisawa , Soichi Inoue
IPC分类号： G01F9/00
CPC分类号： G03F7/70641 , G03F1/44
摘要： A photomask has a device pattern, which has an opening portion and a mask portion, and either a focus monitor pattern or an exposure dose monitor pattern, which has an opening portion and a mask portion and which has the same plane pattern shape as at least a partial region of a device pattern. The phase difference in transmitted exposure light between the opening portion and the mask portion of the focus monitor pattern is different from that between the opening portion and the mask portion of the device pattern. The opening portion of the exposure dose monitor pattern has a different exposure dose transmittance from that of the opening portion of the device pattern.

14. 发明授权

US06440616B1 Mask and method for focus monitoring 失效
标题翻译：面罩和方法进行焦点监控
公开(公告)号：US06440616B1
公开(公告)日：2002-08-27
申请号：US09671501
申请日：2000-09-27
申请人： Kyoko Izuha , Tadahito Fujisawa , Soichi Inoue
发明人： Kyoko Izuha , Tadahito Fujisawa , Soichi Inoue
IPC分类号： G03F900
CPC分类号： G03F7/70641 , G03F1/26 , G03F1/44
摘要： There is disclosed a focus-monitoring mask which is adapted to be employed on an occasion of transferring a pattern on a wafer by way of photolithography, the mask comprising a first pattern region having at least one first monitor pattern which is constituted by a first opening surrounded by a first film or constituted by the first film surrounded by the first opening, and a second pattern region having at least one second monitor pattern which is constituted by a second opening surrounded by a second film or constituted by the second film surrounded by the second opening, and is capable of giving a predetermined phase difference to an exposure light passing through the second film relative to an exposure light passing through the second opening, wherein the first and second monitor patterns have a configuration in which both ends thereof are tapered from a central portion thereof.
摘要翻译：公开了一种适于在通过光刻法在晶片上转印图案的情况下采用的聚焦监视掩模，该掩模包括具有至少一个第一监视器图案的第一图案区域，该第一图案区域由第一开口由第一膜包围或由第一膜包围的第一膜构成的第二图案区域和具有至少一个第二监测图案的第二图案区域，该第二图案区域由第二开口构成，第二开口由第二膜包围或由第二膜包围，并且能够相对于通过第二开口的曝光光对通过第二膜的曝光光赋予预定的相位差，其中第一和第二监视器图案具有其两端从其中心部分。

15. 发明授权

US07474386B2 Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method 有权
标题翻译：晶片平坦度评估方法，执行评估方法的晶片平整度评估装置，使用评估方法的晶片制造方法，使用评估方法的晶片质量保证方法，使用评估方法的半导体器件制造方法和使用由评估方法
公开(公告)号：US07474386B2
公开(公告)日：2009-01-06
申请号：US11710552
申请日：2007-02-26
申请人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
发明人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
IPC分类号： G03B27/58 , G03B27/32 , G03B27/52
CPC分类号： G01B21/30 , G01B11/306 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
摘要翻译：公开了一种晶片平坦度评估方法，其包括测量晶片的前后表面形状。测量的晶圆正面分为几个部位。然后，根据要评估的位置的位置选择平坦度计算方法，并获得晶片表面的平坦度。

16. 发明申请

US20070177126A1 Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method 有权
公开(公告)号：US20070177126A1
公开(公告)日：2007-08-02
申请号：US11710410
申请日：2007-02-26
申请人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
发明人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
IPC分类号： G03B27/58
CPC分类号： G01B21/30 , G01B11/306 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.

17. 发明授权

US06376139B1 Control method for exposure apparatus and control method for semiconductor manufacturing apparatus 失效
标题翻译：半导体制造装置的曝光装置的控制方法和控制方法
公开(公告)号：US06376139B1
公开(公告)日：2002-04-23
申请号：US09671502
申请日：2000-09-27
申请人： Tadahito Fujisawa , Soichi Inoue , Kenji Kawano , Shinichi Ito , Ichiro Mori
发明人： Tadahito Fujisawa , Soichi Inoue , Kenji Kawano , Shinichi Ito , Ichiro Mori
IPC分类号： G03F900
CPC分类号： G03F7/70625 , G03F7/70633 , G03F7/70641
摘要： A control method for an exposure apparatus, in which an exposure amount and a focus value are set in transferring a circuit pattern on a mask onto a resist formed on a wafer by the exposure apparatus, includes the steps of arranging, on the mask, an exposure amount monitor mark and a focus monitor mark used to separately monitor the effective exposure amount and the focus value on the wafer, transferring the exposure amount monitor mark and the focus monitor mark onto the resist to form an exposure amount monitor pattern and a focus monitor pattern, measuring the states of the exposure amount monitor pattern and the focus monitor pattern at least at one of timings after exposure, after post exposure baking, during a cooling process after baking, during a process after cooling, during development, and after development, on the basis of the measurement results, calculating the difference between an optimum exposure amount value and an exposure amount set value set in the exposure apparatus and the difference between an optimum focus value and a focus set value set in the exposure apparatus in transferring the exposure amount monitor mark and the focus monitor mark onto the resist, and changing the focus set value and the exposure amount set value of the exposure apparatus in accordance with the calculated differences.
摘要翻译：一种曝光装置的控制方法，其中设置曝光量和聚焦值以将掩模上的电路图案转印到通过曝光装置在晶片上形成的抗蚀剂上的步骤包括以下步骤：在掩模上布置曝光量监视标记和用于分别监视晶片上的有效曝光量和聚焦值的聚焦监视器标记，将曝光量监视标记和聚焦监视标记转印到抗蚀剂上以形成曝光量监视器图案和聚焦监视器至少在曝光后的定时，曝光后烘烤，烧成后的冷却过程中，冷却后，显影处理和显影后的处理中，至少测定曝光量监视器图案和聚焦监视器图案的状态，基于测量结果，计算最佳曝光量值与曝光设定中设定的曝光量设定值之间的差以及将曝光量监视标记和聚焦监视标记转印到抗蚀剂上的曝光装置中设置的最佳聚焦值和聚焦设定值之间的差异，并且改变曝光的聚焦设定值和曝光量设定值仪器按照计算出的差异。

18. 发明授权

US5627626A Projectin exposure apparatus 失效
标题翻译：投影仪曝光装置
公开(公告)号：US5627626A
公开(公告)日：1997-05-06
申请号：US468327
申请日：1995-06-06
申请人： Soichi Inoue , Tadahito Fujisawa , Shin-ichi Ito , Takashi Sato , Shuichi Tamamushi , Keiji Horioka
发明人： Soichi Inoue , Tadahito Fujisawa , Shin-ichi Ito , Takashi Sato , Shuichi Tamamushi , Keiji Horioka
IPC分类号： G03F7/20 , G03B27/42
CPC分类号： G03F7/70066 , G03F7/70091 , G03F7/701 , G03F7/70125 , G03F7/70241 , G03F7/70333
摘要： A projection exposure apparatus is constituted by a first focusing optical system for focusing light from a mercury-vapor lamp as a light source, a uniforming optical system for uniforming the focused light, a second focusing optical system for focusing the uniformed light and radiating the light onto a reticle mask, and a projection optical system for projecting the light, transmitted through the reticle, onto a wafer. A special stop is arranged as a secondary source for uniformly illuminating the mask. The special stop serves to set an intensity distribution within the exit plane of the secondary source so that intensities of both peripheral and central portions are larger than an intensity of an intermediate portion. In addition, the apparatus includes a halftone mask which allows an amplitude transmittance T of the translucent film and an amplitude transmittance T0 of the light-transmitting substrate to satisfy 0.01.times.TO
摘要翻译：投影曝光装置由用于聚焦来自水银灯的光作为光源的第一聚焦光学系统，用于使聚焦光均匀的均匀的光学系统，用于聚焦均匀的光并照射光的第二聚焦光学系统以及用于将透过该掩模版的光投射到晶片上的投影光学系统。布置特殊停止点作为均匀照明面罩的次要源。特殊止挡用于设定次级源的出射平面内的强度分布，使得外周和中心部分的强度大于中间部分的强度。此外，该装置包括半透明掩模，该半色调掩模允许透光性膜的振幅透射率T和透光性基板的振幅透过率T0满足0.01×D0或= T <= 0.30×YTO。通过透光性基板的光的相位差由180×（2n + 1）+或-30（度）（n为整数）表示。

19. 发明申请

US20070177127A1 Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method 有权
标题翻译：晶片平坦度评估方法，执行评估方法的晶片平整度评估装置，使用评估方法的晶片制造方法，使用评估方法的晶片质量保证方法，使用评估方法的半导体器件制造方法和使用由评估方法
公开(公告)号：US20070177127A1
公开(公告)日：2007-08-02
申请号：US11710552
申请日：2007-02-26
申请人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
发明人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
IPC分类号： G03B27/58
CPC分类号： G01B21/30 , G01B11/306 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
摘要翻译：公开了一种晶片平坦度评估方法，其包括测量晶片的前后表面形状。测量的晶圆正面分为几个部位。然后，根据要评估的位置的位置选择平坦度计算方法，并获得晶片表面的平坦度。

20. 发明授权

US07230680B2 Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method 有权
公开(公告)号：US07230680B2
公开(公告)日：2007-06-12
申请号：US10739275
申请日：2003-12-19
申请人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
发明人： Tadahito Fujisawa , Soichi Inoue , Makoto Kobayashi , Masashi Ichikawa , Tsuneyuki Hagiwara , Kenichi Kodama
IPC分类号： G03B27/58 , G03B27/42
CPC分类号： G01B21/30 , G01B11/306 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式