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11. 发明申请

WO2019071160A1 LIGHT EMITTING DIODE CONTAINING OXIDIZED METAL CONTACTS 审中-公开
公开(公告)号：WO2019071160A1
公开(公告)日：2019-04-11
申请号：PCT/US2018/054659
申请日：2018-10-05
申请人： GLO AB
发明人： DANESH, Fariba , LAU, Tsun , SCHNEIDER JR., Richard P. , JANSEN, Michael , BATRES, Max
IPC分类号： H01L33/00 , H01L33/02 , H01L33/10 , H01L27/15
摘要： A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.

12. 发明申请

WO2019240894A1 EPITAXIAL GALLIUM NITRIDE BASED LIGHT EMITTING DIODE AND METHOD OF MAKING THEREOF 审中-公开
公开(公告)号：WO2019240894A1
公开(公告)日：2019-12-19
申请号：PCT/US2019/030904
申请日：2019-05-06
申请人： GLO AB
发明人： DANESH, Fariba , REN, Fan , YAN, Shuke , CHEN, Zhen
IPC分类号： H01L33/00 , H01L33/14 , H01L33/04
摘要： A light emitting diode includes a n-doped region, a p-doped region, and a light emitting region located between the n-doped region and a p-doped region. The n-doped region includes a first GaN layer, at least one n-doped second GaN layer located over the first GaN layer, an AlGaN dislocation blocking layer located over the at least one n-doped second GaN layer, and a n-doped third GaN layer located over the AlGaN dislocation blocking film.

13. 发明申请

WO2019199946A1 LIGHT EMITTING DIODES FORMED ON NANODISK SUBSTRATES AND METHODS OF MAKING THE SAME 审中-公开
公开(公告)号：WO2019199946A1
公开(公告)日：2019-10-17
申请号：PCT/US2019/026758
申请日：2019-04-10
申请人： GLO AB
发明人： SCHNEIDER, JR., Richard P. , LEUNG, Benjamin , DANESH, Fariba , TEZCAN OZEL, Zulal , TSAI, Miao-Chan
IPC分类号： H01L33/04 , H01L33/22 , H01L33/62 , H01L27/15 , H01L33/00
摘要： A light emitting device, such as an LED, is formed by forming a plurality of semiconductor nanostructures having a doping of a first conductivity type through, and over, a growth mask layer overlying a doped compound semiconductor layer. Each of the plurality of semiconductor nanostructures includes a nanofrustum including a bottom surface, a top surface, tapered planar sidewalls, and a height that is less than a maximum lateral dimension of the top surface, and a pillar portion contacting the bottom surface of the nanofrustum and located within a respective one of the openings through the growth mask layer. A plurality of active regions on the nanofrustums. A second conductivity type semiconductor material layer is formed on each of the plurality of active regions.

14. 发明申请

WO2019199547A1 LED BACKPLANE HAVING PLANAR BONDING SURFACES AND METHOD OF MAKING THEREOF 审中-公开
公开(公告)号：WO2019199547A1
公开(公告)日：2019-10-17
申请号：PCT/US2019/025622
申请日：2019-04-03
申请人： GLO AB
发明人： DANESH, Fariba , GALLAGHER, Timothy , POKHRIYAL, Anusha , LAU, Tsun
IPC分类号： H01L25/075 , H01L33/48 , H01L33/36 , H01L33/62 , H01L33/00
摘要： A backplane can have a non-planar top surface. Insulating material portions including planar top surface regions located within a same horizontal plane are formed over the backplane. A two-dimensional array of metal plate clusters is formed over the insulating material portions. Each of the metal plate clusters includes a plurality of metal plates. Each metal plate includes a horizontal metal plate portion overlying a planar top surface region and a connection metal portion connected to a respective metal interconnect structure in the backplane. A two-dimensional array of light emitting device clusters is bonded to the backplane through respective bonding structures. Each light emitting device cluster includes a plurality of light emitting devices overlying a respective metal plate cluster.

15. 发明申请

WO2019055271A1 ETENDUE ENHANCEMENT FOR LIGHT EMITTING DIODE SUBPIXELS 审中-公开
公开(公告)号：WO2019055271A1
公开(公告)日：2019-03-21
申请号：PCT/US2018/049667
申请日：2018-09-06
申请人： GLO AB , DANESH, Fariba
发明人： DANESH, Fariba , LEUNG, Benjamin , LAU, Tsun , TEZCAN, Zulal , TSAI, Miao-Chan , BATRES, Max , CICH, Michael
IPC分类号： H01L27/15 , H01L33/10 , H01L33/00 , H01L33/36 , H01L33/62 , H01L33/16
摘要： A method of forming a light emitting device includes forming a growth mask layer including openings on a doped compound semiconductor layer, forming first light emitting diode (LED) subpixels by forming a plurality of active regions and second conductivity type semiconductor material layers employing selective epitaxy processes, and transferring each first LED subpixel to a backplane. An anode contact electrode may be formed on the second conductivity type semiconductor material layers for redundancy. The doped compound semiconductor layer may be patterned with tapered sidewalls to enhance etendue. An optically clear encapsulation matrix may be formed on the doped compound semiconductor material layer to enhance etendue. Lift-off processes may be employed for the active regions. Cracking of the LEDs may be suppressed employing a thick reflector layer.

16. 发明申请

WO2019036439A1 METHOD OF MAKING A SEMICONDUCTOR DEVICE USING NANO-IMPRINT LITHOGRAPHY FOR FORMATION OF A SELECTIVE GROWTH MASK 审中-公开
公开(公告)号：WO2019036439A1
公开(公告)日：2019-02-21
申请号：PCT/US2018/046646
申请日：2018-08-14
申请人： GLO AB , TEZCAN, Zulal Ozel
发明人： TEZCAN, Zulal Ozel , LAU, Tsun , LEUNG, Benjamin , DANESH, Fariba
IPC分类号： G03F7/00 , G03F7/20 , H01L21/768 , H01L21/027 , H01L21/033
摘要： A growth mask layer is formed over a semiconductor material layer on a substrate. Optionally, a patterned hard mask layer can be formed over the growth mask layer. A nano-imprint lithography (NIL) resist layer is applied, and is imprinted with a pattern of recesses by stamping. The pattern in the NIL resist layer through the growth mask layer to provide a patterned growth mask layer with clusters of openings therein. If a patterned hard mask layer is employed, the patterned hard mask can prevent transfer of the pattern in the area covered by the patterned hard mask layer. Semiconductor material portions, such as nanowires can be formed in a cluster configuration through the clusters of openings in the patterned growth mask layer. Alignment marks can be formed concurrently with formation of semiconductor material portions by employing nano-imprint lithography.

17. 发明授权

EP3235347B1 METHOD OF MAKING A LIGHT EMITTING DIODE ARRAY ON A BACKPLANE 有权转让
公开(公告)号：EP3235347B1
公开(公告)日：2020-05-13
申请号：EP15871062.4
申请日：2015-12-17
申请人： GLO AB
发明人： GARDNER, Nathan F. , KISH, Fredrick A., JR. , MODRIC, Miljenko , POKHRIYAL, Anusha , THOMPSON, Daniel , DANESH, Fariba
IPC分类号： H01L25/075 , H01L23/00 , H01L25/00 , H01L33/00 , H01L33/62

18. 发明公开

EP3776655A1 LED BACKPLANE HAVING PLANAR BONDING SURFACES AND METHOD OF MAKING THEREOF 审中-实审转让
公开(公告)号：EP3776655A1
公开(公告)日：2021-02-17
申请号：EP19784675.1
申请日：2019-04-03
申请人： GLO AB
发明人： DANESH, Fariba , GALLAGHER, Timothy , POKHRIYAL, Anusha , LAU, Tsun
IPC分类号： H01L25/075 , H01L33/48 , H01L33/36 , H01L33/62 , H01L33/00

19. 发明公开

EP3235014A1 LIGHT EMITTING DIODE ARRAY ON A BACKPLANE AND METHOD OF MAKING THEREOF 有权转让
标题翻译：背光板上的发光二极管阵列及其制造方法
公开(公告)号：EP3235014A1
公开(公告)日：2017-10-25
申请号：EP15871065.7
申请日：2015-12-17
申请人： GLO AB
发明人： GARDNER, Nathan F. , KISH, JR., Fredrick A. , MODRIC, Miljenko , POKHRIYAL, Anusha , THOMPSON, Daniel Bryce , DANESH, Fariba , FARRENS, Sharon N.
IPC分类号： H01L33/48 , H01L33/62
摘要： A backplane optionally having stepped horizontal surfaces and optionally embedding metal interconnect structures is provided. First conductive bonding structures are formed on first stepped horizontal surfaces. First light emitting devices on a first transfer substrate are disposed on the first conductive bonding structures, and a first subset of the first light emitting devices is bonded to the first conductive bonding structures. Laser irradiation can be employed to selectively disconnect the first subset of the first light emitting devices from the first transfer substrate while a second subset of the first light emitting devices remains attached to the first transfer substrate. Additional devices on each additional transfer substrate can be bonded to additional conductive bonding structures on the backplane employing the same method provided that the additional devices are not present in positions that would overlap with pre-existing first light emitting devices or devices on the backplane at a bonding position.
摘要翻译：提供了可选地具有阶梯式水平表面并可选地嵌入金属互连结构的背板。第一导电键合结构形成在第一阶梯式水平表面上。第一传导衬底上的第一发光器件设置在第一导电接合结构上，并且第一发光器件的第一子集接合到第一导电接合结构。可以使用激光照射来选择性地将第一发光器件的第一子集与第一转移衬底断开连接，而第二发光器件的第二子集保持连接到第一转移衬底。使用相同的方法，可以将每个附加转移基板上的附加器件接合到背板上的附加导电接合结构，只要附加器件不存在于与背板上预先存在的第一发光器件或器件重叠的位置上粘合位置。

20. 发明公开

EP3891816A1 LIGHT EMITTING DIODES CONTAINING DEACTIVATED REGIONS AND METHODS OF MAKING THE SAME 审中-实审转让
公开(公告)号：EP3891816A1
公开(公告)日：2021-10-13
申请号：EP19894094.2
申请日：2019-11-15
申请人： GLO AB
发明人： BATRES, Max , CICH, Michael J. , CHEN, Zhen , DANESH, Fariba
IPC分类号： H01L33/00 , H01L33/14 , H01L33/60 , H01L33/36

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