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    • 12. 发明授权
    • Performance controller for a step down current mode switching regulator
    • 用于降压电流模式开关稳压器的性能控制器
    • US07282900B2
    • 2007-10-16
    • US11206977
    • 2005-08-19
    • Richard K. OswaldTamotsu YamamotoTakashi RyuMikio MotomoriTakuya Ishii
    • Richard K. OswaldTamotsu YamamotoTakashi RyuMikio MotomoriTakuya Ishii
    • G05F1/40
    • H02M3/1588Y02B70/1466
    • A method of regulating an output voltage by utilizing a switching regulator, where the switching regulator includes a high side switch, a low side switch having an active diode, a controller coupled to the high side switch and the low side switch, and a current measuring circuit coupled to the high side switch. The method includes the steps of: measuring the output voltage and if the output voltage is below a desired level, activating the high side switch so as to provide current to a load capacitor via a load inductor, if the voltage is above the desired level, activating the low side switch so as to sink current from the load capacitor via the load inductor; and utilizing the current measuring circuit to measure the current flowing through the high side switch in either a positive direction or a negative direction, where the controller is operable for controlling the current measuring circuit and disabling active components contained in the current measuring circuit and the active diode when the active components are not utilized during operation of the switching regulator so as to reduce operational power requirements of the switching regulator.
    • 一种通过利用开关调节器调节输出电压的方法,其中开关调节器包括高侧开关,具有有源二极管的低侧开关,耦合到高侧开关和低侧开关的控制器以及电流测量 电路耦合到高侧开关。 该方法包括以下步骤:测量输出电压,并且如果输出电压低于期望电平,则激活高侧开关以便通过负载电感器向负载电容器提供电流,如果电压高于所需电平, 激活低侧开关,以便经由负载电感器从负载电容器吸收电流; 并利用电流测量电路来测量在正方向或负方向上流过高侧开关的电流,其中控制器可操作用于控制电流测量电路并禁用包含在电流测量电路中的有源元件和有源 当在开关调节器的操作期间不使用有源组件以减少开关调节器的操作功率需求时,二极管。
    • 13. 发明授权
    • Current mode switching regulator with predetermined on time
    • 电流模式开关稳压器,具有预定的时间
    • US07250746B2
    • 2007-07-31
    • US11092814
    • 2005-03-30
    • Richard K. OswaldTamotsu YamamotoHiroshi SaitoTakuya IshiiTakashi RyuHiroki AkashiTakeshi Tanaka
    • Richard K. OswaldTamotsu YamamotoHiroshi SaitoTakuya IshiiTakashi RyuHiroki AkashiTakeshi Tanaka
    • G05F1/618G05F1/575
    • H02M3/156
    • A power supply switching regulator including a common terminal; an input terminal for supplying a direct current input; an output terminal; a recirculating diode having a first terminal connected to the common terminal; an inductor having a first terminal connected to a second terminal of the recirculation diode and a second terminal connected to the output terminal; a capacitor having a first terminal connected to the output terminal and a second terminal connected to the common terminal; a switch connected between the input terminal and the first terminal of the inductor, the switch operable for switching between an ON state in which the direct current input is coupled to the inductor, and an OFF state in which the direct current input is isolated from the inductor; and a controller coupled to the switch and operable for controlling the amount of time the switch is in the ON state and the OFF state such that the duration of time the switch is in the ON state is inversely proportional to the difference between the voltage at the input terminal and the voltage at the output terminal.
    • 一种电源开关调节器,包括公共端子; 用于提供直流输入的输入端; 输出端子; 循环二极管,其具有连接到所述公共端子的第一端子; 电感器,其具有连接到所述再循环二极管的第二端子的第一端子和连接到所述输出端子的第二端子; 电容器,其具有连接到所述输出端子的第一端子和连接到所述公共端子的第二端子; 连接在电感器的输入端子和第一端子之间的开关,所述开关可操作用于在其中直流输入耦合到电感器的导通状态和直流输入与电感器隔离的截止状态之间切换 电感; 以及控制器,其耦合到所述开关并且可操作用于控制所述开关处于导通状态和断开状态的时间量,使得所述开关处于导通状态的持续时间与所述开关处于所述开关状态的电压之间的差成反比 输入端子和输出端子的电压。
    • 16. 发明授权
    • Digital-analog driver for brushless D.C. spindle motor
    • 无刷直流主轴电机的数字模拟驱动器
    • US5210474A
    • 1993-05-11
    • US847147
    • 1992-02-27
    • Richard K. Oswald
    • Richard K. Oswald
    • H02P6/08H02P6/12H02P6/14
    • H02P6/08H02P6/12H02P6/14H02P2209/07
    • A digital-analog driver circuit for a plural-phase brushless D.C. motor includes a logic circuit responsive to commutation control signals for generating commutation gating signals, a digital function generation circuit responsive to a commutation signal supplied by the logic circuit and further responsive to a high frequency clocking signal, for generating a pulse width modulated digital function signal having a base period of the high frequency clocking signal and a timed interval synchronized to the commutation signal and for supplying the digital function signal to the logic circuit, the logic circuit including a function signal inversion circuit for generating an inverted digital function signal, and having a gating circuit for selectively putting out the digital function signal and the inverted digital function signal in synchronism with the commutation signal, plural digital to analog converters each for converting the digital function signal and the inverted digital function signal into an analog phase driving signal, and plural phase transistor drivers each being responsive to a said analog phase driving signal, for applying a driving current to a phase winding of the brushless D.C. motor.
    • 17. 发明授权
    • Clocking system for servo signal having two or more harmonically related
frequencies
    • 具有两个或多个谐波相关频率的伺服信号的时钟系统
    • US4214279A
    • 1980-07-22
    • US6403
    • 1979-01-25
    • Richard K. Oswald
    • Richard K. Oswald
    • G11B5/596G11B20/14H03L7/08H03L7/087G11B5/09G11B21/10
    • G11B20/1403G11B5/59616H03L7/087
    • This invention is directed to a system for generating clock signals from a source signal having two harmonically related and phase coherent frequencies such as shown in U.S. Pat. No. 3,534,344 (Santana) and U.S. Pat. No. 3,879,753 (Dunn). The clock system employs a pair of synchronous demodulators for generating a phase error signal to control a voltage controlled oscillator (VCO). The source signal is applied to a pair of synchronous demodulators, each of which is supplied with a different carrier frequency. The output of each demodulator represents the area of the signal being demodulated. The output of each demodulator is zero and a null condition exists when the system is in a phase locked condition. At a non-locked condition, the output of one demodulator has multiple null points. The function of the second demodulator is to resolve the ambiguity between the desired and undesired null points. Carrier signals are generated under control of the VCO by dividing the output of the VCO signal to obtain carrier signals having the appropriate relationship to the source signal.
    • 本发明涉及一种用于从具有两个谐波相位和相位相干频率的源信号产生时钟信号的系统,如美国专利No. 美国专利3,534,344(Santana)和美国专利 3,879,753(Dunn)。 时钟系统采用一对同步解调器来产生相位误差信号以控制压控振荡器(VCO)。 源信号被施加到一对同步解调器,每个同步解调器被提供有不同的载波频率。 每个解调器的输出表示被解调的信号的面积。 当系统处于锁相状态时,每个解调器的输出为零,并且存在空条件。 在非锁定状态下,一个解调器的输出具有多个空点。 第二解调器的功能是解决期望和不期望的零点之间的模糊性。 在VCO的控制下通过对VCO信号的输出进行分频来产生载波信号,以获得与源信号具有适当关系的载波信号。