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11. 发明申请

US20080115042A1 Critical section detection and prediction mechanism for hardware lock elision 有权
标题翻译：硬件锁定检测的关键部分检测和预测机制
公开(公告)号：US20080115042A1
公开(公告)日：2008-05-15
申请号：US11599009
申请日：2006-11-13
申请人： Haitham Akkary , Ravi Rajwar , Srikanth T. Srinivasan
发明人： Haitham Akkary , Ravi Rajwar , Srikanth T. Srinivasan
IPC分类号： H03M13/51
CPC分类号： G06F9/3865 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3842 , G06F9/528
摘要： A method and apparatus for detecting lock instructions and lock release instruction, as well as predicting critical sections is herein described. A lock instruction is detected with detection logic, which potentially resides in decode logic. A lock instruction entry associated with the lock instruction is stored/created. Address locations and values to be written to those address location of subsequent potential lock release instruction are compared to the address loaded from by the lock instruction and the value load by the lock instruction. If the addresses and values match, it is determined that the lock release instruction matches the lock instruction. A prediction entry stores a reference to the lock instruction, such as a last instruction pointer (LIP), and an associated value to represent the lock instruction is to be elided upon subsequent detection, if it is determined that the lock release instruction matches the lock instruction.
摘要翻译：这里描述了用于检测锁定指令和锁定释放指令以及预测关键部分的方法和装置。检测逻辑检测到锁定指令，这可能存在于解码逻辑中。存储/创建与锁定指令相关联的锁定指令条目。将要写入后续潜在锁定释放指令的地址位置的地址位置和值与通过锁定指令加载的地址和锁定指令的值负载进行比较。如果地址和值匹配，则确定锁定释放指令与锁定指令匹配。预测条目存储对诸如最后指令指针（LIP）的锁定指令的引用，并且如果确定锁定解除指令与锁定相匹配，则在后续检测时将要消除表示锁定指令的关联值指令。

12. 发明申请

US20070143550A1 Per-set relaxation of cache inclusion 审中-公开
标题翻译：缓存包容的放松
公开(公告)号：US20070143550A1
公开(公告)日：2007-06-21
申请号：US11313114
申请日：2005-12-19
申请人： Ravi Rajwar , Matthew Mattina
发明人： Ravi Rajwar , Matthew Mattina
IPC分类号： G06F13/28
CPC分类号： G06F12/0811 , G06F12/084
摘要： A multi-core processor includes a plurality of processors and a shared cache. Cache control logic implements an inclusive cache scheme among the shared cache and the local caches for the processors. Counters are maintained to track instances, per set, when a processor chooses to delay eviction from the local cache. While the counter indicates that one or more delayed evictions are pending for a set, the cache control logic treats the set as non-inclusive, broadcasting foreign snoops to all of the local caches, regardless of whether the snoop hits in the shared cache. Other embodiments are also described and claimed.
摘要翻译：多核处理器包括多个处理器和共享高速缓存。缓存控制逻辑在共享高速缓存和处理器的本地高速缓存之间实现包容性高速缓存方案。当处理器选择延迟从本地缓存驱逐时，计数器被维护以跟踪每集的实例。虽然计数器指示一个或多个延迟的撤离正在等待一组，但是高速缓存控制逻辑将该集合视为非包容性，将广播外部侦听广播到所有本地高速缓存，而不管窥探者是否在共享高速缓存中命中。还描述和要求保护其他实施例。

13. 发明申请

US20060149931A1 Runahead execution in a central processing unit 审中-公开
标题翻译： Runahead执行在中央处理单元
公开(公告)号：US20060149931A1
公开(公告)日：2006-07-06
申请号：US11024164
申请日：2004-12-28
申请人： Akkary Haitham , Doron Orenstein , Ravi Rajwar , Srikanth Srinivasan
发明人： Akkary Haitham , Doron Orenstein , Ravi Rajwar , Srikanth Srinivasan
IPC分类号： G06F9/30
CPC分类号： G06F9/3824 , G06F9/3842
摘要： According to one embodiment, a method is disclosed. The method includes detecting a load miss at a central processing unit (CPU), stalling a read only buffer (ROB), speculatively retiring an instruction causing the ROB stall and subsequent instructions, keeping registers that have not been renamed in the ROB upon retirement, and flushing the CPU pipeline upon receiving data from the load miss.
摘要翻译：根据一个实施例，公开了一种方法。该方法包括检测在中央处理单元（CPU）处的负载未命中，阻止只读缓冲器（ROB），推测性地退出导致ROB停顿的指令和后续指令，在退出时保持尚未重命名在ROB中的寄存器，并在接收到载入错误的数据时刷新CPU管道。

14. 发明申请

US20060095738A1 Back-end renaming in a continual flow processor pipeline 有权
公开(公告)号：US20060095738A1
公开(公告)日：2006-05-04
申请号：US10953761
申请日：2004-09-30
申请人： Haitham Akkary , Ravi Rajwar , Srinivasan Srikanth
发明人： Haitham Akkary , Ravi Rajwar , Srinivasan Srikanth
IPC分类号： G06F9/30
CPC分类号： G06F9/3842 , G06F9/384
摘要： Embodiments of the present invention relate to a system and method for comparatively increasing processor throughput and relieving pressure on the processor's scheduler and register file by diverting instructions dependent on long-latency operations from a flow of the processor pipeline and re-introducing the instructions into the flow when the long-latency operations are completed. In this way, the instructions do not tie up resources and overall instruction throughput in the pipeline is comparatively increased. Before the instructions are diverted from the pipeline, they may undergo a conventional process to map logical registers of the instructions to physical registers. Before the instructions are re-introduced into the pipeline, the physical registers mapped according to the conventional process may be re-mapped to other physical registers, thereby efficiently preserving correct program sequence information.

15. 发明申请

US20050177831A1 Computer architecture providing transactional, lock-free execution of lock-based programs 有权
标题翻译：提供基于锁的程序的事务，无锁执行的计算机体系结构
公开(公告)号：US20050177831A1
公开(公告)日：2005-08-11
申请号：US10775448
申请日：2004-02-10
申请人： James Goodman , Ravi Rajwar
发明人： James Goodman , Ravi Rajwar
IPC分类号： G06F9/30 , G06F9/38 , G06F9/46
CPC分类号： G06F9/3842 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3851 , G06F9/3857 , G06F9/3859 , G06F9/528
摘要： Hardware resolution of data conflicts in critical sections of programs executed in shared memory computer architectures are resolved using a hardware-based ordering system and without acquisition of the lock variable.
摘要翻译：在共享存储器计算机体系结构中执行的程序的关键部分中数据冲突的硬件解决方案使用基于硬件的订购系统进行解决，而无需获取锁定变量。

16. 发明申请

US20050120192A1 Scalable rename map table recovery 失效
标题翻译：可扩展重命名映射表恢复
公开(公告)号：US20050120192A1
公开(公告)日：2005-06-02
申请号：US10724876
申请日：2003-12-02
申请人： Haitham Akkary , Ravi Rajwar , Srikanth Srinivasan
发明人： Haitham Akkary , Ravi Rajwar , Srikanth Srinivasan
IPC分类号： G06F9/00 , G06F9/38
CPC分类号： G06F9/3863 , G06F9/384 , G06F9/3842 , G06F9/3844
摘要： Checkpoints may be used to recover from branch mispredictions using scalable rename map table recovery.
摘要翻译：检查点可用于使用可伸缩重命名映射表恢复从分支错误预测中恢复。

17. 发明授权

US09798590B2 Post-retire scheme for tracking tentative accesses during transactional execution 有权
公开(公告)号：US09798590B2
公开(公告)日：2017-10-24
申请号：US11517029
申请日：2006-09-07
申请人： Haitham Akkary , Ravi Rajwar , Srikanth T. Srinivasan
发明人： Haitham Akkary , Ravi Rajwar , Srikanth T. Srinivasan
IPC分类号： G06F9/44 , G06F9/52 , G06F9/38 , G06F9/30
CPC分类号： G06F9/52 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3859
摘要： A method and apparatus for post-retire transaction access tracking is herein described. Load and store buffers are capable of storing senior entries. In the load buffer a first access is scheduled based on a load buffer entry. Tracking information associated with the load is stored in a filter field in the load buffer entry. Upon retirement, the load buffer entry is marked as a senior load entry. A scheduler schedules a post-retire access to update transaction tracking information, if the filter field does not represent that the tracking information has already been updated during a pendency of the transaction. Before evicting a line in a cache, the load buffer is snooped to ensure no load accessed the line to be evicted.

18. 发明申请

US20160132335A1 Method, apparatus, and system for speculative abort control mechanisms 审中-公开
公开(公告)号：US20160132335A1
公开(公告)日：2016-05-12
申请号：US14998272
申请日：2015-12-26
申请人： Martin G. Dixon , Ravi Rajwar , Konrad K. Lai , Robert S. Chappell , Rajesh S. Parthasarathy , Alexandre J. Farcy , IIhyun Kim , Prakash Math , Matthew Merten , Vijaykumar Kadgi
发明人： Martin G. Dixon , Ravi Rajwar , Konrad K. Lai , Robert S. Chappell , Rajesh S. Parthasarathy , Alexandre J. Farcy , IIhyun Kim , Prakash Math , Matthew Merten , Vijaykumar Kadgi
IPC分类号： G06F9/30 , G06F13/42 , G06F13/40 , G06F12/08 , G06F13/16
CPC分类号： G06F9/3855 , G06F9/3004 , G06F9/30047 , G06F9/30087 , G06F9/30098 , G06F9/30145 , G06F9/3016 , G06F9/3802 , G06F9/3834 , G06F9/384 , G06F9/3842 , G06F9/3859 , G06F9/3861 , G06F9/467 , G06F9/528 , G06F12/0806 , G06F12/0811 , G06F12/0815 , G06F12/0831 , G06F12/084 , G06F12/0862 , G06F12/0875 , G06F12/0895 , G06F12/0897 , G06F12/1027 , G06F12/1045 , G06F13/1673 , G06F13/4068 , G06F13/4282 , G06F2212/452 , G06F2212/50 , G06F2212/60 , G06F2212/602 , G06F2212/621 , G06F2212/68 , G06F2212/682
摘要： An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.

19. 发明申请

US20160132333A1 Method, Apparatus, And System For Speculative Abort Control Mechanisms 审中-公开
标题翻译：用于推测中止控制机制的方法，装置和系统
公开(公告)号：US20160132333A1
公开(公告)日：2016-05-12
申请号：US14998248
申请日：2015-12-26
申请人： Martin G. Dixon , Ravi Rajwar , Konrad K. Lai , Robert S. Chappell , Rajesh S. Parthasarathy , Alexandre J. Farcy , Ilhyun Kim , Prakash Math , Matthew Merten , Vijaykumar Kadgi
发明人： Martin G. Dixon , Ravi Rajwar , Konrad K. Lai , Robert S. Chappell , Rajesh S. Parthasarathy , Alexandre J. Farcy , Ilhyun Kim , Prakash Math , Matthew Merten , Vijaykumar Kadgi
IPC分类号： G06F9/30 , G06F13/40 , G06F12/08 , G06F13/16
CPC分类号： G06F9/3855 , G06F9/3004 , G06F9/30047 , G06F9/30087 , G06F9/30098 , G06F9/30145 , G06F9/3016 , G06F9/3802 , G06F9/3834 , G06F9/384 , G06F9/3842 , G06F9/3859 , G06F9/3861 , G06F9/467 , G06F9/528 , G06F12/0806 , G06F12/0811 , G06F12/0815 , G06F12/0831 , G06F12/084 , G06F12/0862 , G06F12/0875 , G06F12/0895 , G06F12/0897 , G06F12/1027 , G06F12/1045 , G06F13/1673 , G06F13/4068 , G06F13/4282 , G06F2212/452 , G06F2212/50 , G06F2212/60 , G06F2212/602 , G06F2212/621 , G06F2212/68 , G06F2212/682
摘要： An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.
摘要翻译：本文描述了一种用于提供鲁棒的推测代码部分中止控制机制的装置和方法。硬件能够跟踪推测性代码区域中止事件，条件和/或场景，例如显式中止指令，数据冲突，推测定时器到期，不允许的指令属性或类型等。硬件，固件，软件，或其组合基于跟踪的中止事件进行中止判定。作为示例，硬件可以基于一个或多个预定义事件进行初始中止确定，或者选择将事件信息传递到固件或软件处理程序以进行这种中止确定。在确定要执行推测代码区域的中止时，硬件，固件，软件或其组合执行中止，其可以包括跟随由硬件或软件指定的回退路径。并且为了能够测试这样的回退路径，在一个实现中，硬件为软件提供一种总是中止推测代码区域的机制。

20. 发明申请

US20140059333A1 METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS 审中-公开
标题翻译：用于结构控制机制的方法，装置和系统
公开(公告)号：US20140059333A1
公开(公告)日：2014-02-27
申请号：US13997248
申请日：2012-02-02
申请人： Martin G. Dixon , Ravi Rajwar , Konrad K. Lai , Robert S. Chappell , Rajesh S. Parthasarathy , Alexandre J. Farcy , Ilhyun Kim , Prakash Math , Matthew Merten , Vijaykumar Kadgi
发明人： Martin G. Dixon , Ravi Rajwar , Konrad K. Lai , Robert S. Chappell , Rajesh S. Parthasarathy , Alexandre J. Farcy , Ilhyun Kim , Prakash Math , Matthew Merten , Vijaykumar Kadgi
IPC分类号： G06F9/30
CPC分类号： G06F9/3855 , G06F9/3004 , G06F9/30047 , G06F9/30087 , G06F9/30098 , G06F9/30145 , G06F9/3016 , G06F9/3802 , G06F9/3834 , G06F9/384 , G06F9/3842 , G06F9/3859 , G06F9/3861 , G06F9/467 , G06F9/528 , G06F12/0806 , G06F12/0811 , G06F12/0815 , G06F12/0831 , G06F12/084 , G06F12/0862 , G06F12/0875 , G06F12/0895 , G06F12/0897 , G06F12/1027 , G06F12/1045 , G06F13/1673 , G06F13/4068 , G06F13/4282 , G06F2212/452 , G06F2212/50 , G06F2212/60 , G06F2212/602 , G06F2212/621 , G06F2212/68 , G06F2212/682
摘要： An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software. And to enable testing of such a fallback path, in one implementation, hardware provides software a mechanism to always abort speculative code regions.
摘要翻译：本文描述了一种用于提供鲁棒的推测代码部分中止控制机制的装置和方法。硬件能够跟踪推测性代码区域中止事件，条件和/或场景，例如显式中止指令，数据冲突，推测定时器到期，不允许的指令属性或类型等。硬件，固件，软件，或其组合基于跟踪的中止事件进行中止判定。作为示例，硬件可以基于一个或多个预定义事件进行初始中止确定，或者选择将事件信息传递到固件或软件处理程序以进行这种中止确定。在确定要执行推测代码区域的中止时，硬件，固件，软件或其组合执行中止，其可以包括遵循由硬件或软件指定的回退路径。并且为了能够测试这样的回退路径，在一个实现中，硬件为软件提供一种总是中止推测代码区域的机制。

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