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    • 11. 发明授权
    • Tat-SF: cofactor for stimulation of transcriptional elongation by HIV-1
Tat
    • Tat-SF:用于刺激HIV-1 Tat转录延伸的辅因子
    • US6150515A
    • 2000-11-21
    • US214564
    • 1999-08-18
    • Phillip A. SharpQiang Zhou
    • Phillip A. SharpQiang Zhou
    • A61K38/00C07K14/16C12N15/12C12N5/10
    • C07K14/005A61K38/00C12N2740/16322
    • The invention pertains to a novel transcriptional activity factor, Tat-Stimulatory Factor, as well as genes encoding this factor and fragments and biologically functional variants thereof. The Tat-Stimulatory Factor is involved in the regulation of transcriptional elongation of HIV-1 by Tat. The invention also pertains to therapeutics involving the foregoing proteins and genes, and agents that bind to the foregoing proteins and genes. The invention also relates to methods of screening for a compound which binds to Tat-SF1, Tat-SF1-associated kinase and/or a complex of Tat-SF1 and Tat-SF1-associated kinase, as well as methods of screening for compounds which modulate Tat-SF1-mediated transcriptional activation,
    • PCT No.PCT / US97 / 11713 Sec。 371日期1999年8月18日 102(e)1999年8月18日PCT PCT 1997年7月3日PCT公布。 出版物WO98 / 00695 日期1998年1月8日本发明涉及新型转录活性因子Tat-刺激因子,以及编码该因子的基因及其片段和生物功能变体。 Tat刺激因子涉及Tat调控HIV-1的转录延伸。 本发明还涉及涉及上述蛋白质和基因的治疗剂,以及结合前述蛋白质和基因的药剂。 本发明还涉及筛选结合Tat-SF1,Tat-SF1相关激酶和/或Tat-SF1和Tat-SF1相关激酶复合物的化合物的方法,以及筛选化合物的方法 调节Tat-SF1介导的转录激活,
    • 12. 发明授权
    • Method of correcting formation resistivity well logs for the effects of
formation layer inclination with respect to the wellbore
    • 校正地层电阻率测井的方法,用于相对于井筒的地层倾角的影响
    • US5774360A
    • 1998-06-30
    • US622365
    • 1996-03-26
    • Jiaqi XiaoQiang Zhou
    • Jiaqi XiaoQiang Zhou
    • G01V3/28G06F19/00
    • G01V3/28
    • A method for correcting response of an induction logging instrument for inclination of earth formations with respect to an axis of the instrument. The instrument has a transmitter and a plurality of receivers at spaced apart locations. The method includes calculating expected receiver responses of simulated media having different conductivities. The calculations are performed for a plurality of different inclinations. The calculations are also performed for media having a plurality of different conductivity contrasts. 2-dimensional filters corresponding to a charge effect portion of each of the expected responses are calculated. 2-dimensional filters corresponding to a volumetric effect portion of each of the expected responses are calculated. An angle of inclination of the earth formations with respect to the instrument is determined. An approximate conductivity contrast of the earth formations is determined. Coefficients are interpolated between the 2-dimensional charge effect filters having simulated inclinations and contrasts closest to the angle of inclination and conductivity contrast of the formations. The interpolated filter coefficients are applied to measured receiver responses, generating charge effect-filtered measured responses. Coefficients are interpolated between the 2-dimensional volumetric effect filters having simulated inclinations and conductivity contrasts closest to the angle of inclination and conductivity contrast of the formations. The interpolated coefficients are applied to the charge effect-filtered measured responses to calculate corrected receiver responses.
    • 一种用于校正感应测井仪器相对于仪器轴线倾斜地层的响应的方法。 仪器在间隔开的位置具有发射器和多个接收器。 该方法包括计算具有不同电导率的模拟介质的预期接收机响应。 针对多个不同的倾向进行计算。 还对具有多个不同电导率对比度的介质进行计算。 计算与每个预期响应的电荷效应部分对应的2维滤波器。 计算对应于每个预期响应的体积效应部分的2维滤波器。 确定地层相对于仪器的倾斜角度。 确定地层的近似电导率对比度。 在具有模拟倾斜度和最接近倾斜角度的对比度的二维电荷效应滤波器和地层的电导率对比度之间插入系数。 内插滤波器系数被应用于测量的接收机响应,产生电荷效应滤波的测量响应。 在具有模拟倾斜度的二维体积效应滤波器和最接近地层的倾斜角度和电导率对比度的电导率对比度之间内插系数。 内插系数被应用于电荷效应滤波的测量响应以计算校正的接收机响应。
    • 13. 发明授权
    • Application of phase-locked loop (PLL) in oscillation monitoring for interconnected power systems
    • 锁相环(PLL)在互联电力系统振荡监测中的应用
    • US08471610B2
    • 2013-06-25
    • US13280458
    • 2011-10-25
    • Kai SunQiang Zhou
    • Kai SunQiang Zhou
    • H03L7/06
    • H03L7/08
    • The present invention relates to a method for accurately detecting oscillations and improving stability of power systems. The method includes the steps of providing a phase-locked loop having a phase detector, a loop filter, and a number-controlled oscillator. The method further includes the steps of extracting an input signal from the power system, using the phase-locked loop to track the frequency and phase of a targeted mode in the input signal, and creating a locally generated reference signal to fit the input signal and to allow the input signal's modal information to be obtained. The method further includes the step of performing mode shape analysis utilizing the reference phase signals constructed from the tracked frequencies.
    • 本发明涉及一种精确检测振荡和提高电力系统稳定性的方法。 该方法包括提供具有相位检测器,环路滤波器和数控振荡器的锁相环的步骤。 该方法还包括以下步骤:使用锁相环来从电力系统提取输入信号,以跟踪输入信号中的目标模式的频率和相位,以及创建本地生成的参考信号以拟合输入信号和 以允许获得输入信号的模态信息。 该方法还包括利用由跟踪频率构成的参考相位信号来执行模式形状分析的步骤。
    • 20. 发明授权
    • Apparatus and methods for precompiling program sequences processing for wafer processing
    • 用于预编译用于晶片处理的程序序列处理的装置和方法
    • US08082044B2
    • 2011-12-20
    • US12338781
    • 2008-12-18
    • Jaideep JainQiang ZhouSteve Kleinke
    • Jaideep JainQiang ZhouSteve Kleinke
    • G05B15/02
    • G05B19/4148G05B2219/33104G05B2219/45031
    • Disclosed are apparatus and methods for embodiments for efficiently and flexibly controlling hardware devices in a semiconductor processing system are provided for use in a distributed control arrangement. In general, the distributed arrangement includes at least one upper-level controller that is configurable with a computer program sequence of instructions for controlling one or more hardware devices of a processing tool. The hardware devices are controlled through one or more lower-level controllers. Prior to execution of the program sequence of the upper-level controller, at least one instruction of this program is pre-compiled so as to translate the instruction for execution by a selected lower-level controller and to add an at least one interlock check to such pre-compiled instruction and make the translated instruction accessible to at least one lower-level controller. The interlock check specifies one or more condition(s) for the selected lower-level controller to execute the pre-compiled instruction. Any number of instructions of the upper-level controller may be translated for use by any number of selected lower-level controllers, where some of the translated instructions include one or more interlock checks.
    • 公开了用于有效和灵活地控制半导体处理系统中的硬件设备的实施例的装置和方法,用于分布式控制装置。 通常,分布式布置包括至少一个上级控制器,其可配置有用于控制处理工具的一个或多个硬件设备的计算机程序序列。 硬件设备通过一个或多个下级控制器进行控制。 在执行上级控制器的程序序列之前,对该程序的至少一个指令进行预编译,以便转换由所选择的下级控制器执行的指令,并将至少一个互锁检查添加到 这样的预编译指令并且使翻译的指令可访问至少一个下级控制器。 互锁检查指定所选下级控制器执行预编译指令的一个或多个条件。 上级控制器的任何数量的指令可以被翻译以供任何数量的所选择的下级控制器使用,其中一些转换的指令包括一个或多个互锁检查。