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    • 16. 发明申请
    • STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME
    • 应变导电绝缘体结构及其形成方法
    • WO2012119419A1
    • 2012-09-13
    • PCT/CN2011/078948
    • 2011-08-25
    • TSINGHUA UNIVERSITYWANG, JingXU, JunGUO, Lei
    • WANG, JingXU, JunGUO, Lei
    • H01L21/336H01L21/20
    • H01L21/76283H01L21/76251H01L29/7843H01L29/7846H01L29/7848H01L29/78684
    • A strained Ge-on-insulator structure is provided, comprising: a silicon substrate (1100), in which an oxide insulating layer (1200) is formed on a surface of the silicon substrate (1100); a Ge layer (1300) formed on the oxide insulating layer (1200), in which a first passivation layer (1400) is formed between the Ge layer (1300) and the oxide insulating layer (1200); a gate stack (1600, 1700) formed on the Ge layer (1300); and a channel region formed below the gate stack (1600, 1700), and a source (1800) and a drain (1800) formed on sides of the channel region, in which the source (1800) and the drain (1800) are a Si x Ge -x :C source and a Si x Ge -x :C drain respectively to produce a tensile 10 strain in the channel region, in which x is within a range from 0 to 1 and a content of C is within a range from 0 to 7.5%. Further, a method for forming the strained Ge-on-insulator structure is also provided.
    • 提供了一种应变绝缘体上的结构,包括:在硅衬底(1100)的表面上形成氧化物绝缘层(1200)的硅衬底(1100); 形成在氧化物绝缘层(1200)上的Ge层(1300),其中在Ge层(1300)和氧化物绝缘层(1200)之间形成第一钝化层(1400); 形成在所述Ge层(1300)上的栅叠层(1600,1700); 以及形成在所述栅极堆叠(1600,1700)下面的沟道区域,以及形成在所述沟道区域的侧面上的源极(1800)和漏极(1800),所述源极(1800)和所述漏极(1800) Si x Ge-X:C源和Si x Ge-X:C漏极,以在沟道区域中产生拉伸10应变,其中x在0至1的范围内,并且C的含量在范围内 从0%到7.5%。 此外,还提供了用于形成应变的绝缘体上Ge的结构的方法。
    • 17. 发明申请
    • TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FORMING THE SAME
    • 隧道场效应晶体管及其形成方法
    • WO2012116528A1
    • 2012-09-07
    • PCT/CN2011/076340
    • 2011-06-24
    • TSINGHUA UNIVERSITYLIANG, RenrongCUI, NingWANG, JingXU, Jun
    • LIANG, RenrongCUI, NingWANG, JingXU, Jun
    • H01L29/78H01L21/336
    • H01L21/28105H01L21/26586H01L29/4966H01L29/66659H01L29/7391
    • The present disclosure provides a TFET, which comprises: a substrate (1100); a channel region (1300) formed in the substrate (1100), and a source region (1500) and a drain region (1400) formed on two sides of the channel region (1300); a gate stack (1600) formed on the channel region (1300), wherein the gate stack (1600) comprises: a gate dielectric layer (1630), and at least a first gate electrode (1610) and a second gate electrode (1620) distributed in a direction from the source region (1500) to the drain region (1400) and formed on the gate dielectric layer (1630), and the first gate electrode (1610) and the second gate electrode (1620) have different work functions; and a first side wall (1910) and a second side wall (1920) formed on a side of the first gate electrode (1610) and on a side of the second gate electrode (1620) respectively.
    • 本公开提供了一种TFET,其包括:衬底(1100); 形成在所述基板(1100)中的沟道区域(1300),以及形成在所述沟道区域(1300)的两侧的源极区域(1500)和漏极区域(1400)。 形成在所述沟道区域(1300)上的栅极叠层(1600),其中所述栅极堆叠(1600)包括:栅极介电层(1630),以及至少第一栅电极(1610)和第二栅极电极(1620) 分布在从源极区域(1500)到漏极区域(1400)的方向上并且形成在栅极介电层(1630)上,并且第一栅极电极(1610)和第二栅极电极(1620)具有不同的功函数; 以及分别形成在第一栅电极(1610)侧和第二栅电极(1620)一侧的第一侧壁(1910)和第二侧壁(1920)。