专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US09021199B2 Methods and structure for normalizing storage performance across a plurality of logical volumes 有权
标题翻译：在多个逻辑卷上归一化存储性能的方法和结构
公开(公告)号：US09021199B2
公开(公告)日：2015-04-28
申请号：US13586133
申请日：2012-08-15
申请人： Nilesh S. Govande , Jameer Babasaheb Mulani , Brad D. Besmer , Susan Gray
发明人： Nilesh S. Govande , Jameer Babasaheb Mulani , Brad D. Besmer , Susan Gray
IPC分类号： G06F3/06 , G06F12/02
CPC分类号： G06F3/061 , G06F3/0628 , G06F3/0631 , G06F3/067 , G06F3/0673 , G06F12/02
摘要： Methods and structure are disclosed for normalizing storage performance across a plurality of logical volumes. One embodiment is a storage controller. The storage controller is adapted to couple with a plurality of host systems and a storage device. The storage controller is adapted to receive one or more requests to create logical volumes for the plurality of hose systems, and adapted to identify a plurality of performance zones for storage areas of the storage device. The performance zones exhibit different performance criteria for one or more of: reading data from the storage device and writing data to the storage device. The storage controller is further adapted to allocate storage from each of the plurality of performance zones for each of the plurality of logical volumes such that the performance criteria for accessing the storage device is distributed substantially uniformly across the plurality of logical volumes.
摘要翻译：公开了用于在多个逻辑卷上归一化存储性能的方法和结构。一个实施例是存储控制器。存储控制器适于与多个主机系统和存储设备耦合。存储控制器适于接收一个或多个请求以为多个软管系统创建逻辑卷，并且适于识别用于存储设备的存储区域的多个性能区域。性能区域对于以下中的一个或多个呈现不同的性能标准：从存储设备读取数据并将数据写入存储设备。存储控制器还适用于为多个逻辑卷中的每一个为多个性能区域中的每一个分配存储，使得用于访问存储设备的性能标准基本上均匀地分布在多个逻辑卷上。

12. 发明授权

US08677095B2 System and method for optimal dynamic resource allocation in a storage system 有权
标题翻译：在存储系统中优化动态资源分配的系统和方法
公开(公告)号：US08677095B2
公开(公告)日：2014-03-18
申请号：US12313595
申请日：2008-11-21
申请人： Roger T. J Clegg , Brad D. Besmer , Guy Kendall
发明人： Roger T. J Clegg , Brad D. Besmer , Guy Kendall
IPC分类号： G06F12/06
CPC分类号： G06F9/44505
摘要： An apparatus and method to allocate memory in a storage system. Firmware running the method uses an iterative approach to find the best optimal memory configuration for a particular storage system given a variety of configuration data parameters stored as persistent data in non-volatile flash memory. The configuration data relates to resources in the environment that the storage system is found in, such as the number of virtual ports, targets and initiators supported by a storage system IOC. The configuration data is alterable, to allow flexibility in updating and changing parameters, and is employed at runtime when the storage system powers on, to enable the most flexible resource allocation. In a preferred method of determining the most optimal memory configuration for a given set of parameters corresponding to a given set of resources, an iterative method is employed to decrement parameter values from their maximum values, taking into account the minimums, and then testing the configuration by performing a memory allocation. If the allocation fails, because for example the wrong type memory or size of memory for any of the resources found, then the firmware resets the memory areas back to predetermined Start of Day (SOD) parameter values, decrements the values until a successful configuration of memory is found for the given set of parameters, and tries again, or until the firmware is caused to fault, whichever comes first.
摘要翻译：一种在存储系统中分配存储器的装置和方法。考虑到在非易失性闪存中作为持久数据存储的各种配置数据参数，运行此方法的固件使用迭代方法为特定存储系统找到最佳最佳内存配置。配置数据涉及存储系统的环境中的资源，例如由存储系统IOC支持的虚拟端口，目标和启动器的数量。配置数据是可变的，以允许更新和更改参数的灵活性，并且在存储系统上电时的运行时使用，以实现最灵活的资源分配。在对给定的资源集合给定的一组参数确定最佳存储器配置的优选方法中，采用迭代方法从参数值的最大值中减去参数值，同时考虑最小值，然后测试配置通过执行存储器分配。如果分配失败，因为例如找到的任何资源的错误类型的存储器或大小的存储器，则固件将存储器区域重新设置回到预定的开始日期（SOD）参数值，减小值直到成功配置针对给定的一组参数找到内存，再次尝试或直到固件发生故障，以先到者为准。

13. 发明授权

US08458238B2 Method and system for efficient write journal entry management for a distributed file system 有权
标题翻译：用于分布式文件系统的高效写入日志条目管理的方法和系统
公开(公告)号：US08458238B2
公开(公告)日：2013-06-04
申请号：US10973478
申请日：2004-10-26
申请人： Paul E. Soulier , Brad D. Besmer
发明人： Paul E. Soulier , Brad D. Besmer
IPC分类号： G06F12/00 , G06F17/30 , G06F3/00 , G06F5/00
CPC分类号： G06F17/30191 , G06F17/30194
摘要： The present invention is directed to a method and system for efficient write journal entry management maintaining minimum write journal information stored in a nonvolatile memory through utilizing an additional structure in a fast volatile memory. The method and system may manage write journaling of a file volume including multiple fixed sized regions and assign a persistent 1-bit synchronization status (the write journal information) to each data region. In addition, a non-persistent I/O counter (the additional structure) for each region to manage the persistent 1-bit synchronization status during run-time. The present invention may provide a mechanism to determine when write I/O operations have not successfully completed to a specific region of the file volume.
摘要翻译：本发明涉及一种用于通过利用快速易失性存储器中的附加结构来保存存储在非易失性存储器中的最小写入日志信息的用于高效写入日记帐入口管理的方法和系统。方法和系统可以管理包括多个固定大小区域的文件卷的写入日志记录，并将持久性1位同步状态（写入日志信息）分配给每个数据区域。另外还有一个用于每个区域的非持久I / O计数器（附加结构），用于在运行期间管理持久的1位同步状态。本发明可以提供一种用于确定何时写入I / O操作未成功完成到文件卷的特定区域的机制。

14. 发明授权

US08239701B2 Methods and apparatus for power allocation in a storage system 有权
标题翻译：存储系统中功率分配的方法和装置
公开(公告)号：US08239701B2
公开(公告)日：2012-08-07
申请号：US12510699
申请日：2009-07-28
申请人： Brian A. Day , Brad D. Besmer
发明人： Brian A. Day , Brad D. Besmer
IPC分类号： G06F1/26
CPC分类号： G06F1/266
摘要： Methods and systems for improved management of power allocation among a plurality of devices coupled to a controller. The controller and devices exchange messages to request, grant, and release allocations of power from a common power supply. In some embodiments, the controller may be a SAS/SATA controller and the messages exchanged may be SAS/SATA frames and/or primitives. In exemplary embodiments, the messages may request/grant a particular amount of power for each of one or more voltage levels provided by the power supply. In other exemplary embodiments, the messages may designate the duration of time during which the requesting device may utilize the allocated power. A power status message from the device to the controller may indicate a change in the power consumption by the device. Responsive to the power status message the controller may re-allocate power previously allocated to a device that has completed use thereof.
摘要翻译：用于改善耦合到控制器的多个设备之间的功率分配管理的方法和系统。控制器和设备交换消息以从公共电源请求，授予和释放电力分配。在一些实施例中，控制器可以是SAS / SATA控制器，并且所交换的消息可以是SAS / SATA帧和/或图元。在示例性实施例中，消息可以为由电源提供的一个或多个电压电平中的每一个请求/准许特定的功率量。在其他示例性实施例中，消息可以指定请求设备可以利用所分配的功率的持续时间。从设备到控制器的电源状态消息可以指示设备的功率消耗的变化。响应于电力状态消息，控制器可以重新分配先前分配给已经完成其使用的设备的电力。

15. 发明申请

US20110029787A1 METHODS AND APPARATUS FOR POWER ALLOCATION IN A STORAGE SYSTEM 有权
标题翻译：存储系统中功率分配的方法和装置
公开(公告)号：US20110029787A1
公开(公告)日：2011-02-03
申请号：US12510699
申请日：2009-07-28
申请人： Brian A. Day , Brad D. Besmer
发明人： Brian A. Day , Brad D. Besmer
IPC分类号： G06F1/26
CPC分类号： G06F1/266
摘要： Methods and systems for improved management of power allocation among a plurality of devices coupled to a controller. The controller and devices exchange messages to request, grant, and release allocations of power from a common power supply. In some embodiments, the controller may be a SAS/SATA controller and the messages exchanged may be SAS/SATA frames and/or primitives. In exemplary embodiments, the messages may request/grant a particular amount of power for each of one or more voltage levels provided by the power supply. In other exemplary embodiments, the messages may designate the duration of time during which the requesting device may utilize the allocated power. A power status message from the device to the controller may indicate a change in the power consumption by the device. Responsive to the power status message the controller may re-allocate power previously allocated to a device that has completed use thereof.
摘要翻译：用于改善耦合到控制器的多个设备之间的功率分配管理的方法和系统。控制器和设备交换消息以从公共电源请求，授予和释放电力分配。在一些实施例中，控制器可以是SAS / SATA控制器，并且所交换的消息可以是SAS / SATA帧和/或图元。在示例性实施例中，消息可以为由电源提供的一个或多个电压电平中的每一个请求/准许特定的功率量。在其他示例性实施例中，消息可以指定请求设备可以利用所分配的功率的持续时间。从设备到控制器的电源状态消息可以指示设备的功率消耗的变化。响应于电力状态消息，控制器可以重新分配先前分配给已经完成其使用的设备的电力。

16. 发明申请

US20100131734A1 System and method for optimal dynamic resource allocation in a storage system 有权
标题翻译：在存储系统中优化动态资源分配的系统和方法
公开(公告)号：US20100131734A1
公开(公告)日：2010-05-27
申请号：US12313595
申请日：2008-11-21
申请人： Roger T. J. Clegg , Brad D. Besmer , Guy Kendall
发明人： Roger T. J. Clegg , Brad D. Besmer , Guy Kendall
IPC分类号： G06F12/06
CPC分类号： G06F9/44505
摘要： An apparatus and method to allocate memory in a storage system. Firmware running the method uses an iterative approach to find the best optimal memory configuration for a particular storage system given a variety of configuration data parameters stored as persistent data in non-volatile flash memory. The configuration data relates to resources in the environment that the storage system is found in, such as the number of virtual ports, targets and initiators supported by a storage system IOC. The configuration data is alterable, to allow flexibility in updating and changing parameters, and is employed at runtime when the storage system powers on, to enable the most flexible resource allocation. In a preferred method of determining the most optimal memory configuration for a given set of parameters corresponding to a given set of resources, an iterative method is employed to decrement parameter values from their maximum values, taking into account the minimums, and then testing the configuration by performing a memory allocation. If the allocation fails, because for example the wrong type memory or size of memory for any of the resources found, then the firmware resets the memory areas back to predetermined Start of Day (SOD) parameter values, decrements the values until a successful configuration of memory is found for the given set of parameters, and tries again, or until the firmware is caused to fault, whichever comes first.
摘要翻译：一种在存储系统中分配存储器的装置和方法。考虑到在非易失性闪存中作为持久数据存储的各种配置数据参数，运行此方法的固件使用迭代方法为特定存储系统找到最佳最佳内存配置。配置数据涉及存储系统的环境中的资源，例如由存储系统IOC支持的虚拟端口，目标和启动器的数量。配置数据是可变的，以允许更新和更改参数的灵活性，并且在存储系统上电时的运行时使用，以实现最灵活的资源分配。在对给定的资源集合给定的一组参数确定最佳存储器配置的优选方法中，采用迭代方法从参数值的最大值中减去参数值，同时考虑最小值，然后测试配置通过执行存储器分配。如果分配失败，因为例如找到的任何资源的错误类型的存储器或大小的存储器，则固件将存储器区域重新设置回到预定的开始日期（SOD）参数值，减小值直到成功配置针对给定的一组参数找到内存，再次尝试或直到固件发生故障，以先到者为准。

17. 发明授权

US07617428B2 Circuits and associated methods for improved debug and test of an application integrated circuit 失效
标题翻译：用于改进应用集成电路调试和测试的电路和相关方法
公开(公告)号：US07617428B2
公开(公告)日：2009-11-10
申请号：US11508585
申请日：2006-08-23
申请人： Paul J. Smith , Brad D. Besmer , Guy W. Kendall
发明人： Paul J. Smith , Brad D. Besmer , Guy W. Kendall
IPC分类号： G01R31/28 , G06F7/02 , G06F13/24
CPC分类号： G01R31/31703 , G01R31/31724
摘要： Circuits and associated methods for testing internal operation of an application integrated circuit. Features and aspects hereof add configurable test interrupt circuits to an application circuit design to permit dynamic, configurable interrupt generation from an integrated circuit based on conditions determined from monitoring of internal signals of the application circuit. The internal signals that may be tested and used to generate test interrupts are those not exposed to the external processor interface of the integrated circuit and thus may be configured to interrupt based on any internal state of the application specific functional circuits of the integrated circuit.
摘要翻译：用于测试应用集成电路内部操作的电路和相关方法。此处的特征和方面将可配置的测试中断电路添加到应用电路设计，以允许基于从监视应用电路的内部信号确定的条件从集成电路产生动态的可配置中断。可以测试和用于产生测试中断的内部信号是不暴露于集成电路的外部处理器接口的内部信号，因此可以被配置为基于集成电路的专用功能电路的任何内部状态进行中断。

18. 发明授权

US07155569B2 Method for raid striped I/O request generation using a shared scatter gather list 有权
公开(公告)号：US07155569B2
公开(公告)日：2006-12-26
申请号：US10184667
申请日：2002-06-28
申请人： Stephen B. Johnson , Brad D. Besmer
发明人： Stephen B. Johnson , Brad D. Besmer
IPC分类号： G06F13/14
CPC分类号： G06F3/0601 , G06F2003/0697
摘要： A code efficient transfer method in response to a single host I/O request generates a single scatter gather list. The disk array controller transforms the single host I/O request into multiple physical I/O requests. Each of these multiple physical I/O requests uses the single scatter gather list to perform the data transfer operation. Each physical I/O request corresponds to the data transfer of one data stripe. The data stripe is an initial or header stripe of about 0.5K or a stripe of at least 64K.

19. 发明授权

US07007036B2 Method and apparatus for embedding configuration data 失效
公开(公告)号：US07007036B2
公开(公告)日：2006-02-28
申请号：US10109285
申请日：2002-03-28
申请人： Christopher J. McCarty , Stephen B. Johnson , Brad D. Besmer
发明人： Christopher J. McCarty , Stephen B. Johnson , Brad D. Besmer
IPC分类号： G06F7/00
CPC分类号： G06F9/44505 , Y10S707/99931 , Y10S707/99943
摘要： The present invention provides an apparatus and a method for embedding information from a first configuration data set having data structures into an embedded processing system, wherein embedding the information maintains user-defined variables. Embedding information includes comparing a first identifier from the first configuration data set with a second identifier from a second configuration data set having data structures to determine if the first identifier differs from the second identifier. In response to a determination of the first identifier differing from the second identifier, a decision is made to merge the first configuration data set with the second configuration data set to form a merged configuration data set. Afterwards, the merged configuration data set is written to the embedded processing system, wherein the merged configuration data set includes maintained user-defined variables.

20. 发明授权

US06904481B1 Bus sequence operation with automatic linking from current I/O information to subsequent I/O information 失效
标题翻译：总线顺序操作，从当前I / O信息自动链接到后续I / O信息
公开(公告)号：US06904481B1
公开(公告)日：2005-06-07
申请号：US09834013
申请日：2001-04-12
申请人： Brad D. Besmer , Guy W. Kendall , Brian A. Day
发明人： Brad D. Besmer , Guy W. Kendall , Brian A. Day
IPC分类号： G06F13/00 , G06F13/14 , G06F13/38
CPC分类号： G06F13/385
摘要： In a computer system, a bus adapter processes bus operation information structures for performing bus operations by automatically starting processing each bus operation information structure after completing processing the previous bus operation information structure. A processor forms the bus operation information structures and sets control over each bus operation information structure to a sequencer for processing. When a next bus operation information structure is ready for processing after completing processing the previous bus operation information structure, the sequencer checks whether it has control over the next bus operation information structure, and if so, begins processing the next bus operation information structure without being instructed to do so by the processor.
摘要翻译：在计算机系统中，总线适配器处理总线操作信息结构以执行总线操作，通过在完成处理先前的总线操作信息结构之后自动开始处理每个总线操作信息结构。处理器形成总线操作信息结构，并且将对每个总线操作信息结构的控制设置到定序器以进行处理。当完成处理前一个总线操作信息结构的下一个总线操作信息结构准备好进行处理时，定序器检查它是否控制下一个总线操作信息结构，如果是，则开始处理下一个总线操作信息结构，而不会由处理器指示这样做。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式