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11. 发明申请

US20100095094A1 METHOD FOR PROCESSING DATA 审中-公开
标题翻译：数据处理方法
公开(公告)号：US20100095094A1
公开(公告)日：2010-04-15
申请号：US12640201
申请日：2009-12-17
申请人： Martin VORBACH , Armin Nückel , Frank May , Markus Weinhardt , Joao Manuel Paiva Cardoso
发明人： Martin VORBACH , Armin Nückel , Frank May , Markus Weinhardt , Joao Manuel Paiva Cardoso
IPC分类号： G06F9/30
CPC分类号： G06F8/45 , G06F15/7867
摘要： A method and device for translating a program to a system including at least one first processor and a reconfigurable unit. Code portions of the program which are suitable for the reconfigurable unit are determined. The remaining code of the program is extracted and/or separated for processing by the first processor.
摘要翻译：一种用于将程序转换为包括至少一个第一处理器和可重构单元的系统的方法和装置。确定适合于可重构单元的程序的代码部分。程序的剩余代码被提取和/或分离以供第一处理器处理。

12. 发明授权

US07657877B2 Method for processing data 有权
标题翻译：数据处理方法
公开(公告)号：US07657877B2
公开(公告)日：2010-02-02
申请号：US10480003
申请日：2002-06-20
申请人： Martin Vorbach , Armin Nückel , Frank May , Markus Weinhardt , Joao Manuel Paiva Cardoso
发明人： Martin Vorbach , Armin Nückel , Frank May , Markus Weinhardt , Joao Manuel Paiva Cardoso
IPC分类号： G06F9/44
CPC分类号： G06F8/45 , G06F15/7867
摘要： A method and device for translating a program to a system including at least one first processor and a reconfigurable unit. Code portions of the program which are suitable for the reconfigurable unit are determined. The remaining code of the program is extracted and/or separated for processing by the first processor.
摘要翻译：一种用于将程序转换为包括至少一个第一处理器和可重构单元的系统的方法和装置。确定适合于可重构单元的程序的代码部分。程序的剩余代码被提取和/或分离以供第一处理器处理。

13. 发明授权

US07266725B2 Method for debugging reconfigurable architectures 有权
标题翻译：调试可重构架构的方法
公开(公告)号：US07266725B2
公开(公告)日：2007-09-04
申请号：US09967497
申请日：2001-09-28
申请人： Martin Vorbach , Frank May , Armin Nückel
发明人： Martin Vorbach , Frank May , Armin Nückel
IPC分类号： G06F11/00
CPC分类号： G06F11/26 , G06F9/30036 , G06F11/267 , G06F11/3656 , G06F15/7867
摘要： A method for efficiently debugging a program defining a plurality of configurations to be successively processed on a dynamically reconfigurable architecture including a plurality of logic elements cooperating with each other. The method includes storing data in a memory in a configuration-conforming manner, the data generated by executing a configuration forming part of the program on the reconfigurable architecture, and including algorithmically relevant state data of the program that is associated with at least one of the configurations. The method further includes subsequently continuing execution of the program, the execution including a reconfiguration, and detecting an error based on stored state data, wherein for each state for which corresponding state data is to be stored, the state remains unchanged at least until the corresponding state data is stored. For obtaining a particular state data, the method interrupts execution of the program by configuring a first configuration via which the particular state data is transmitted to a debugging unit instead of a second configuration that is a next-required configuration of the program; and subsequent to obtaining the particular state data, resumes execution of the program by configuring the second configuration.
摘要翻译：一种用于有效地调试定义要在包括彼此协作的多个逻辑元件的动态可重构架构上连续处理的多个配置的程序的方法。该方法包括以符合配置的方式将数据存储在存储器中，所述数据通过执行在所述可重构架构上形成所述程序的一部分的配置而生成，并且包括与所述程序的至少一个相关联的所述程序的与算法相关的状态数据配置该方法还包括随后继续执行程序，执行包括重新配置，并且基于存储的状态数据检测错误，其中对于要对其存储对应的状态数据的每个状态，状态至少保持不变，直到相应的状态数据被存储。为了获得特定状态数据，该方法通过配置将特定状态数据发送到调试单元而不是作为程序的下一个所需配置的第二配置的第一配置来中断程序的执行; 并且在获得特定状态数据之后，通过配置第二配置来恢复程序的执行。

14. 发明申请

US20110271264A1 METHOD FOR THE TRANSLATION OF PROGRAMS FOR RECONFIGURABLE ARCHITECTURES 有权
标题翻译：翻译可重构建筑方案的方法
公开(公告)号：US20110271264A1
公开(公告)日：2011-11-03
申请号：US13177820
申请日：2011-07-07
申请人： Martin VORBACH , Frank May , Armin Nückel
发明人： Martin VORBACH , Frank May , Armin Nückel
IPC分类号： G06F9/45
CPC分类号： G06F8/447
摘要： Data processing using multidimensional fields is described along with methods for advantageously using high-level language codes.
摘要翻译：描述使用多维字段的数据处理以及有利地使用高级语言代码的方法。

15. 发明授权

US07840842B2 Method for debugging reconfigurable architectures 有权
标题翻译：调试可重构架构的方法
公开(公告)号：US07840842B2
公开(公告)日：2010-11-23
申请号：US11890094
申请日：2007-08-03
申请人： Martin Vorbach , Frank May , Armin Nückel
发明人： Martin Vorbach , Frank May , Armin Nückel
IPC分类号： G06F11/00
CPC分类号： G06F11/26 , G06F9/30036 , G06F11/267 , G06F11/3656 , G06F15/7867
摘要： A method is described for debugging reconfigurable hardware. In one example embodiment, debugging information is written for each configuration cycle into a memory which is then evaluated by a debugger.
摘要翻译：描述了一种用于调试可重配置硬件的方法。在一个示例实施例中，将调试信息写入每个配置周期到存储器中，然后由调试器对其进行评估。

16. 发明授权

US07210129B2 Method for translating programs for reconfigurable architectures 有权
标题翻译：用于翻译可重构架构的程序的方法
公开(公告)号：US07210129B2
公开(公告)日：2007-04-24
申请号：US09967847
申请日：2001-09-28
申请人： Frank May , Armin Nückel , Martin Vorbach
发明人： Frank May , Armin Nückel , Martin Vorbach
IPC分类号： G06F9/45
CPC分类号： G06F8/41
摘要： A method for translating high-level languages to reconfigurable architectures is disclosed. The method includes building a finite automaton for calculation. The method further includes forming a combinational network of a plurality of individual functions in accordance with the structure of the finite automaton. The method further includes allocating a plurality of memories to the network for storing a plurality of operands and a plurality of results.
摘要翻译：公开了一种将高级语言翻译成可重构架构的方法。该方法包括建立一个有限自动机进行计算。该方法还包括根据有限自动机的结构形成多个单独功能的组合网络。该方法还包括向网络分配多个存储器以存储多个操作数和多个结果。

17. 发明授权

US08312200B2 Processor chip including a plurality of cache elements connected to a plurality of processor cores 有权
标题翻译：处理器芯片包括连接到多个处理器核心的多个高速缓存元件
公开(公告)号：US08312200B2
公开(公告)日：2012-11-13
申请号：US12840477
申请日：2010-07-21
申请人： Martin Vorbach , Armin Nückel
发明人： Martin Vorbach , Armin Nückel
IPC分类号： G06F13/20
CPC分类号： G06F15/80 , G06F8/433 , G06F8/45 , G06F15/7867
摘要： Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described.
摘要翻译：描述可在操作期间重新编程的模块的编程。还描述了代码序列的分区。

18. 发明申请

US20100228918A1 CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STRUCTURE OF CONFIGURABLE ELEMENTS 有权
公开(公告)号：US20100228918A1
公开(公告)日：2010-09-09
申请号：US12720898
申请日：2010-03-10
申请人： MARTIN VORBACH , Armin Nückel
发明人： MARTIN VORBACH , Armin Nückel
IPC分类号： G06F15/80 , G06F9/06 , G06F12/00 , G06F12/08
CPC分类号： G06F15/80 , G06F8/433 , G06F8/45 , G06F15/7867
摘要： Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described.

19. 发明授权

US07996827B2 Method for the translation of programs for reconfigurable architectures 有权
标题翻译：翻译可重构架构程序的方法
公开(公告)号：US07996827B2
公开(公告)日：2011-08-09
申请号：US10486771
申请日：2002-08-16
申请人： Martin Vorbach , May Frank , Armin Nückel
发明人： Martin Vorbach , May Frank , Armin Nückel
IPC分类号： G06F9/45 , G06F9/44
CPC分类号： G06F8/447
摘要： A method for advantageously translating high-level language codes for data processing using a reconfigurable architecture, memories addressable internally from within said reconfigurable architecture, and memories external to said reconfigurable architecture, may include constructing a finite automaton for computation in such a way that a complex combinatory network of individual functions is formed, assigning memories to the network for storage of operands and results, and separating external memory accesses for providing a transfer of at least one of operands and results as data from an external memory to a memory addressable internally by the reconfigurable architecture.
摘要翻译：一种用于有利地翻译用于使用可重新配置架构的数据处理的高级语言代码的方法，可从内部从所述可重新配置架构内寻址的存储器和所述可重新配置架构外部的存储器的方法可以包括构建用于计算的有限自动机，形成各个功能的组合网络，将存储器分配给存储操作数和结果的存储器，以及分离外部存储器存取，以提供作为数据的操作数和结果中的至少一个的操作数和结果的传输从外部存储器到内部可寻址的存储器可重构架构。

20. 发明申请

US20100287324A1 CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STRUCTURE OF CONFIGURABLE ELEMENTS 有权
标题翻译：具有可配置元件多维结构的可配置逻辑集成电路
公开(公告)号：US20100287324A1
公开(公告)日：2010-11-11
申请号：US12840477
申请日：2010-07-21
申请人： Martin VORBACH , Armin Nückel
发明人： Martin VORBACH , Armin Nückel
IPC分类号： G06F13/20 , G06F12/06
CPC分类号： G06F15/80 , G06F8/433 , G06F8/45 , G06F15/7867
摘要： Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described.
摘要翻译：描述可在操作期间重新编程的模块的编程。还描述了代码序列的分区。

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