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11. 发明申请

US20070192669A1 Combined encoder/syndrome generator with reduced delay 有权
标题翻译：具有减少延迟的组合式编码器/综合发生器
公开(公告)号：US20070192669A1
公开(公告)日：2007-08-16
申请号：US11341230
申请日：2006-01-26
申请人： Martin Hassner , Kirk Hwang
发明人： Martin Hassner , Kirk Hwang
IPC分类号： H03M13/00
CPC分类号： G11B20/1833 , H03M13/158
摘要： A combined encoder/syndrome generator is provided that has a reduced delay. The combined encoder/syndrome generator generates check symbols during an encoding process and error syndromes during a decoding process. The combined encoder/syndrome generator has two or more blocks. The output of each block is fed as an input into a subsequent block. Each block can perform computations in parallel to reduce the delay of the encoding system.
摘要翻译：提供了具有减少的延迟的组合编码器/校正子发生器。组合的编码器/校正子发生器在解码过程期间在编码处理期间产生校验符号和错误综合征。组合的编码器/校正子发生器具有两个或更多个块。每个块的输出作为输入被馈送到随后的块中。每个块可以并行执行计算，以减少编码系统的延迟。

12. 发明申请

US20050229069A1 Techniques for detecting and correcting errors using multiple interleave erasure pointers 失效
标题翻译：使用多个交错擦除指针检测和纠正错误的技术
公开(公告)号：US20050229069A1
公开(公告)日：2005-10-13
申请号：US10817421
申请日：2004-04-02
申请人： Martin Hassner , Vipul Srivastava
发明人： Martin Hassner , Vipul Srivastava
IPC分类号： G06F11/00 , G06F11/30 , G08C25/00 , G11B20/18 , H03M13/00 , H04L1/00
CPC分类号： H04L1/0057 , G11B20/18 , G11B2020/1843 , H04L1/0045 , H04L1/0064 , H04L1/0071
摘要： Techniques for detecting and correcting burst errors in data bytes formed in a two-level block code structure. A second level decoder uses block level check bytes to detect columns in a two-level block code structure that contain error bytes. The second level decoder generates erasure pointers that identify columns in the two-level block structure effected by burst errors. A first level decoder then uses codeword check bytes to correct all of the bytes in the columns identified by the erasure pointers. The first level decoder is freed to use all of the codeword check bytes only for error byte value calculations. The first level decoder does not need to use any of the codeword check bytes for error location calculations, because the erasure pointers generated by the second level decoder provide all of the necessary error locations. This techniques doubles the error correction capability of the first level decoder.
摘要翻译：用于检测和校正在两级块代码结构中形成的数据字节中的突发错误的技术。第二级解码器使用块级检查字节来检测包含错误字节的两级块代码结构中的列。第二级解码器产生擦除指针，其识别由突发错误影响的两级块结构中的列。然后，第一级解码器使用码字校验字节来校正由擦除指针识别的列中的所有字节。第一级解码器被释放以仅使用所有码字校验字节来进行错误字节值计算。第一级解码器不需要使用任何码字校验字节进行错误位置计算，因为由第二级解码器产生的擦除指针提供所有必要的错误位置。这种技术使第一级解码器的纠错能力加倍。

13. 发明授权

US5942005A Method and means for computationally efficient error and erasure correction in linear cyclic codes 失效
标题翻译：线性循环码中计算有效误差和消除校正的方法和装置
公开(公告)号：US5942005A
公开(公告)日：1999-08-24
申请号：US838375
申请日：1997-04-08
申请人： Martin Hassner , Ralf Kotter , Tetsuya Tamura
发明人： Martin Hassner , Ralf Kotter , Tetsuya Tamura
IPC分类号： H03M13/00
CPC分类号： H03M13/153 , G11B20/1833 , H03M13/1515 , H03M13/154 , G11B2020/1836 , G11B2020/1843 , G11B2220/2516 , G11B2220/2537 , G11B2220/90 , H03M13/373
摘要： A computationally and storage efficient method and means for correcting errors and erasures in linear cyclic coded data, especially Reed-Solomon codes, in which erasure values are ascertained exclusively as a function of syndromes and derived error location polynomials without recourse to computation of intermediate error or erasure values.
摘要翻译：一种用于校正线性循环编码数据（特别是里德 - 所罗门码）中的错误和擦除的计算和存储有效方法和装置，其中擦除值被唯一地确定为校正子和导出的误差位置多项式的函数，而不需要中间误差的计算或擦除值。

14. 发明申请

US20060195768A1 Techniques for performing reduced complexity galois field arithmetic for correcting errors 失效
标题翻译：用于执行降低的复杂度Galois域算法以纠正错误的技术
公开(公告)号：US20060195768A1
公开(公告)日：2006-08-31
申请号：US11058596
申请日：2005-02-14
申请人： Martin Hassner , Vipul Srivastava , Kirk Hwang
发明人： Martin Hassner , Vipul Srivastava , Kirk Hwang
IPC分类号： H03M13/00
CPC分类号： H03M13/158 , G11B20/1833 , G11B2020/1836 , H03M13/151
摘要： Techniques are provided for performing Galois field arithmetic to detect errors in digital data stored on disks. Two 12-bit numbers or two 10-bit numbers are multiplied together in Galois field using tower arithmetic. In the 12-bit embodiment, a base field GF(2) is first extended to GF(23), GF(23) is extended to a first quadratic extension GF(26), and GF(26) is extended to a second quadratic extension GF(212). In the 10-bit embodiment, the base field GF(2) is first extended to GF(25), and GF(25) is extended to a quadratic extension GF(210). Each of the extensions for the 10-bit and 12-bit embodiments is performed using an irreducible polynomial. All of the polynomials used to generate the first and the second quadratic extensions of the Galois field are in the form x2+x+K, where K is an element of the ground field whose absolute trace equals 1.
摘要翻译：提供了用于执行伽罗瓦域算术以检测存储在磁盘上的数字数据中的错误的技术。两个12位数字或两个10位数字在伽罗瓦域中使用塔式算术相乘。在12位实施例中，首先将GF（2）扩展为GF（2），GF（2）3扩展到第一二次扩展 GF（2 6）和GF（2 6 6）扩展到第二二次扩展GF（2×12）。在10位实施例中，基区GF（2）首先被扩展到GF（2＆lt; 5＆gt;），并且GF（2＆lt; 5＆gt;）被扩展到二次扩展 GF（2×10 6）。使用不可约多项式来执行10位和12位实施例的每个扩展。用于产生伽罗瓦域的第一和第二二次扩展的所有多项式都是形式为x + 2 + x + K，其中K是绝对迹线等于1的地面场的元素。

15. 发明申请

US20050060630A1 Direct partial update of CRC/ECC check bytes 失效
标题翻译：直接部分更新CRC / ECC校验字节
公开(公告)号：US20050060630A1
公开(公告)日：2005-03-17
申请号：US10666401
申请日：2003-09-17
申请人： Martin Hassner , Vipul Srivastava , Nyles Heise
发明人： Martin Hassner , Vipul Srivastava , Nyles Heise
IPC分类号： G11B20/18 , H03M13/00
CPC分类号： G11B20/1866
摘要： Techniques for correcting data bytes on a data storage disk that have been rewritten are provided. A data storage system generates a long block membership (LBM) byte for each sector. The LBM bytes indicates whether the sector is part of a block of sectors. A data storage system can determine whether a failed sector is part of a long block. The data storage system adds the LBM contributions to the CRC and ECC bytes and then attempts to correct the failed sector. If the correction process is successful, the data storage system declares a miscorrection. If the error is not successfully corrected, the data storage system again adds the LBM contributions to the CRC and ECC bytes and then attempts to correct the failed sector. If the correction process is successful, the data correction is accepted if the error pattern and the check byte overlap is greater than a threshold.
摘要翻译：提供了用于校正已经被重写的数据存储盘上的数据字节的技术。数据存储系统为每个扇区生成长块成员（LBM）字节。 LBM字节指示扇区是扇区块的一部分。数据存储系统可以确定故障扇区是否是长块的一部分。数据存储系统将LBM贡献添加到CRC和ECC字节，然后尝试更正故障扇区。如果校正过程成功，数据存储系统会声明错误修复。如果错误未成功纠正，则数据存储系统再次将LBM贡献添加到CRC和ECC字节，然后尝试更正故障扇区。如果校正处理成功，则如果错误模式和校验字节重叠大于阈值，则接受数据校正。

16. 发明申请

US20050036381A1 System and method for handling writes in HDD using 4K block sizes 失效
标题翻译：使用4K块大小处理HDD中的写入的系统和方法
公开(公告)号：US20050036381A1
公开(公告)日：2005-02-17
申请号：US10640915
申请日：2003-08-14
申请人： Martin Hassner , Richard New , Spencer Ng
发明人： Martin Hassner , Richard New , Spencer Ng
IPC分类号： G06F3/06 , G06F11/10 , G06F12/08 , G11B20/10 , G11B20/12 , G11B20/18 , G11C7/00
CPC分类号： G06F11/1076 , G06F12/0866 , G06F2211/1009 , G06F2211/109 , G11B20/1883 , G11B2220/20
摘要： In a disk drive that uses large block sizes (e.g., 4 KB) for storing data and that responds to read and write requests from a client that uses small block sizes (e.g., 512 bytes), at least the starting and ending 4K blocks of read data are cached. Since much disk data that is the subject of a write request is first read, upon a subsequent write request the drive controller determines whether the starting and ending blocks are in cache and if so, writes new data to those blocks, calculates a full ECC for them, and then calculates ECC for intervening blocks and writes new data to the intervening blocks. If both starting and ending blocks are not in cache the drive controller executes either a high data integrity routine or a high performance routine as chosen by the user.
摘要翻译：在使用大块大小（例如4 KB）用于存储数据并响应来自使用小块大小（例如，512字节）的客户端的读取和写入请求的磁盘驱动器中，至少起始和结束4K块读取数据被缓存。由于首先读取作为写入请求的主体的多个磁盘数据，所以在后续的写入请求时，驱动器控制器确定起始和结束的块是否在高速缓存中，如果是，则将新的数据写入到这些块中，计算出完整的ECC 然后计算中间块的ECC并将新数据写入中间块。如果起始和结束块都不在高速缓存中，则驱动器控制器执行由用户选择的高数据完整性例程或高性能例程。

17. 发明授权

US06344807B1 Packet-frame generator for creating an encoded packet frame and method thereof 失效
标题翻译：用于创建编码分组帧的分组帧生成器及其方法
公开(公告)号：US06344807B1
公开(公告)日：2002-02-05
申请号：US09667260
申请日：2000-09-22
申请人： Martin Hassner , Nyles Heise , Walter Hirt
发明人： Martin Hassner , Nyles Heise , Walter Hirt
IPC分类号： H03M500
CPC分类号： H03M5/00 , H03M7/00
摘要： A packet-frame generator for creating an encoded packet frame comprising encoded control data and encoded utilizable data. A non-encoded packet frame comprising non-encoded control data and non-encoded utilizable data is providable by an assembling means. The packet-frame generator comprises a modulation encoder for encoding the non-encoded control data by a first modulation code and the non-encoded utilizable data by a second modulation code thereby providing the encoded packet frame.
摘要翻译：一种用于创建包括编码的控制数据和经编码的可利用数据的编码分组帧的分组帧生成器。包括非编码控制数据和未编码的可利用数据的非编码分组帧可由组装装置提供。分组帧生成器包括用于通过第一调制码对非编码控制数据进行编码的调制编码器和通过第二调制码的未编码的可利用数据，从而提供经编码的分组帧。

18. 发明授权

US5946328A Method and means for efficient error detection and correction in long byte strings using integrated interleaved Reed-Solomon codewords 失效
标题翻译：用于使用集成交错的里德 - 所罗门码字的长字节串中有效的错误检测和校正的方法和装置
公开(公告)号：US5946328A
公开(公告)日：1999-08-31
申请号：US971796
申请日：1997-11-17
申请人： Charles Edwin Cox , Martin Hassner , Ralf Kotter , Arvind Patel
发明人： Charles Edwin Cox , Martin Hassner , Ralf Kotter , Arvind Patel
IPC分类号： G11B20/18 , H03M13/29 , H03M13/00
CPC分类号： H03M13/1515 , G11B20/1833 , H03M13/29 , H03M13/2903
摘要： A method and means for enhancing the error detection and correction capability obtained when a plurality of data byte strings are encoded in a two-level, block-formatted linear code using codeword and block-level redundancy by logically summing the data byte strings and mapping the logical sum and the data byte strings into counterpart codewords including codeword check bytes in accordance with the same linear error correction code. Next, the codewords are logically summed. The codewords and their logical sum are interleaved in a predetermined pattern prior to being recorded on a storage device or the like. On read back, the codewords of a block and their logical sum are syndrome processed to resolve any identified errors within the correction capability of any single word and any errors within the correction capability of any single word and block-level redundancy, and to provide signal indication when the correction capacity has been exceeded.
摘要翻译：一种用于增强当多个数据字节串以二电平块格式化的线性码被编码时使用码字和块级冗余通过对数据字节串进行逻辑求和而映射的方法和装置，逻辑和和数据字节串转换成对应码字，包括根据相同的线性纠错码的码字校验字节。接下来，对码字进行逻辑求和。码字及其逻辑和在被记录在存储设备等之前以预定的模式进行交织。在读回时，块的码字及其逻辑和被校正处理，以解决任何单个字的校正能力内的任何识别的错误以及任何单个字和块级冗余的校正能力内的任何错误，并提供信号超过校正能力时的指示。

19. 发明授权

US5748023A Integrator with output-compensating capability 失效
标题翻译：具有输出补偿功能的积分器
公开(公告)号：US5748023A
公开(公告)日：1998-05-05
申请号：US668887
申请日：1996-06-24
申请人： Martin Hassner , Seiji Koyama , Tohru Nozawa , Asao Terukina , Tamura Tetsuya
发明人： Martin Hassner , Seiji Koyama , Tohru Nozawa , Asao Terukina , Tamura Tetsuya
IPC分类号： G06G7/18 , G06G7/184 , G11B5/012 , G11B5/027 , G11B5/035 , G11B5/09 , G11B20/10 , H03F3/34 , G06G7/64
CPC分类号： G06G7/184 , G11B20/10009 , G11B5/012 , G11B5/035 , G11B5/09
摘要： An integrator is disclosed that is capable of outputting the same integration result with respect to the same bit pattern even if there are fluctuations in the integrating period, semiconductor device process, or the power supply voltage. The disclosed integrator includes: (1) a first integrator having a first amplifier, for integrating a reference voltage during an integrating period, (2) a second integrator having a second amplifier, for integrating an input signal during the integrating period, and (3) control means for outputting a signal regulating a gain of the first amplifier to the first amplifier so that an output of the first integrator varies in correspondence with the integrating period, and for regulating a gain of the second amplifier by means of the signal.
摘要翻译：公开了即使在积分周期，半导体器件处理或电源电压中存在波动的情况下也能够输出与相同位图案相同的积分结果的积分器。所公开的积分器包括：（1）具有第一放大器的第一积分器，用于在积分周期期间积分参考电压，（2）具有第二放大器的第二积分器，用于在积分周期期间积分输入信号;以及（3 ）控制装置，用于将调节第一放大器的增益的信号输出到第一放大器，使得第一积分器的输出根据积分周期而变化，并且用于通过该信号调节第二放大器的增益。

20. 发明授权

US08201061B2 Decoding error correction codes using a modular single recursion implementation 有权
标题翻译：使用模块化单递归实现解码纠错码
公开(公告)号：US08201061B2
公开(公告)日：2012-06-12
申请号：US12270737
申请日：2008-11-13
申请人： Martin Hassner , Kirk Hwang
发明人： Martin Hassner , Kirk Hwang
IPC分类号： H03M13/00
CPC分类号： H03M13/1525 , H03M13/1515
摘要： Systems and methods are provided for performing error correction decoding. The coefficients of the error locator polynomial are iteratively determined for each codeword using a modular implementation of a single recursion key-equation solver algorithm. According to this implementation, modules are used to calculate the current and previous coefficients of the error locator polynomial. One module is used for each correctable error. The modular single recursion implementation is programmable, because the number of modules can be easily changed to correct any number of correctable errors. Galois field tower arithmetic can be used to calculate the inverse of an error term. Galois field tower arithmetic greatly reduces the size of the inversion unit. The latency time can be reduced by placing the computations of the inverse error term outside the critical path of the error locator polynomial algorithm.
摘要翻译：提供了用于执行纠错解码的系统和方法。使用单个递归密钥方程求解算法的模块化实现，针对每个码字迭代确定误差定位多项式的系数。根据该实现，使用模块来计算误差定位器多项式的当前系数和先前系数。一个模块用于每个可纠正的错误。模块化单递归实现是可编程的，因为可以轻松更改模块的数量以更正任何数量的可纠正错误。伽罗瓦域塔算术可用于计算误差项的倒数。伽罗瓦域塔算术大大减小了反演单元的大小。通过将反向误差项的计算置于误差定位多项式算法的关键路径之外，可以减少延迟时间。

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