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11. 发明申请

WO2007036861A2 SEMICONDUCTOR DEVICE WITH A BIPOLAR TRANSISTOR AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：具有双极晶体管的半导体器件及制造这种器件的方法
公开(公告)号：WO2007036861A2
公开(公告)日：2007-04-05
申请号：PCT/IB2006/053446
申请日：2006-09-22
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , MEUNIER-BEILLARD, Philippe , DUFFY, Raymond, J. , AGARWAL, Prabhat , HURKX, Godefridus, A., M.
发明人： MEUNIER-BEILLARD, Philippe , DUFFY, Raymond, J. , AGARWAL, Prabhat , HURKX, Godefridus, A., M.
CPC分类号： H01L29/7378 , H01L29/0817 , H01L29/66242
摘要： The invention relates to a semiconductor device (10) with a substrate and a semiconductor body of silicon comprising a bipolar transistor with an emitter region (1), a base region (2) and a collector region (3) which are respectively of the N-type conductivity, the P-type conductivity and the N-type conductivity by the provision of suitable doping atoms, wherein the base region (2) comprises a mixed crystal of silicon and germanium, the base region (2) is separated from the emitter region by an intermediate region (22) of silicon having a doping concentration which is lower than the doping concentration of the emitter region (1) and with a thickness smaller than the thickness of the emitter region (1) and the emitter region (1) comprises a sub-region comprising a mixed crystal of silicon and germanium which is positioned at the side of emitter region (1) remote from the intermediate region (22). According to the invention, the sub-region comprising the mixed crystal of silicon and germanium extend substantially through the whole emitter region (1) up to the interlace with the intermediate region (22) and the doping atoms of the emitter region (1) are arsenic atoms. Such a device has a very steep n-type doping profile (50) and a very steep p- type doping profile (20) at or within the intermediate region (22) and thus excellent high- frequency behavior with a high cut-off frequency (fr). Preferably the emitter region (1) is doped with an arsenic implantation (I) in its upper half, the final doping profile being formed after an RTA. The invention also comprises a method of manufacturing a device (10) according to the invention.
摘要翻译：本发明涉及一种具有衬底和硅半导体主体的半导体器件（10），该半导体主体包括具有发射极区（1），基极区（2）和集电极区（ 3），其通过提供合适的掺杂原子分别具有N型导电性，P型导电性和N型导电性，其中基极区（2）包括硅和锗的混合晶体，基极区（2）通过掺杂浓度低于发射极区域（1）的掺杂浓度并且厚度小于发射极区域（1）的厚度的中间区域（22）与发射极区域分开）并且发射极区（1）包括包含位于发射极区（1）的远离中间区（22）侧的硅和锗的混合晶体的子区。根据本发明，包含硅和锗的混合晶体的子区域基本上延伸穿过整个发射极区域（1），直到与中间区域（22）交织并且发射极区域（1）的掺杂原子是砷原子。这种器件在中间区域（22）处或内部具有非常陡峭的n型掺杂分布（50）和非常陡峭的p型掺杂分布（20），因此具有高截止频率（FR）。优选地，发射极区（1）在其上半部分掺杂有砷注入（I），最终的掺杂分布在RTA之后形成。本发明还包括制造根据本发明的装置（10）的方法。

12. 发明申请

WO2006011069A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2006011069A1
公开(公告)日：2006-02-02
申请号：PCT/IB2005/052263
申请日：2005-07-07
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , HURKX, Godefridus, A., M. , AGARWAL, Prabhat , BALKENENDE, Abraham, R. , MAGNEE, Petrus, H., C. , WAGEMANS, Melanie, M., H. , BAKKERS, Erik, P., A., M. , HIJZEN, Erwin
发明人： HURKX, Godefridus, A., M. , AGARWAL, Prabhat , BALKENENDE, Abraham, R. , MAGNEE, Petrus, H., C. , WAGEMANS, Melanie, M., H. , BAKKERS, Erik, P., A., M. , HIJZEN, Erwin
IPC分类号： H01L29/08
CPC分类号： H01L29/0804 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/0821 , H01L29/7378 , Y10S977/936
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type, and the first conductivity type. One of the emitter or collector regions (1, 3) comprises a nanowire (30). The base region (2) has been formed from a layer (20) at the surface of the semiconductor body (12); the other one (3, 1) of the emitter or collector regions (1, 3) has been formed in the semiconductor body (12) below the base region (2). The emitter or collector region (1, 3) comprising the nanowire (30) has been provided on the surface of the semiconductor body (12) such that its longitudinal axis extends perpendicularly to the surface.
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区，基极区和集电极区（1,2,3）的双极晶体管，与第一导电类型相反的第二导电类型和第一导电类型。发射极或集电极区域（1,3）中的一个包括纳米线（30）。基底区域（2）由半导体本体（12）表面的层（20）形成; 发射极或集电极区域（1,3）中的另一个（3,1）已经形成在基极区域（2）下方的半导体本体（12）中。包括纳米线（30）的发射极或集电极区域（1,3）已经设置在半导体本体（12）的表面上，使得其纵向轴线垂直于该表面延伸。

13. 发明申请

WO2005117104A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2005117104A1
公开(公告)日：2005-12-08
申请号：PCT/IB2005/051636
申请日：2005-05-19
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , AGARWAL, Prabhat , SLOTBOOM, Jan, W. , DOORNBOS, Gerben
发明人： AGARWAL, Prabhat , SLOTBOOM, Jan, W. , DOORNBOS, Gerben
IPC分类号： H01L21/8249
CPC分类号： H01L21/8249
摘要： The invention relates to a semiconductor device (10) comprising a substrate (11) and a semiconductor body (1) of silicon having a semiconductor layer structure comprising, in succession, a first and a second semiconductor layer (2, 3), and having a surface region of a first conductivity type which is provided with a field effect transistor (M) with a channel of a second conductivity type, opposite to the first conductivity type, wherein the surface region is provided with source and drain regions (4A, 4B) of the second conductivity type for the field effect transistor (M) and with - interposed between said source and drain regions- a channel region (3A) with a lower doping concentration which forms part of the second semiconductor layer (3) and with a buried first-conductivity-type semiconductor region (2A), buried below the channel region (3A), with a doping concentration that is much higher than that of the channel region (3A) and which forms part of the first semiconductor layer (2). According to the invention, the semiconductor body (1) is provided not only with the field effect transistor (M) but also with a bipolar transistor (B) with emitter, base and collector regions (5A, 5B, 5C) of respectively the second, the first and the second conductivity type, and the emitter region (5A) is formed in the second semiconductor layer (3) and the base region (5B) is formed in the first semiconductor layer (2). In this way a Bi(C)MOS IC (10) is obtained which is very suitable for high-frequency applications and which is easy to manufacture using a method according to the invention. Preferably the first semiconductor layer (2) comprises Si-Ge and is delta-doped, whereas the second semiconductor layer (3) comprises strained Si.
摘要翻译：本发明涉及一种半导体器件（10），它包括具有半导体层结构的硅衬底（12）和半导体本体（1），半导体层结构依次包括第一和第二半导体层（2,3），并且具有具有与第一导电类型相反的具有第二导电类型的沟道的场效应晶体管（M）的第一导电类型的表面区域，其中所述表面区域设置有源极和漏极区域（4A，4B））和用于场效应晶体管（M）的第二导电类型，并且插入在所述源极和漏极区之间 - 具有较低掺杂浓度的沟道区（3A），其形成第二半导体层（3）的一部分，并且具有埋入第一导电型半导体区域（2A），其掺杂在沟道区域（3A）的下方，掺杂浓度比沟道区域（3A）的掺杂浓度高得多，并且形成第一半导体层（2）的一部分，。根据本发明，半导体本体（1）不仅具有场效应晶体管（M），而且还具有双极晶体管（B），发射极，基极和集电极区域（5A，5B，5C）分别为第二第一和第二导电类型和发射极区域（5A）形成在第二半导体层（3）中，并且基极区域（5B）形成在第一半导体层（2）中。以这种方式获得了非常适合于高频应用并且易于使用根据本发明的方法制造的Bi（C）MOS IC（10）。优选地，第一半导体层（2）包括Si-Ge并且是δ掺杂的，而第二半导体层（3）包括应变Si。

14. 发明申请

WO2008068692A1 METHOD OF MANUFACTURING A SEMICONDUCTOR SENSOR DEVICE AND SEMICONDUCTOR SENSOR DEVICE OBTAINED WITH SUCH METHOD 审中-公开
标题翻译：制造具有这种方法的半导体传感器器件和半导体传感器器件的方法
公开(公告)号：WO2008068692A1
公开(公告)日：2008-06-12
申请号：PCT/IB2007/054873
申请日：2007-11-30
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , JONVILLE, Carole, S., G. , AGARWAL, Prabhat , DEKKER, Ronald
发明人： JONVILLE, Carole, S., G. , AGARWAL, Prabhat , DEKKER, Ronald
IPC分类号： G01N27/414 , H01L29/06
CPC分类号： G01N27/4148 , G01N27/4145 , H01L29/785
摘要： The invention relates to a method of manufacturing a semiconductor sensor device (10) for sensing a substance (30) and comprising a strip-shaped semiconductor region (1) which is formed on a surface of a semiconductor body (12) and which is connected at a first end to a first electrically conducting connection region (3) and at a second end to a second electrically conducting connection region (4) while a. fluid (20) comprising a substance (30) to be sensed can flow along a side face of the strip-shaped semiconductor region (1) and the substance (30) to be sensed can influence the electrical properties of the strip-shaped semiconductor region (1), and wherein the strip-shaped semiconductor region (1) is formed in a semiconductor layer (13) on top of an insulating layer (5) which in turn is on top of a semiconductor substrate (14). According to the invention after formation of the strip-shaped semiconductor region (1) in- the semiconductor layer (13), the substrate (2) is attached to the -part of the semiconductor body (11) comprising the strip-shaped semiconductor region (1) at a side opposite to the semiconductor substrate (14), whereinafter the semiconductor substrate (14) is at least partially and preferably completely removed and subsequently an opening (6) is formed in the insulating layer (5) at the location of the strip-shaped semiconductor region (1). This method is. suitable for mass scale production and protects the parts of the device (10) that are prone to damage caused by the fluid (20).
摘要翻译：本发明涉及一种制造用于感测物质（30）的半导体传感器装置（10）的方法，该半导体传感器装置（10）包括形成在半导体本体（12）的表面上并被连接的条形半导体区域（1）在第一端连接到第一导电连接区域（3），并且在第二端处连接到第二导电连接区域（4）。包含待检测物质（30）的流体（20）可以沿着带状半导体区域（1）的侧面流动，被检测的物质（30）可以影响条形半导体区域（1），并且其中所述条形半导体区域（1）形成在绝缘层（5）的顶部上的半导体层（13）中，所述绝缘层（5）又在半导体衬底（14）的顶部。根据本发明，在形成半导体层（13）中的带状半导体区域（1）之后，将衬底（2）附接到包括条形半导体区域的半导体本体（11）的一部分（1）在与所述半导体衬底（14）相对的一侧上，其中所述半导体衬底（14）至少部分地且优选地被完全去除，并且随后在所述绝缘层（5）的位置处形成开口（6）带状半导体区域（1）。这个方法是。适用于大规模生产并且保护易于由流体（20）引起的损坏的装置（10）的部分。

15. 发明申请

WO2006072842A1 DIELECTRIC ANTIFUSE FOR ELECTRO-THERMALLY PROGRAMMABLE DEVICE 审中-公开
标题翻译：用于电热可编程器件的电介质抗体
公开(公告)号：WO2006072842A1
公开(公告)日：2006-07-13
申请号：PCT/IB2005/053898
申请日：2005-11-24
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , BOEVE, Hans, M., B. , ATTENBOROUGH, Karen , HURKX, Godefridus, A., M. , AGARWAL, Prabhat , HUIZING, Hendrik G., A. , IN 'T ZANDT, Michael, A., A. , SLOTBOOM, Jan, W.
发明人： BOEVE, Hans, M., B. , ATTENBOROUGH, Karen , HURKX, Godefridus, A., M. , AGARWAL, Prabhat , HUIZING, Hendrik G., A. , IN 'T ZANDT, Michael, A., A. , SLOTBOOM, Jan, W.
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144
摘要： A thermally programmable memory has a programmable element (20) of a thermally programmable resistance preferably of phase change material, material and a blown antifuse (80) located adjacent to the programmable material. Such a blown antiiuse has a dielectric layer (100) surrounded by conductive layers (90,110) to enable a brief high voltage to be applied across the dielectric to blow a small hole in the dielectric during manufacture to form a small conductive path which can be used as a tiny electrical heater for programming the material. Due to the current confinement by the hole, the volume of the material that must be heated in order to switch to a highly- resistive state is very small. As a result the programming power can be low.
摘要翻译：热可编程存储器具有可编程电阻的可编程电阻（20），优选地是相变材料的材料和位于可编程材料附近的吹制反熔丝（80）。这种吹制的抗氧化剂具有由导电层（90,110）包围的电介质层（100），以使得能够在制造期间在电介质两端施加短暂的高电压以吹出电介质中的小孔，以形成可以使用的小导电路径作为用于编程材料的微小电加热器。由于孔的电流限制，必须加热以切换到高阻态的材料的体积非常小。因此，编程功率可能很低。

16. 发明申请

WO2006056916A1 RADIATION DOSIMETER 审中-公开
标题翻译：辐射剂量计
公开(公告)号：WO2006056916A1
公开(公告)日：2006-06-01
申请号：PCT/IB2005/053805
申请日：2005-11-17
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , AGARWAL, Prabhat
发明人： AGARWAL, Prabhat
IPC分类号： G01T1/02 , G01T1/24
CPC分类号： G01T1/026 , G01T1/2018 , G01T1/245
摘要： A personal X-ray dosimeter system, comprising a portable detector (100) and a reader device (114). The portable detector (100) comprises an array (104) of programmed non- volatile memory elements (102) and a scintillator element (106) for converting a portion opf X-radiation incident thereon to UV radiation. As a result of exposure to X-radiation (112) not converted to UV radiation, some of the memory elements (102) will have the charge on their floating gates, thereby causing a corresponding shift in threshold voltage (VT). After some exposure time, the reader device (114) reads from the detector (100) data representative of the number of VT shifted memory elements (102), and determines therefrom using predetermined calibration curves, the radiation dose (122) to which the user has been exposed.
摘要翻译：一种个人X射线剂量计系统，包括便携式检测器（100）和读取器装置（114）。便携式检测器（100）包括编程的非易失性存储器元件（102）的阵列（104）和用于将入射到其上的部分opf X辐射转换成UV辐射的闪烁器元件（106）。作为未被转换成UV辐射的X辐射（112）的结果，一些存储元件（102）将在其浮动栅极上具有电荷，从而导致阈值电压（VT）的相应偏移。在一些曝光时间之后，读取器设备（114）从检测器（100）读取表示VT移位存储器元件（102）的数量的数据，并且使用预定的校准曲线来确定用户的辐射剂量（122）已经曝光

17. 发明申请

WO2006040720A2 CONTROLLING PARASITIC BIPOLAR GAIN IN A CMOS DEVICE 审中-公开
标题翻译：在CMOS器件中控制寄生双极增益
公开(公告)号：WO2006040720A2
公开(公告)日：2006-04-20
申请号：PCT/IB2005/053308
申请日：2005-10-10
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , AGARWAL, Prabhat , SLOTBOOM, Jan, W.
发明人： AGARWAL, Prabhat , SLOTBOOM, Jan, W.
IPC分类号： H01L27/092 , H01L29/08
CPC分类号： H01L27/0921
摘要： A CMOS device comprising an n-channel MOS transistor (102) and a pchannel MOS transistor (100), defining a pair of parasitic bipolar transitors (110a, 110b) therebetween, wherein a layer (120) of doped SiGe is provided over the source region (106a) of at least one of the MOS transistors (100, 102), between the source region (106a) and the source contact (122). The layer (120) of material acts as a sink for minority carriers (holes in an N-type device) at the source, which has the effect of increasing surface recombination velocity (because the landgap of SiGe is lower than that of the Si substrate (104)), which, in turn, lowers the current gain of the respective parasitic bipolar device. As a result, the effects and/or occurrence of latch-up, and other breakdown instabilities associated with parasitic bipolar devices, can be limited.
摘要翻译：一种CMOS器件，包括在其间限定一对寄生双极晶体管（110a，110b）的n沟道MOS晶体管（102）和p沟道MOS晶体管（100），其中层在源极区（106a）和源极接触（122）之间，在至少一个MOS晶体管（100,102）的源极区（106a）上提供掺杂的SiGe。材料层（120）充当源极处的少数载流子（N型器件中的空穴）的汇，其具有增加表面复合速度的作用（因为SiGe的焊盘间隙低于Si衬底（104）），这又降低了相应寄生双极器件的电流增益。结果，与寄生双极器件相关的闩锁效应和/或出现的闩锁以及其他击穿不稳定性可能受到限制。

18. 发明申请

WO2006008703A3 NANOSCALE FET 审中-公开
公开(公告)号：WO2006008703A3
公开(公告)日：2006-01-26
申请号：PCT/IB2005/052313
申请日：2005-07-12
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , SURDEANU, Radu , AGARWAL, Prabhat , BALKENENDE, Abraham Rudolf , BAKKERS, Erik, P., A., M.
发明人： SURDEANU, Radu , AGARWAL, Prabhat , BALKENENDE, Abraham Rudolf , BAKKERS, Erik, P., A., M.
IPC分类号： H01L29/775 , H01L29/78 , H01L51/05 , H01L51/30 , H01L21/336 , B82B3/00
摘要： A transistor device is formed of a continuous linear nanostructure having a source region, a drain region and a channel region between the source and drain regions. The source (20) and drain (26) regions are formed of nanowire ania the channel region (24) is in the form of a nanotube. An insulated gate (32) is provided adjacent to the channel region (24) for controlling conduction i ni the channel region between the source and drain regions.

19. 发明申请

WO2004075300A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2004075300A1
公开(公告)日：2004-09-02
申请号：PCT/IB2004/050103
申请日：2004-02-12
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , VAN DALEN, Rob , AGARWAL, Prabhat , SLOTBOOM, Jan, W. , KOOPS, Gerrit, E., J.
发明人： VAN DALEN, Rob , AGARWAL, Prabhat , SLOTBOOM, Jan, W. , KOOPS, Gerrit, E., J.
IPC分类号： H01L29/08
CPC分类号： H01L29/66242 , H01L29/7378
摘要： The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (12) with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2) and a collector region (3), which are provided with, respectively, a first, a second and a third connection conductor (4, 5, 6), and wherein the bandgap of the base region (2) is smaller than that of the collector region (3) or of the emitter region (1), for example by the use of a silicon-germanium mixed crystal instead of pure silicon in the base region (2). Such a device is characterized by a very high speed, but its transistor shows a relatively low BVeeo. In a device (10) according to the invention the doping flux of the emitter region (1) is locally reduced by a further semiconductor region (20) of the second conductivity type which is embedded in the emitter region (1). In this way, on the one hand, a low-impedance emitter contact is ensured, while locally the Gummel number is increased without the drawbacks normally associated with such an increase. In this way, the hole current in the, npn, transistor is increased and thus the gain is decreased. The relatively high gain of a Si-Ge transistor is responsible for the low BVCeOf which is consequently avoided in a device (10) according to the invention. Preferably the further semiconductor region (20) is recessed in the emitter region (1) and said emitter region (1) preferably comprises a lower doped part that borders on the base region (2) and that is situated below the further semiconductor region (20). The invention also comprises a method of manufacturing a semiconductor device (10) according to the invention.
摘要翻译：本发明涉及具有衬底（11）和具有异质结双极性的半导体本体（12）的半导体器件，特别是具有发射极区域（1），基极区域（2）和集电极区域（3）的npn晶体管），其分别设置有第一，第二和第三连接导体（4,5,6），并且其中所述基极区域（2）的带隙小于所述集电极区域（3）的带隙或的发射极区域（1），例如通过在基极区域（2）中使用硅 - 锗混合晶体代替纯硅。这种器件的特点是非常高的速度，但其晶体管显示相对较低的BVeeo。在根据本发明的器件（10）中，发射极区域（1）的掺杂通量被嵌入在发射极区域（1）中的第二导电类型的另外的半导体区域（20）局部地减小。以这种方式，一方面，确保了低阻抗发射极接触，而局部地增加了Gummel数量，而没有通常与这种增加相关联的缺点。以这种方式，npn晶体管中的空穴电流增加，因此增益降低。 Si-Ge晶体管的相对高的增益负责在本发明的器件（10）中避免的低BVCeOf。优选地，另外的半导体区域（20）凹陷在发射极区域（1）中，并且所述发射极区域（1）优选地包括在基极区域（2）上接合并位于另外的半导体区域（20）下方的下部掺杂部分）。本发明还包括制造根据本发明的半导体器件（10）的方法。

20. 发明申请

WO2007086009A1 NANOWIRE TUNNELING TRANSISTOR 审中-公开
标题翻译： NANOWIRE隧道晶体管
公开(公告)号：WO2007086009A1
公开(公告)日：2007-08-02
申请号：PCT/IB2007/050241
申请日：2007-01-24
申请人： NXP B.V. , HURKX, Fred , AGARWAL, Prabhat
发明人： HURKX, Fred , AGARWAL, Prabhat
IPC分类号： H01L29/06 , H01L29/10 , H01L29/78 , H01L21/336
CPC分类号： H01L29/1054 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/66666 , H01L29/7827 , Y10S977/75 , Y10S977/813 , Y10S977/938
摘要： A transistor comprises a nanowire (22, 22') having a source (24) and a drain (29) separated by an intrinsic or lowly doped region (26, 28). A potential barrier is formed at the interface of the intrinsic or lowly doped region (26, 28) and one of the source (24) and the drain (29). A gate electrode (32) is provided in the vicinity of the potential barrier such that the height of the potential barrier can be modulated by applying an appropriate voltage to the gate electrode (32).
摘要翻译：晶体管包括具有由本征或低掺杂区域（26,28）分开的源极（24）和漏极（29）的纳米线（22,22'）。在本征或低掺杂区域（26,28）和源极（24）和漏极（29）中的一个的界面处形成势垒。在势垒附近设置栅电极（32），使得可以通过向栅极（32）施加适当的电压来调制势垒的高度。

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