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11. 发明申请

US20120300585A1 RECIPROCAL METHOD TWO-WAY WAVE EQUATION TARGETED DATA SELECTION FOR SEISMIC ACQUISITION OF COMPLEX GEOLOGIC STRUCTURES 有权
标题翻译：接收方式两路波方程目标数据选择用于地震采集复杂地质结构
公开(公告)号：US20120300585A1
公开(公告)日：2012-11-29
申请号：US13482888
申请日：2012-05-29
申请人： Jun CAO , Joel D. BREWER , Charles C. MOSHER , Peter M. EICK
发明人： Jun CAO , Joel D. BREWER , Charles C. MOSHER , Peter M. EICK
IPC分类号： G01V1/28 , G01V1/20
CPC分类号： G01V1/345 , G01V1/20 , G01V1/282 , G01V2210/614 , G01V2210/671
摘要： The invention relates to seismic surveying where complex geologies are likely to create data that is confusing or ambiguous for a conventional matrix of acquisition source points and receiver locations. With some understanding of the geological substructure, the acquisition source points and receiver locations that optimize the imaging may be found by using a reciprocal two-way wave equation propagation method coupled with the best geologic model available. With this, the acquisition source points and receiver locations that optimize the imaging may be used in seismic survey to better resolve the substructure and avoid the inclusion of data that obscures understanding of the substructure.
摘要翻译：本发明涉及地震测量，其中复杂的地质学可能产生对于传统的采集源点和接收机位置的混合或不明确的数据。通过对地质子结构的一些了解，优化成像的采集源点和接收器位置可以通过使用可逆的双向波方程传播方法和可用的最佳地质模型来发现。因此，优化成像的采集源点和接收器位置可用于地震勘测，以更好地解决子结构，并避免包含掩盖对子结构的理解的数据。

12. 发明申请

US20120007640A1 Multi-Channel Multi-Protocol Transceiver With Independent Channel Configuration Using Single Frequency Reference Clock Source 有权
标题翻译：具有使用单频参考时钟源的独立通道配置的多通道多协议收发器
公开(公告)号：US20120007640A1
公开(公告)日：2012-01-12
申请号：US12860596
申请日：2010-08-20
申请人： Jun CAO , Afshin MOMTAZ , Chung-Jue CHEN , Kang XIAO , Vivek TELANG , Ali GHIASI
发明人： Jun CAO , Afshin MOMTAZ , Chung-Jue CHEN , Kang XIAO , Vivek TELANG , Ali GHIASI
IPC分类号： H03L7/06 , H03L7/08
CPC分类号： H03L7/18
摘要： A circuit for producing one of a plurality of output clock frequencies from a single, constant input reference clock frequency. The circuit comprises a reference clock system and a phase lock loop. The reference clock system includes a bypass path, a divider path including a first integer divider, and a multiplexer. A divisor of the first integer divider is based on a selected communications protocol of a group of possible communications protocols. The multiplexer is configured to route the bypass path or the divider path based on the selected communications protocol. The phase lock loop includes a voltage controlled oscillator and a feedback path. The feedback path includes a second integer divider. A divisor of the second integer divider is based on the selected communications protocol. The reference clock system is configured to receive a constant reference clock frequency. The voltage controlled oscillator is configured to produce one of a plurality of output clock frequencies corresponding to the selected communications protocol. The selected output clock frequency is produced based on at least one of the routing of the multiplexer, the divisor of the first integer divider, and the divisor of the second integer divider.
摘要翻译：一种用于从单个恒定输入参考时钟频率产生多个输出时钟频率之一的电路。该电路包括参考时钟系统和锁相环。参考时钟系统包括旁路路径，包括第一整数除法器的分频器路径和多路复用器。第一整数分频器的除数基于一组可能的通信协议的所选通信协议。多路复用器被配置为基于所选择的通信协议来路由旁路路径或分路器路径。锁相环包括压控振荡器和反馈路径。反馈路径包括第二整数分频器。第二整数分频器的除数基于所选择的通信协议。参考时钟系统被配置为接收恒定的参考时钟频率。压控振荡器被配置为产生与所选择的通信协议相对应的多个输出时钟频率中的一个。所选择的输出时钟频率基于多路复用器的路由，第一整数除法器的除数和第二整数除法器的除数中的至少一个来产生。

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