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11. 发明申请

US20080040413A1 IFFT PROCESSING IN WIRELESS COMMUNICATIONS 有权
标题翻译：无线通信中的IFFT处理
公开(公告)号：US20080040413A1
公开(公告)日：2008-02-14
申请号：US11612456
申请日：2006-12-18
申请人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
发明人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
IPC分类号： G06F15/00
CPC分类号： H04L27/2626
摘要： Techniques for performing IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory having first and second sections, an encoder configured to process data in each of the first and second memory sections, an IFFT configured to process the encoded data in the first and second memory sections, and a post-processor configured to process the IFFT processed data in the first memory section while the IFFT is processing the encoded data in the second memory section, the post processor configured to operate at a different clock speed than the encoder or the IFFT.
摘要翻译：描述了用于执行IFFT流水线的技术。在一些方面，流水线通过具有具有第一和第二部分的存储器的处理系统来实现，编码器被配置为处理第一和第二存储器部分中的每一个中的数据;被配置为处理第一和第二部分中的编码数据的IFFT 存储器部分和后处理器，其被配置为在IFFT处理第二存储器部分中的编码数据时处理第一存储器部分中的IFFT处理的数据，后处理器被配置为以与编码器不同的时钟速度操作 IFFT。

12. 发明授权

US08543629B2 IFFT processing in wireless communications 有权
标题翻译：无线通信中的IFFT处理
公开(公告)号：US08543629B2
公开(公告)日：2013-09-24
申请号：US11612455
申请日：2006-12-18
申请人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. Van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
发明人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. Van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
IPC分类号： G06F17/14
CPC分类号： H04L27/2626
摘要： Techniques for perforating IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory with a first, second and third sections, an encoder configured to process data in each of the first, second and third memory sections in a round robin fashion, an IFFT configured to process the encoded data in each of the first, second, and third sections in a round robin fashion, and a post-processor configured to process the IFFT processed data in each of the first, second and third memory sections in a round robin fashion.
摘要翻译：描述了用于穿孔IFFT流水线的技术。在一些方面，流水线通过具有具有第一，第二和第三部分的存储器的处理系统来实现，编码器被配置为以循环方式处理第一，第二和第三存储器部分中的每一个中的数据，IFFT被配置以循环方式处理第一，第二和第三部分中的每一个中的编码数据，以及后处理器，其被配置为以循环方式处理第一，第二和第三存储器部分中的每一个中的经IFFT处理的数据。

13. 发明授权

US07613256B2 Forward error correction in a distribution system 失效
标题翻译：配电系统中的前向纠错
公开(公告)号：US07613256B2
公开(公告)日：2009-11-03
申请号：US11398204
申请日：2006-04-04
申请人： Durk L. van Veen , Jai N. Subrahmanyam , Jinxia Bai , Murali Ramaswamy Chari
发明人： Durk L. van Veen , Jai N. Subrahmanyam , Jinxia Bai , Murali Ramaswamy Chari
IPC分类号： H04L27/06
CPC分类号： H04L1/0061 , H04L1/0082 , H04L2001/0097
摘要： A multimedia distribution system is disclosed. The distribution system includes a transmitter unit that distributes content from a content provider to one or more wireless subscriber units. The transmitter unit includes a decoder configured to determine whether a plurality of incoming packets include one or more erasures, a transmitter configured to transmit the packets to a receiving unit, and an error detection code generator configured to generate an error detection code for each of the packets transmitted to the receiver unit, the error detection code being modified for each of the erased packets so that the receiver unit will be able to identify the erased packets.
摘要翻译：公开了一种多媒体分发系统。分配系统包括将内容从内容提供商分发到一个或多个无线用户单元的发射机单元。发射机单元包括解码器，其被配置为确定多个输入分组是否包括一个或多个擦除，被配置为将分组发送到接收单元的发射机，以及错误检测码发生器，被配置为生成每个发送到接收机单元的分组，针对每个被擦除的分组修改错误检测码，使得接收机单元将能够识别被擦除的分组。

14. 发明申请

US20110032015A1 SYSTEMS AND METHODS FOR CLOCK CORRECTION 审中-公开
标题翻译：用于时钟校正的系统和方法
公开(公告)号：US20110032015A1
公开(公告)日：2011-02-10
申请号：US12793546
申请日：2010-06-03
申请人： Jinxia Bai , Linbo Li
发明人： Jinxia Bai , Linbo Li
IPC分类号： H03L7/00
CPC分类号： H04L7/0008 , G06F1/12 , H04L7/0025
摘要： A method, apparatus and system for correcting different clock domains are disclosed. The disclosed implementations correct a second clock domain by making reference to a resampling filter, or similar device, used to correct a first clock domain. The implementations thereby facilitate clock correction using fewer or a different variety of elements.
摘要翻译：公开了一种用于校正不同时钟域的方法，装置和系统。所公开的实现通过参考用于校正第一时钟域的重采样滤波器或类似装置来校正第二时钟域。因此，这些实施方式使用较少或不同种类的元件便于时钟校正。

15. 发明授权

US07529531B2 Apparatus and methods for estimating a sleep clock frequency 失效
标题翻译：用于估计睡眠时钟频率的装置和方法
公开(公告)号：US07529531B2
公开(公告)日：2009-05-05
申请号：US11271445
申请日：2005-11-09
申请人： Michael Mao Wang , Chinnappa K. Ganapathy , Jinxia Bai
发明人： Michael Mao Wang , Chinnappa K. Ganapathy , Jinxia Bai
IPC分类号： H04B14/02
CPC分类号： H04W52/029 , Y02D70/166
摘要： Apparatus and methods for estimating the frequency of a sleep or slow clock using a fast clock, such as a temperature compensated crystal oscillator. The disclosed apparatus include an estimator having a first counter that receives sleep clock synchronized pulses issuing each cycle of the sleep clock period, yet are synchronized to a fast clock. The slow clock synchronized pulses are counted up to a predetermined number; whereupon a full count signal is issued. A second counter receives the full count signal and increments each time the full count signal is received. A third counter counts fast clock cycles until the full count signal occurs. Based on the number of counts of the slow and fast clock cycles, the frequency of the slow clock may be determined using only the domain of the fast clock for performing the measurement thereby tying accuracy of the measurement to the accuracy of the fast clock. The disclosed apparatus also include an integrated circuit and a transceiver employing the disclosed estimator. Corresponding methods are also disclosed.
摘要翻译：使用诸如温度补偿晶体振荡器的快速时钟来估计睡眠或慢时钟频率的装置和方法。所公开的装置包括具有第一计数器的估计器，该第一计数器接收发出睡眠时钟周期的每个周期的休眠时钟同步脉冲，但是与快速时钟同步。慢时钟同步脉冲被计数到预定数量; 然后发出完整计数信号。第二计数器接收完全计数信号，并且每当接收到全计数信号时递增。第三个计数器计数快速时钟周期，直到发生完全计数信号。基于慢速和快速时钟周期的计数次数，可以仅使用用于执行测量的快速时钟的域来确定慢时钟的频率，从而将测量的精度与快速时钟的精度相结合。所公开的装置还包括采用所公开的估计器的集成电路和收发器。还公开了相应的方法。

16. 发明申请

US20070230627A1 Forward error correction in a distribution system 失效
标题翻译：配电系统中的前向纠错
公开(公告)号：US20070230627A1
公开(公告)日：2007-10-04
申请号：US11398204
申请日：2006-04-04
申请人： Durk van Veen , Jai Subrahmanyam , Jinxia Bai , Murali Chari
发明人： Durk van Veen , Jai Subrahmanyam , Jinxia Bai , Murali Chari
IPC分类号： H04L27/06
CPC分类号： H04L1/0061 , H04L1/0082 , H04L2001/0097
摘要： A multimedia distribution system is disclosed. The distribution system includes a transmitter unit that distributes content from a content provider to one or more wireless subscriber units. The transmitter unit includes a decoder configured to determine whether a plurality of incoming packets include one or more erasures, a transmitter configured to transmit the packets to a receiving unit, and an error detection code generator configured to generate an error detection code for each of the packets transmitted to the receiver unit, the error detection code being modified for each of the erased packets so that the receiver unit will be able to identify the erased packets.
摘要翻译：公开了一种多媒体分发系统。分配系统包括将内容从内容提供商分发到一个或多个无线用户单元的发射机单元。发射机单元包括解码器，其被配置为确定多个输入分组是否包括一个或多个擦除，被配置为将分组发送到接收单元的发射机，以及错误检测码发生器，被配置为生成每个发送到接收机单元的分组，针对每个被擦除的分组修改错误检测码，使得接收机单元将能够识别被擦除的分组。

17. 发明授权

US08612504B2 IFFT processing in wireless communications 有权
标题翻译：无线通信中的IFFT处理
公开(公告)号：US08612504B2
公开(公告)日：2013-12-17
申请号：US11612456
申请日：2006-12-18
申请人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. Van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
发明人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. Van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
IPC分类号： G06F17/14 , G06F15/00
CPC分类号： H04L27/2626
摘要： Techniques for performing IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory having first and second sections, an encoder configured to process data in each of the first and second memory sections, an IFFT configured to process the encoded data in the first and second memory sections, and a post-processor configured to process the IFFT processed data in the first memory section while the IFFT is processing the encoded data in the second memory section, the post processor configured to operate at a different clock speed than the encoder or the IFFT.
摘要翻译：描述了执行IFFT流水线技术。在一些方面，流水线通过具有具有第一和第二部分的存储器的处理系统来实现，编码器被配置为处理第一和第二存储器部分中的每一个中的数据;被配置为处理第一和第二部分中的编码数据的IFFT 存储器部分和后处理器，其被配置为在IFFT处理第二存储器部分中的编码数据时处理第一存储器部分中的IFFT处理的数据，后处理器被配置为以与编码器不同的时钟速度操作 IFFT。

18. 发明申请

US20080040412A1 IFFT PROCESSING IN WIRELESS COMMUNICATIONS 有权
标题翻译：无线通信中的IFFT处理
公开(公告)号：US20080040412A1
公开(公告)日：2008-02-14
申请号：US11612455
申请日：2006-12-18
申请人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
发明人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
IPC分类号： G06F17/14
CPC分类号： H04L27/2626
摘要： Techniques for perforating IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory with a first, second and third sections, an encoder configured to process data in each of the first, second and third memory sections in a round robin fashion, an IFFT configured to process the encoded data in each of the first, second, and third sections in a round robin fashion, and a post-processor configured to process the IFFT processed data in each of the first, second and third memory sections in a round robin fashion.
摘要翻译：描述了用于穿孔IFFT流水线的技术。在一些方面，流水线通过具有具有第一，第二和第三部分的存储器的处理系统来实现，编码器被配置为以循环方式处理第一，第二和第三存储器部分中的每一个中的数据，IFFT被配置以循环方式处理第一，第二和第三部分中的每一个中的编码数据，以及后处理器，其被配置为以循环方式处理第一，第二和第三存储器部分中的每一个中的经IFFT处理的数据。

19. 发明申请

US20070105525A1 Apparatus and methods for estimating a sleep clock frequency 失效
标题翻译：用于估计睡眠时钟频率的装置和方法
公开(公告)号：US20070105525A1
公开(公告)日：2007-05-10
申请号：US11271445
申请日：2005-11-09
申请人： Michael Wang , Chinnappa Ganapathy , Jinxia Bai
发明人： Michael Wang , Chinnappa Ganapathy , Jinxia Bai
IPC分类号： H04B1/16 , H04B1/38
CPC分类号： H04W52/029 , Y02D70/166
摘要： Apparatus and methods for estimating the frequency of a sleep or slow clock using a fast clock, such as a temperature compensated crystal oscillator. The disclosed apparatus include an estimator having a first counter that receives sleep clock synchronized pulses issuing each cycle of the sleep clock period, yet are synchronized to a fast clock. The slow clock synchronized pulses are counted up to a predetermined number; whereupon a full count signal is issued. A second counter receives the full count signal and increments each time the full count signal is received. A third counter counts fast clock cycles until the full count signal occurs. Based on the number of counts of the slow and fast clock cycles, the frequency of the slow clock may be determined using only the domain of the fast clock for performing the measurement thereby tying accuracy of the measurement to the accuracy of the fast clock. The disclosed apparatus also include an integrated circuit and a transceiver employing the disclosed estimator. Corresponding methods are also disclosed.
摘要翻译：使用诸如温度补偿晶体振荡器的快速时钟来估计睡眠或慢时钟频率的装置和方法。所公开的装置包括具有第一计数器的估计器，该第一计数器接收发出睡眠时钟周期的每个周期的休眠时钟同步脉冲，但是与快速时钟同步。慢时钟同步脉冲被计数到预定数量; 然后发出完整计数信号。第二计数器接收完全计数信号，并且每当接收到全计数信号时递增。第三个计数器计数快速时钟周期，直到发生完全计数信号。基于慢速和快速时钟周期的计数次数，可以仅使用用于执行测量的快速时钟的域来确定慢时钟的频率，从而将测量的精度与快速时钟的精度相结合。所公开的装置还包括采用所公开的估计器的集成电路和收发器。还公开了相应的方法。

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