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11. 发明授权

US4999737A Solid dielectric capacitor and method of manufacture 失效
公开(公告)号：US4999737A
公开(公告)日：1991-03-12
申请号：US482659
申请日：1990-02-21
申请人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
发明人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
IPC分类号： C04B35/46 , C04B35/468 , C04B35/49 , H01G4/12
CPC分类号： C04B35/49 , C04B35/4682 , H01G4/1245
摘要： A monolithic capacitor having a dielectric ceramic body cosintered with at least two base metal electrodes. The ceramic body is composed of a major ingredient expressed by the formula,(1-.alpha.){(Ba.sub.k-x-y L.sub.x M.sub.y)O.sub.k TiO.sub.2 }+.alpha.CaZrO.sub.3,where L is either or both of magnesium and zinc, M is either or both of calcium and strontium, and .alpha., k, x and y are numerals in specified ranges. To this major ingredient is added a minor proportion of a mixture of boric oxide, silicon dioxide and at least one metal oxide selected from among barium oxide, strontium oxide, calcium oxide, magnesium oxide and zinc oxide. For the fabrication of capacitors the mixture of the above major ingredient and additives in finely divided form are formed into moldings of desired shape and size, each with at least two electrodes buried therein. The moldings and electrodes are cosintered in a reductive or neutral atmosphere at temperatures of less than 1200.degree. C. and then are reheated at a lower temperature in an oxidative atmosphere.

12. 发明授权

US4999736A Solid dielectric capacitor and method of manufacture 失效
公开(公告)号：US4999736A
公开(公告)日：1991-03-12
申请号：US482654
申请日：1990-02-21
申请人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
发明人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
IPC分类号： C04B35/46 , C04B35/468 , C04B35/49 , H01G4/12
CPC分类号： C04B35/4682 , C04B35/49 , H01G4/1245 , Y10T29/435
摘要： A monolithic capacitor having a dielectric ceramic body cosintered with at least two base metal electrodes. The ceramic body is composed of a major ingredient expressed by the formula,(1-.alpha.)(Ba.sub.k-x-y L.sub.x M.sub.y)O.sub.k TiO.sub.2)+.alpha.CaZrO.sub.s,where L is either or both of magnesium and zinc, M is either or both of calcium and strontium, and .alpha., k, x and y are numerals in specified ranges. To this major ingredient is added a minor proportion of a mixture of lithium oxide, silicon dioxide and at least one metal oxide selected from among barium oxide, strontium oxide, calcium oxide, magnesium oxide and zinc oxide. For the fabrication of capacitors the mixture of the above major ingredient and additives in finely divided form are formed into moldings of desired shape and size, each with at least two electrodes buried therein. The moldings and electrodes are cosintered in a reductive or neutral atmosphere at temperatures of less than 1200.degree. C. and then are reheated at a lower temperature in an oxidative atmosphere.

13. 发明授权

US06614644B2 Multilayer ceramic capacitor and method for the manufacture thereof 有权
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：US06614644B2
公开(公告)日：2003-09-02
申请号：US09785064
申请日：2001-02-15
申请人： Hirokazu Chazono , Hisamitsu Shizuno , Hiroshi Kishi
发明人： Hirokazu Chazono , Hisamitsu Shizuno , Hiroshi Kishi
IPC分类号： H01G406
CPC分类号： H01G4/1209
摘要： A multilayer ceramic capacitor includes sintered laminated bodies having a plurality of dielectric layers alternately stacked with a multiplicity of internal electrodes, and a pair of external electrodes electrically coupled to the internal electrodes. The dielectric layer is of sintered ceramic grains. The ceramic grains include a core portion surrounded by a shell portion or a solid solution. The ceramic grains contain additive elements such as acceptor elements and/or rare earth elements. The additive elements are non-uniformly distributed in the core and/or shell portion of the ceramic grain or in the solid solution. Such non-uniform distribution of the additive elements in ceramic grains promotes or facilitates the re-oxidation process of the ceramic grains and also increases electrical resistance thereof. Accordingly, the operating life characteristics of the multilayer ceramic capacitors, especially those incorporating therein thin dielectric layers, can be improved. As a result, the thickness of dielectric layers can be further reduced and a greater number of dielectric layers can be used in forming multilayer ceramic capacitors, enabling miniaturization and large capacitance thereof to be achieved.
摘要翻译：多层陶瓷电容器包括具有交替层叠有多个内部电极的多个电介质层和电连接到内部电极的一对外部电极的烧结层叠体。电介质层是烧结陶瓷晶粒。陶瓷颗粒包括由壳部分或固溶体包围的芯部分。陶瓷颗粒含有添加元素，例如受主元素和/或稀土元素。添加剂元素不均匀地分布在陶瓷颗粒的芯部和/或壳部分或固体溶液中。添加元素在陶瓷颗粒中的这种不均匀分布促进或促进了陶瓷颗粒的再氧化过程，并且还增加了其电阻。因此，可以提高多层陶瓷电容器的使用寿命特性，特别是那些结合有薄介电层的陶瓷电容器。结果，可以进一步减小电介质层的厚度，并且可以在形成多层陶瓷电容器中使用更多数量的电介质层，从而实现小型化和大的电容。

14. 发明授权

US5006954A Solid dielectric capacitor and method of manufacture 失效
标题翻译：固体介质电容器及其制造方法
公开(公告)号：US5006954A
公开(公告)日：1991-04-09
申请号：US483076
申请日：1990-02-21
申请人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
发明人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
IPC分类号： C04B35/46 , C04B35/468 , C04B35/49 , H01G4/12
CPC分类号： C04B35/49 , C04B35/4682 , H01G4/1245
摘要： A monolithic capacitor having a dielectric ceramic body cosintered with at least two base metal electrodes. The ceramic body is composed of a major ingredient expressed by the formula,(1-.alpha.){(Ba.sub.k-x M.sub.x)O.sub.k TiO.sub.2 }+.alpha.CaZrO.sub.3where M is either or both of magnesium and zinc, and .alpha., k and y are numerals in specified ranges. To this major ingredient is added a minor proportion of a mixture of lithium oxide, silicon dioxide and at least one metal oxide selected from among barium oxide, strontium oxide, calcium oxide, magnesium oxide and zinc oxide. For the fabrication of capacitors the mixture of the above major ingredient and additives in finely divided form are formed into moldings of desired shape and size, each with at least two electrodes buried therein. The moldings and electrodes are cosintered in a reductive or neutral atmosphere at temperatures of less than 1200.degree. C. and then are reheated at a lower temperature in an oxidative atmosphere.

15. 发明授权

US4999738A Solid dielectric capacitor and method of manufacture 失效
公开(公告)号：US4999738A
公开(公告)日：1991-03-12
申请号：US483079
申请日：1990-02-21
申请人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
发明人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
IPC分类号： C04B35/46 , C04B35/49 , H01G4/12
CPC分类号： C04B35/49 , H01G4/1245
摘要： A monolithic capacitor having a dielectric ceramic body cosintered with at least two base metal electrodes. The ceramic body is composed of a major ingredient expressed by the formula,(1-.alpha.){(Ba.sub.k-x M.sub.x)O.sub.k TiO.sub.2 }+.alpha.CaZrO.sub.3where M is either or both of calcium and strontium, and .alpha., k and y are numerals in specified ranges. To this major ingredient is added a minor proportion of a mixture of boric oxide, silicon dioxide and at least one metal oxide selected from among barium oxide, strontium oxide, calcium oxide, magnesium oxide and zinc oxide. For the fabrication of capacitors the mixture of the above major ingredient and additives in finely divided form are formed into moldings of desired shape and size, each with at least two electrodes buried therein. The moldings and electrodes are cosintered in a reductive or neutral atmosphere at temperatures of less than 1200.degree. C. and then are reheated at a lower temperature in an oxidative atmosphere.

16. 发明授权

US4999739A Solid dielectric capacitor and method of manufacture 失效
公开(公告)号：US4999739A
公开(公告)日：1991-03-12
申请号：US483140
申请日：1990-02-21
申请人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
发明人： Hiroshi Kishi , Hirokazu Chazono , Minoru Oshio , Hiroshi Saito , Toshiya Nakamura , Hisamitsu Shizuno
IPC分类号： C04B35/46 , C04B35/468 , C04B35/49 , H01G4/12
CPC分类号： C04B35/4682 , C04B35/49 , H01G4/1245
摘要： A monolithic capacitor having a dielectric ceramic body cosintered with at least two base metal electrodes. The ceramic body is composed of a major ingredient expressed by the formula,(1-.alpha.){(Ba.sub.k-x M.sub.x)O.sub.k TiO.sub.2 }+.alpha.CaZrO.sub.3where M is either or both of magnesium and zinc, and .alpha., k and y are numerals in specified ranges. To this major ingredient is added a minor proportion of a mixture of boric oxide, silicon dioxide and at least one metal oxide selected from among barium oxide, strontium oxide, calcium oxide, magnesium oxide and zinc oxide. For the fabrication of capacitors the mixture of the above major ingredient and additives in finely divided form are formed into moldings of desired shape and size, each with at least two electrodes buried therein. The moldings and electrodes are cosintered in a reductive or neutral atmosphere at temperatures of less than 1200.degree. C. and then are reheated at a lower temperature in an oxidative atmosphere.

17. 发明授权

US07020941B2 Method for manufacturing a multilayer ceramic capacitor 有权
标题翻译：多层陶瓷电容器的制造方法
公开(公告)号：US07020941B2
公开(公告)日：2006-04-04
申请号：US10702931
申请日：2003-11-06
申请人： Hirokazu Chazono , Hisamitsu Shizuno , Hiroshi Kishi
发明人： Hirokazu Chazono , Hisamitsu Shizuno , Hiroshi Kishi
IPC分类号： H01G7/00 , H01L21/20
CPC分类号： H01G4/1209 , H01G4/1227 , Y10T29/43 , Y10T29/435 , Y10T29/49126 , Y10T29/49155 , Y10T29/49789 , Y10T29/49798
摘要： A method for manufacturing a multilayer ceramic capacitor includes the steps of forming a ceramic slurry, forming ceramic green sheets from the ceramic slurry, printing internal electrode patterns on the ceramic green sheets, generating a laminated body by stacking the ceramic green sheets provided with the internal electrode patterns printed thereon, dicing the laminated body to thereby form chip-shaped ceramic bodies and sintering the chip-shaped ceramic bodies. The ceramic slurry includes a glass component containing one or more additive elements selected from the group consisting of Mn, V, Cr, Mo, Fe, Ni, Cu and Co.
摘要翻译：一种制造多层陶瓷电容器的方法包括以下步骤：形成陶瓷浆料，从陶瓷浆料形成陶瓷生片，在陶瓷生片上印刷内部电极图案，通过堆叠设置有内部陶瓷生坯的陶瓷生片印刷在其上的电极图案，切割层压体，从而形成芯片状陶瓷体并烧结芯片状陶瓷体。陶瓷浆料包括含有一种或多种选自Mn，V，Cr，Mo，Fe，Ni，Cu和Co的添加剂组分的玻璃组分

18. 发明授权

US06721167B2 Multilayer ceramic capacitor and method for the manufacture thereof 有权
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：US06721167B2
公开(公告)日：2004-04-13
申请号：US10460829
申请日：2003-06-12
申请人： Hirokazu Chazono , Hisamitsu Shizuno , Hiroshi Kishi
发明人： Hirokazu Chazono , Hisamitsu Shizuno , Hiroshi Kishi
IPC分类号： H01G406
CPC分类号： H01G4/1209
摘要： A multilayer ceramic capacitor includes sintered laminated bodies having a plurality of dielectric layers alternately stacked with a multiplicity of internal electrodes, and a pair of external electrodes electrically coupled to the internal electrodes. The dielectric layer is of sintered ceramic grains. The ceramic grains include a core portion surrounded by a shell portion or a solid solution. The ceramic grains contain additive elements such as acceptor elements and/or rare earth elements. The additive elements are non-uniformly distributed in the core and/or shell portion of the ceramic grain or in the solid solution. Such non-uniform distribution of the additive elements in ceramic grains promotes or facilitates the re-oxidation process of the ceramic grains and also increases electrical resistance thereof. Accordingly, the operating life characteristics of the multilayer ceramic capacitors, especially those incorporating therein thin dielectric layers, can be improved.
摘要翻译：多层陶瓷电容器包括具有交替层叠有多个内部电极的多个电介质层和电连接到内部电极的一对外部电极的烧结层叠体。电介质层是烧结陶瓷晶粒。陶瓷颗粒包括由壳部分或固溶体包围的芯部分。陶瓷颗粒含有添加元素，例如受主元素和/或稀土元素。添加剂元素不均匀地分布在陶瓷颗粒的芯部和/或壳部分或固体溶液中。添加元素在陶瓷颗粒中的这种不均匀分布促进或促进了陶瓷颗粒的再氧化过程，并且还增加了其电阻。因此，可以提高多层陶瓷电容器的使用寿命特性，特别是那些结合有薄介电层的陶瓷电容器。

19. 发明授权

US07354642B2 Multilayer displacement element 有权
标题翻译：多层位移元件
公开(公告)号：US07354642B2
公开(公告)日：2008-04-08
申请号：US10891070
申请日：2004-07-15
申请人： Hisamitsu Shizuno , Hirokazu Chazono , Hiroshi Kishi
发明人： Hisamitsu Shizuno , Hirokazu Chazono , Hiroshi Kishi
IPC分类号： B23B18/00
CPC分类号： H01L41/0471 , H01L41/0477 , H01L41/083 , H01L41/1871 , H01L41/297 , Y10T29/43 , Y10T29/435 , Y10T428/252
摘要： A multilayer displacement element is formed by alternately stacking a plurality of ceramic layers and a multiplicity of internal electrodes, wherein each of the ceramic layers is composed of ceramic grains containing barium titanate as a main component and each of the internal electrodes is a metallic film with a mesh shape. The meshed shape of metallic films leads to a reduced contact area between the metallic films and the ceramic layers. Therefore, the displacement of the ceramic layers can be less restricted by the metallic films and thus the amount of displacement of the ceramic layers can be increased. The ceramic grains preferably have an average diameter equal to or larger than 3.5 μm and it is desirable that the ratio of one grain to one layer for the ceramic layer be equal to or larger than 20%.
摘要翻译：通过交替地堆叠多个陶瓷层和多个内部电极来形成多层位移元件，其中每个陶瓷层由以钛酸钡为主要成分的陶瓷颗粒组成，并且每个内部电极是具有网状。金属膜的网状形状导致金属膜和陶瓷层之间的接触面积减小。因此，陶瓷层的位移可以较少受金属膜的限制，因此陶瓷层的位移量可以增加。陶瓷颗粒优选具有等于或大于3.5μm的平均直径，并且理想的是陶瓷层的一个晶粒与一个层的比例等于或大于20％。

20. 发明授权

US06673461B2 Multilayer ceramic capacitor and method for manufacturing same 有权
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：US06673461B2
公开(公告)日：2004-01-06
申请号：US09823157
申请日：2001-03-30
申请人： Hirokazu Chazono , Hisamitsu Shizuno , Hiroshi Kishi
发明人： Hirokazu Chazono , Hisamitsu Shizuno , Hiroshi Kishi
IPC分类号： H01G408
CPC分类号： H01G4/1209 , H01G4/1227 , Y10T29/43 , Y10T29/435 , Y10T29/49126 , Y10T29/49155 , Y10T29/49789 , Y10T29/49798
摘要： A multilayer ceramic capacitor is formed by alternately stacking a plurality of dielectric layers and a multiplicity of internal electrodes, which are connected to a pair of external electrodes. Each of the dielectric layers is obtained from a dielectric ceramic compound composed of ceramic grains and a glass component connecting the ceramic grains, and the glass component contains one or more additive elements in a form of a solid solution. The additive elements are selected from the group consisting of Mn, V, Cr, Mo, Fe, Ni, Cu and Co.
摘要翻译：通过交替堆叠连接到一对外部电极的多个电介质层和多个内部电极来形成多层陶瓷电容器。每个电介质层由陶瓷颗粒和连接陶瓷颗粒的玻璃组分组成的电介质陶瓷化合物获得，玻璃组分含有一种或多种固溶体形式的添加元素。添加元素选自Mn，V，Cr，Mo，Fe，Ni，Cu和Co

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