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    • 11. 发明授权
    • Chemical vapor deposition process for fabricating layered superlattice materials
    • 用于制造层状超晶格材料的化学气相沉积工艺
    • US06706585B2
    • 2004-03-16
    • US10405309
    • 2003-04-02
    • Kiyoshi UchiyamaNarayan SolayappanCarlos A. Paz de Araujo
    • Kiyoshi UchiyamaNarayan SolayappanCarlos A. Paz de Araujo
    • H01L218242
    • C23C16/45561C23C16/0272C23C16/40C23C16/44Y10S438/935Y10S438/938
    • A first reactant gas is flowed into a CVD reaction chamber containing a heated integrated circuit substrate. The first reactant gas contains a first precursor compound or a plurality of first precursor compounds, and the first precursor compound or compounds decompose in the CVD reaction chamber to deposit a coating containing metal atoms on the heated integrated circuit substrate. The coating is treated by RTP. Thereafter, a second reactant gas is flowed into a CVD reaction chamber containing the heated substrate. The second reactant gas contains a second precursor compound or a plurality of second precursor compounds, which decompose in the CVD reaction chamber to deposit more metal atoms on the substrate. Heat for reaction and crystallization of the deposited metal atoms to form a thin film of layered superlattice material is provided by heating the substrate during CVD deposition, as well as by selected rapid thermal processing (“RTP”) and furnace annealing steps.
    • 第一反应气体流入含有加热集成电路基板的CVD反应室。 第一反应气体含有第一前体化合物或多个第一前体化合物,第一前体化合物或化合物在CVD反应室中分解,以在被加热的集成电路衬底上沉积含有金属原子的涂层。 涂层用RTP处理。 此后,将第二反应气体流入含有加热衬底的CVD反应室。 第二反应气体含有第二前体化合物或多个第二前体化合物,其在CVD反应室中分解以在基底上沉积更多的金属原子。 通过在CVD沉积期间以及通过选择的快速热处理(“RTP”)和炉退火步骤加热衬底来提供沉积的金属原子以形成层状超晶格材料的薄膜的反应和结晶的热。
    • 19. 发明授权
    • Interlayer oxide containing thin films for high dielectric constant application
    • 用于高介电常数应用的含有薄膜的层间氧化物
    • US06495878B1
    • 2002-12-17
    • US09365628
    • 1999-08-02
    • Shinichiro HayashiVikram JoshiNarayan SolayappanJoseph D. CuchiaroCarlos A. Paz de Araujo
    • Shinichiro HayashiVikram JoshiNarayan SolayappanJoseph D. CuchiaroCarlos A. Paz de Araujo
    • H01L27108
    • H01L21/02197H01L21/02205H01L21/02282H01L21/02348H01L21/31691H01L27/0629
    • A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi2O3 with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB2O6, A2B2O7 and A2Bi2B2O10, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (BaxSr1−x)(TayNb1−y)2O6, where 0≦x≦1.0 and 0≦y≦1.0; (BaxSr1−x)2(TayNb1−Y)2O7, where 0≦x≦1.0 and 0≦y≦1.0; and (BaxSr1−x)2Bi2(TayNb1−y)2O10, where 0≦x≦1.0 and 0≦y≦1.0. Thin films according to the invention have a relative dielectric constant ≧40, and preferably about 100. The value of Vcc in the metal oxides of the invention is close to zero. The value of Tcc is
    • 一种高介电常数绝缘体,包括选自钨青铜型氧化物,烧绿石型氧化物和Bi 2 O 3与选自钙钛矿和烧绿石型氧化物的氧化物的组合的金属氧化物的薄膜 。 一个实施方案包含由一般化学计量式AB2O6,A2B2O7和A2B2B2O10表示的金属氧化物,其中A表示选自由Ba,Bi,Sr,Pb,Ca,K,Na和La组成的金属组中的A位原子; B表示选自由Ti,Zr,Ta,Hf,Mo,W和Nb组成的金属组中的B位原子。 优选地,金属氧化物是(BaxSr1-x)(TayNb1-y)2O6,其中0 <= x <= 1.0且0 <= y <= 1.0; (BaxSr1-x)2(TayNb1-Y)2O7,其中0 <= x <= 1.0且0 <= y <= 1.0; 和(BaxSr1-x)2Bi2(TayNb1-y)2O10,其中0 <= x <= 1.0且0 <= y <= 1.0。 根据本发明的薄膜的相对介电常数> 40,优选约100。本发明的金属氧化物中的Vcc值接近零。 Tcc的值<1000ppm,优选<100。
    • 20. 发明授权
    • Ferroelectric device with bismuth tantalate capping layer and method of making same
    • 具有钽酸铋盖层的铁电元件及其制造方法
    • US06437380B1
    • 2002-08-20
    • US09819542
    • 2001-03-28
    • Myoungho LimVikram JoshiNarayan SolayappanLarry D. McMillanCarlos A. Paz de Araujo
    • Myoungho LimVikram JoshiNarayan SolayappanLarry D. McMillanCarlos A. Paz de Araujo
    • H01L2976
    • H01L29/516H01L28/56
    • An integrated circuit device includes a thin film of bismuth-containing layered superlattice material having a thickness not exceeding 100 nm, a capping layer thin film of bismuth tantalate, and an electrode. The capping layer has a thickness in a range of from 3 nm to 30 nm and is deposited between the thin film of layered superlattice material and the electrode to increase dielectric breakdown voltage. Preferably the capping layer contains an excess amount of bismuth relative to the stoichiometrically balanced amount represented by the balanced stoichiometric formula BiTaO4. Preferably, the layered superlattice material is ferroelectric SBT or SBTN. Preferably, the integrated circuit device is a nonvolatile ferroelectric memory. Heating treatments for fabrication of the integrated circuit device containing the bismuth tantalate capping layerare conducted at temperatures not exceeding 700° C., preferably in a range of from 650° C. to 700° C.
    • 集成电路器件包括厚度不超过100nm的含铋层状超晶格材料薄膜,钽酸铋覆盖层薄膜和电极。 覆盖层的厚度在3nm至30nm的范围内,并且沉积在层状超晶格材料的薄膜和电极之间以增加介电击穿电压。 优选地,封盖层相对于由平衡化学计量式BiTaO 4表示的化学计量平衡量含有过量的铋。 优选地,层状超晶格材料是铁电SBT或SBTN。 优选地,集成电路器件是非易失性铁电存储器。 用于制造包含钽酸铋覆盖层的集成电路器件的加热处理在不超过700℃的温度下进行,优选在650℃至700℃的范围内。