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11. 发明申请

US20080199813A1 Method for forming a photoresist pattern on a semiconductor wafer using oxidation-based catalysis 有权
标题翻译：使用氧化型催化在半导体晶片上形成光致抗蚀剂图案的方法
公开(公告)号：US20080199813A1
公开(公告)日：2008-08-21
申请号：US11709721
申请日：2007-02-21
申请人： Thomas Wallow , Uzodinma Okoroanyanwu
发明人： Thomas Wallow , Uzodinma Okoroanyanwu
IPC分类号： G03C5/00
CPC分类号： G03F7/32
摘要： According to one exemplary embodiment, a method for forming a photoresist pattern on a semiconductor wafer includes forming a photoresist including an organic polymer matrix on the semiconductor wafer. The method further includes exposing the photoresist to a patterned radiation. The method further includes baking the photoresist after exposing the photoresist to the pattern radiation. The method further includes applying an oxidizing reagent to the photoresist to create the photoresist pattern corresponding to the patterned radiation.
摘要翻译：根据一个示例性实施例，在半导体晶片上形成光致抗蚀剂图案的方法包括在半导体晶片上形成包含有机聚合物基质的光致抗蚀剂。该方法还包括将光致抗蚀剂暴露于图案化的辐射。该方法还包括在将光致抗蚀剂暴露于图案辐射之后烘烤光致抗蚀剂。该方法还包括将氧化剂施加到光致抗蚀剂以产生对应于图案化辐射的光致抗蚀剂图案。

12. 发明申请

US20060066824A1 Method and system for contamination detection and monitoring a lithographic exposure tool and operating method for the same under controlled atmospheric conditions 审中-公开
标题翻译：污染检测和监测光刻曝光工具的方法和系统及其在受控大气条件下的操作方法
公开(公告)号：US20060066824A1
公开(公告)日：2006-03-30
申请号：US11135721
申请日：2005-05-24
申请人： Uwe Knappe , Uzodinma Okoroanyanwu
发明人： Uwe Knappe , Uzodinma Okoroanyanwu
IPC分类号： G03B27/52
CPC分类号： G03F7/70916 , G03F7/70925
摘要： By using highly efficient detection techniques, such as chromatography and absorption spectroscopy, one or more contaminants may be identified and the concentration thereof may quantitatively be determined. In this way, the adverse effect on critical components of exposure tools, such as reticles and lenses in the form of, for instance, deposited inorganic salts, may significantly be reduced and the process performance may be enhanced.
摘要翻译：通过使用诸如色谱和吸收光谱的高效检测技术，可以鉴定一种或多种污染物并定量确定其浓度。以这种方式，可以显着地减少曝光工具的关键部件的不利影响，例如掩模版和例如沉积的无机盐形式的透镜，并且可以提高工艺性能。

13. 发明授权

US06870183B2 Stacked organic memory devices and methods of operating and fabricating 有权
标题翻译：堆叠有机存储器件及其操作和制造方法
公开(公告)号：US06870183B2
公开(公告)日：2005-03-22
申请号：US10287612
申请日：2002-11-04
申请人： Nicholas H. Tripsas , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Michael A. VanBuskirk
发明人： Nicholas H. Tripsas , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Michael A. VanBuskirk
IPC分类号： G11C11/56 , G11C13/02 , H01L27/28 , H01L51/00 , H01L51/30 , H01L51/20 , H01L51/40
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , H01L27/28 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0041 , H01L51/0077 , H01L51/0078
摘要： The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
摘要翻译：本发明提供一种多层有机存储器件，其可以作为其中构造有多个堆叠和/或并行存储器结构的非易失性存储器件来操作。可以在两个或多个电极之间形成多单元和多层有机存储器组件，所述两个或更多个电极在形成各个单元的电极之间具有选择性导电介质，同时利用分隔组件使得能够堆叠额外的存储器单元，以前形成的细胞。可以通过添加额外的层 - 通过附加分隔部件分开的相应层来形成存储器堆叠，其中可以并行形成多个堆叠以提供高密度存储器件。

14. 发明授权

US06852586B1 Self assembly of conducting polymer for formation of polymer memory cell 有权
标题翻译：用于形成聚合物记忆体的导电聚合物的自组装
公开(公告)号：US06852586B1
公开(公告)日：2005-02-08
申请号：US10677042
申请日：2003-10-01
申请人： Matthew S. Buynoski , Suzette K. Pangrle , Uzodinma Okoroanyanwu , Nicholas H. Tripsas
发明人： Matthew S. Buynoski , Suzette K. Pangrle , Uzodinma Okoroanyanwu , Nicholas H. Tripsas
IPC分类号： G11C13/02 , H01L27/28 , H01L51/40 , H01L21/8234
CPC分类号： G11C13/0069 , B82Y10/00 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C2013/009 , G11C2213/56 , G11C2213/71 , H01L27/28 , H01L51/0012
摘要： The present invention provides a selectively conductive organic semiconductor (e.g., polymer) device that can be utilized as a memory cell. A polymer solution including a conducting polymer self assembles relative to a conductive electrode. The process affords self-assembly such that a shortest conductive path can be achieved. The method includes depositing a concentrated solution of conducting polymer on a conductive surface, applying heat and optionally a vacuum, and permitting the conducting polymer to self-assemble into an organic semiconductor. The organic semiconductor can be employed within single and multi-cell memory devices by forming a structure with two or more electrodes while employing the organic semiconductor along with a passive device between the electrodes. A partitioning component can be integrated with the memory device to facilitate programming and stacking of additional memory cells on top of or in association with previously formed cells.
摘要翻译：本发明提供可用作存储单元的选择性导电的有机半导体（例如，聚合物）器件。包括导电聚合物的聚合物溶液相对于导电电极自组装。该过程提供自组装，使得可以实现最短的导电路径。该方法包括将导电聚合物的浓缩溶液沉积在导电表面上，施加热量和任选的真空，并允许导电聚合物自组装成有机半导体。有机半导体可以在单电池和多电池存储器件中使用，通过形成具有两个或多个电极的结构，同时在电极之间使用有机半导体以及无源器件。分区组件可以与存储器件集成，以便于在先前形成的单元之上或与之前相关联的附加存储器单元的编程和堆叠。

15. 发明授权

US06803178B1 Two mask photoresist exposure pattern for dense and isolated regions 有权
标题翻译：两个掩模光刻胶曝光图案，用于密集和隔离的区域
公开(公告)号：US06803178B1
公开(公告)日：2004-10-12
申请号：US09887035
申请日：2001-06-25
申请人： Ramkumar Subramanian , Scott A. Bell , Todd P. Lukanc , Marina V. Plat , Uzodinma Okoroanyanwu , Hung-Eli Kim
发明人： Ramkumar Subramanian , Scott A. Bell , Todd P. Lukanc , Marina V. Plat , Uzodinma Okoroanyanwu , Hung-Eli Kim
IPC分类号： G03F700
CPC分类号： G03F1/00 , H01L21/76816
摘要： There is provided a method of making plurality of features in a first layer. A photoresist layer is formed over the first layer. Dense regions in the photoresist layer are exposed through a first mask under a first set of illumination conditions. Isolated regions in the photoresist layer are exposed through a second mask different from the first mask under a second set of illumination conditions different from the first set of illumination conditions. The exposed photoresist layer is patterned and then the first layer is patterned using the patterned photoresist layer as a mask.
摘要翻译：提供了在第一层中制作多个特征的方法。在第一层上形成光致抗蚀剂层。光致抗蚀剂层中的密集区域在第一组照射条件下通过第一掩模曝光。在与第一组照明条件不同的第二组照明条件下，光致抗蚀剂层中的隔离区域通过不同于第一掩模的第二掩模曝光。曝光的光致抗蚀剂层被图案化，然后使用图案化的光致抗蚀剂层作为掩模来对第一层进行图案化。

16. 发明授权

US08044387B1 Semiconductor device built on plastic substrate 有权
标题翻译：半导体器件内置塑料基板
公开(公告)号：US08044387B1
公开(公告)日：2011-10-25
申请号：US10885959
申请日：2004-07-07
申请人： Matthew S. Buynoski , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Nicholas H. Tripsas
发明人： Matthew S. Buynoski , Uzodinma Okoroanyanwu , Suzette K. Pangrle , Nicholas H. Tripsas
IPC分类号： H01L35/24
CPC分类号： H01L51/0591 , G11C13/0016 , G11C2213/71 , H01L27/285 , H01L51/0097
摘要： Disclosed are semiconductor memory devices containing a plastic substrate and at least one active device supported by the plastic substrate, the active device containing an organic semiconductor material. The semiconductor memory devices containing a plastic substrate may further contain a polymer dielectric and/or a conductive polymer.
摘要翻译：公开了包含塑料基板和由塑料基板支撑的至少一个有源器件的半导体存储器件，该有源器件含有有机半导体材料。包含塑料基板的半导体存储器件还可以包含聚合物电介质和/或导电聚合物。

17. 发明授权

US07767985B2 EUV pellicle and method for fabricating semiconductor dies using same 有权
标题翻译： EUV防护薄膜和使用其制造半导体管芯的方法
公开(公告)号：US07767985B2
公开(公告)日：2010-08-03
申请号：US11646053
申请日：2006-12-26
申请人： Uzodinma Okoroanyanwu , Ryoung-Han Kim
发明人： Uzodinma Okoroanyanwu , Ryoung-Han Kim
IPC分类号： G03F1/00
CPC分类号： G03F1/62 , B82Y10/00 , B82Y40/00 , G03F1/24 , G03F7/70983 , Y10T428/24802
摘要： According to one exemplary embodiment, an extreme ultraviolet (EUV) pellicle for use with a lithographic mask comprises a carbon nanotube film. The carbon nanotube EUV pellicle can be mounted on the lithographic mask. The carbon nanotube EUV pellicle protects the lithographic mask from contamination by undesirable particles and also prevents the undesirable particles from forming a focused image on the surface of a semiconductor wafer during fabrication; while advantageously, the carbon nanotube pellicle has a high level of EUV light transmittance.
摘要翻译：根据一个示例性实施例，用于光刻掩模的极紫外（EUV）防护薄膜包括碳纳米管膜。碳纳米管EUV防护薄膜可安装在光刻掩模上。碳纳米管EUV防护薄膜保护光刻掩模免受不期望的颗粒的污染，并且还防止不期望的颗粒在制造期间在半导体晶片的表面上形成聚焦图像; 同时有利地，碳纳米管薄膜具有高水平的EUV透光率。

18. 发明申请

US20080292996A1 Method for producing a high resolution resist pattern on a semiconductor wafer 有权
标题翻译：在半导体晶片上制造高分辨率抗蚀剂图案的方法
公开(公告)号：US20080292996A1
公开(公告)日：2008-11-27
申请号：US11805139
申请日：2007-05-21
申请人： Uzodinma Okoroanyanwu , Thomas Wallow
发明人： Uzodinma Okoroanyanwu , Thomas Wallow
IPC分类号： G03C5/00
CPC分类号： G03F7/16 , G03F7/11
摘要： In one disclosed embodiment, a method for producing a high resolution resist pattern on a semiconductor wafer comprises depositing a blanket layer of material on a semiconductor wafer, forming a resist interaction substrate on the blanket layer of material, forming a resist layer of a pre-determined thickness on the resist interaction substrate, exposing the resist layer to a patterned radiation, and developing the resulting high resolution resist pattern. In one embodiment, patterned radiation is provided by an extreme ultraviolet (EUV) light source. In other embodiments, patterned radiation may be provided by an electron beam, or ion beam, for example. In one embodiment, the resist layer comprises a chemically amplified resist utilizing a photogenerated acid (PGA), and having a sublayer. In other embodiments, the resist layer includes an additive, for example, fullerite. One disclosed embodiment involves use of an ultra-thin resist layer in combination with a gold resist interaction substrate.
摘要翻译：在一个公开的实施例中，在半导体晶片上制造高分辨率抗蚀剂图案的方法包括在半导体晶片上沉积材料的覆盖层，在材料的覆盖层上形成抗蚀剂相互作用衬底，在抗蚀剂相互作用衬底上确定厚度，将抗蚀剂层暴露于图案化辐射，以及显影所得到的高分辨率抗蚀剂图案。在一个实施例中，图案化的辐射由极紫外（EUV）光源提供。在其它实施例中，例如可以通过电子束或离子束来提供图案化辐射。在一个实施方案中，抗蚀剂层包含利用光生酸（PGA）并具有亚层的化学放大抗蚀剂。在其它实施方案中，抗蚀剂层包括添加剂，例如，高纯度的。一个公开的实施例涉及使用与金抗蚀剂相互作用衬底组合的超薄抗蚀剂层。

19. 发明授权

US06977389B2 Planar polymer memory device 有权
标题翻译：平面聚合物记忆装置
公开(公告)号：US06977389B2
公开(公告)日：2005-12-20
申请号：US10452877
申请日：2003-06-02
申请人： Nicholas H. Tripsas , Matthew S. Buynoski , Uzodinma Okoroanyanwu , Suzette K. Pangrle
发明人： Nicholas H. Tripsas , Matthew S. Buynoski , Uzodinma Okoroanyanwu , Suzette K. Pangrle
IPC分类号： G11C11/56 , G11C13/02 , H01L27/115 , H01L27/24 , H01L27/28 , H01L35/24
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C13/0016 , H01L27/28 , H01L51/0575
摘要： The present invention provides a planar polymer memory device that can operate as a non-volatile memory device. A planar polymer memory device can be formed with two or more electrodes and an electrode extension associated with one electrode, wherein a selectively conductive medium and dielectric separate the electrodes. The method for forming a planar polymer memory device comprises at least one of forming a first electrode with an associated plug, forming a second electrode, forming a passive layer over the extension, depositing an organic polymer and patterning the organic polymer. The method affords integration of a planar polymer memory device into a semiconductor fabrication process. A thin film diode (TFD) can further be employed with a planar polymer memory device to facilitate programming. The TFD can be formed between the first electrode and the selectively conductive medium or the second electrode and the selectively conductive medium.
摘要翻译：本发明提供一种能够作为非易失性存储器件操作的平面聚合物存储器件。平面聚合物存储器件可以形成有两个或更多个电极和与一个电极相关联的电极延伸，其中选择性导电的介质和电介质分离电极。用于形成平面聚合物记忆装置的方法包括以下步骤中的至少一种：形成具有相关塞子的第一电极，形成第二电极，在延伸部分上形成钝化层，沉积有机聚合物和图案化有机聚合物。该方法将平面聚合物存储器件集成到半导体制造工艺中。还可以使用薄膜二极管（TFD）与平面聚合物存储器件来促进编程。可以在第一电极和选择性导电介质或第二电极和选择性导电介质之间形成TFD。

20. 发明授权

US06893895B1 CuS formation by anodic sulfide passivation of copper surface 有权
标题翻译：通过铜表面的阳极硫化物钝化形成CuS
公开(公告)号：US06893895B1
公开(公告)日：2005-05-17
申请号：US10885944
申请日：2004-07-07
申请人： Uzodinma Okoroanyanwu , Sergey D. Lopatin , Matthew S. Buynoski
发明人： Uzodinma Okoroanyanwu , Sergey D. Lopatin , Matthew S. Buynoski
IPC分类号： C25D9/06 , C25D11/34 , H01L51/40
CPC分类号： C25D9/06 , C25D11/34
摘要： Disclosed are methods of making memory cells and semiconductor devices containing the memory cells. The methods involve passivating a portion of a copper containing electrode to form a copper sulfide layer in an electrochemical cell by applying a current through a passivation solution containing a sulfide compound. Such devices containing the memory cells are characterized by light weight and robust reliability.
摘要翻译：公开了制造存储单元和包含存储单元的半导体器件的方法。所述方法包括通过施加电流通过含有硫化物化合物的钝化溶液来钝化一部分含铜电极以在电化学电池中形成硫化铜层。包含存储器单元的这种器件的特征在于重量轻和鲁棒的可靠性。

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