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11. 发明授权

US5371770A Pulse generating circuit for microcomputers 失效
标题翻译：微电脑脉冲发生电路
公开(公告)号：US5371770A
公开(公告)日：1994-12-06
申请号：US57847
申请日：1993-05-07
申请人： Hajime Sakuma
发明人： Hajime Sakuma
IPC分类号： G06F1/04 , G06F1/06 , G06F1/14 , H03K21/02 , H03K21/08
CPC分类号： G06F1/14
摘要： The invention provides a pulse generating circuit including a single timer or counter which conducts both a event base count and a subsequent time base count according to clock signals about the event and time base counts, any one of which is selected by a selector. A pulse signal is generated from a RS flip-flop circuit. When the time base count follows the event base count, during the event base count, the output signal from the flip-flop is a 0 signal. During the time base count, the output signal from the flip-flop is a 1 signal. The event base count defines a delay of a pulse generated from RS flip-flop circuit and the time base count defines a width of the pulse.
摘要翻译：本发明提供了一种包括单个定时器或计数器的脉冲发生电路，该定时器或计数器根据关于事件和时基计数的时钟信号同时进行事件基本计数和后续时基计数，其中任何一个由选择器选择。从RS触发器电路产生脉冲信号。当时基计数跟随事件基数时，在事件基准计数期间，触发器的输出信号为0信号。在时基计数期间，来自触发器的输出信号为1信号。事件基数定义了从RS触发器电路产生的脉冲的延迟，并且时基计数定义了脉冲的宽度。

12. 发明授权

US5148542A Multitask processing apparatus utilizing a central processing unit equipped with a micro-program memory which contains no software instructions 失效
标题翻译：使用包含无软件说明的微程序存储器的中央处理单元的多工器处理设备
公开(公告)号：US5148542A
公开(公告)日：1992-09-15
申请号：US517402
申请日：1990-05-01
申请人： Hajime Sakuma , Hiroko Shinohara
发明人： Hajime Sakuma , Hiroko Shinohara
IPC分类号： G06F9/48
CPC分类号： G06F9/4881
摘要： An apparatus for processing a plurality of tasks comprises a central processing unit (CPU) equipped with a microprogram memory, and a memory. A processing demand to the real time OS required for the execution of the multitask processing is treated as exclusive instruction. For this purpose, the system includes a decoder for decoding the exclusive instruction, and the CPU or the memory has a microprogram for the realization of the instruction.
摘要翻译：用于处理多个任务的装置包括配备有微程序存储器和存储器的中央处理单元（CPU）。对执行多任务处理所需的实时OS的处理要求被视为独占指令。为此，该系统包括用于解码专用指令的解码器，并且CPU或存储器具有用于实现该指令的微程序。

13. 发明授权

US4939925A Method of performing measurement of hematocrit value and separate sampling of blood component 失效
标题翻译：执行血细胞比容值测量和血液成分分离取样的方法
公开(公告)号：US4939925A
公开(公告)日：1990-07-10
申请号：US323568
申请日：1989-03-13
申请人： Hajime Sakuma , Toshiyuki Sasaki , Katsumi Komatsu
发明人： Hajime Sakuma , Toshiyuki Sasaki , Katsumi Komatsu
IPC分类号： G01N33/483 , G01N33/49 , G01N35/10
CPC分类号： G01N33/491 , G01N35/1011 , G01N2035/1025
摘要： A method of performing measurement of a hematocrit value and separate sampling of plasma and blood cells, simultaneously. A probe including a pair of detection electrodes each in the form of a suction nozzle, is lowered from a certain initial height into a sample vessel containing blood that has bveen separated into an upper plasma layer and a lower blood cell layer, while the probe travel distance is monitored. When the detection electrodes touch the surface of the plasma layer, the plasma is sampled into a corresponding sampling vessel through one of the electrode suction nozzles. The probe is then lowered further until the electrodes touch the surface of the blood cell layer, and the blood cells are sampled into a different sampling vessel through the other one of the suction nozzles. A total sample blood volume and the volume of the blood cells are calculated in accordance with the measured travel of the probe between the upper and lower layers, and a hematocrit value is determined from the calculated volumes.
摘要翻译：同时执行血细胞比容值的测量和血浆和血细胞的分离取样的方法。将包括吸嘴形式的一对检测电极的探针从一定的初始高度降低到含有分为上等血浆层和下血细胞层的血液的样品容器中，同时探头行程距离被监控。当检测电极接触等离子体层的表面时，通过电极吸嘴之一将等离子体采样到相应的取样容器中。然后将探针进一步降低直到电极接触血细胞层的表面，并且通过另一个吸嘴将血细胞采样到不同的取样容器中。根据所测量的上层和下层之间的测量行程来计算总样本血液体积和血细胞的体积，并根据计算的体积确定血细胞比容值。

14. 发明授权

US5872961A Microcomputer allowing external monitoring of internal resources 失效
标题翻译：微机允许外部监控内部资源
公开(公告)号：US5872961A
公开(公告)日：1999-02-16
申请号：US478670
申请日：1995-06-07
申请人： Hajime Sakuma
发明人： Hajime Sakuma
IPC分类号： G06F9/48 , G06F9/46 , G06F11/22 , G06F11/28 , G06F11/34 , G06F11/36 , G06F15/78
CPC分类号： G06F11/3656
摘要： A microcomputer having a function for monitoring internal resources closed within the microcomputer without preventing an execution of the microcomputer. An address of a register within the microcomputer is determined in advance from the outside of the microcomputer, and at a coincident timing with the register address outputted onto an internal register address bus, data on an internal data bus are taken in and are outputted to the outside of the microcomputer via a serial interface. The information of the internal resources closed within the microcomputer can be obtained without stopping the execution of the microcomputer to enable avoiding of a runaway or trouble of a machine to be controlled by the microcomputer and to enable developing at a real time similar to an execution time.
摘要翻译：微型计算机具有监视在微型计算机内封闭的内部资源的功能，而不阻止微型计算机的执行。微型计算机内的寄存器的地址是从微型计算机的外部预先确定的，并且与输出到内部寄存器地址总线的寄存器地址一致的定时，内部数据总线上的数据被输入并输出到通过串行接口在微机之外。可以在不停止执行微型计算机的情况下获得关闭的内部资源的信息，从而能够避免由微型计算机控制的机器的失控或故障，并且能够实时地类似于执行时间进行开发。

15. 发明授权

US5687380A Macro service processing of interrupt requests in a processing system where a single interrupt is generated for a plurality of completed transactions 失效
标题翻译：在为多个完成的事务生成单个中断的处理系统中的中断请求的宏服务处理
公开(公告)号：US5687380A
公开(公告)日：1997-11-11
申请号：US530948
申请日：1995-09-20
申请人： Hajime Sakuma
发明人： Hajime Sakuma
IPC分类号： G06F9/46 , G06F13/24 , G06F13/00
CPC分类号： G06F13/24
摘要： A data processing system is provided which includes a central processing unit connected to a memory and a plurality of peripheral units. When a single peripheral request is issued from one of the plurality of peripheral units for a processing which includes a process to be executed a plurality of times, an interrupt control section which holds mode information indicating whether the currently set mode is a Macro Service processing mode, outputs the mode information in response to the peripheral request issued from the peripheral unit. An execution section which is contained in the central processing unit executes the processing while determining whether the process is completed for a predetermined number of cycles in a state suspending at least a program counter and program status word without saving them in the stack, when the mode information indicates the Macro Service processing mode.
摘要翻译：提供了一种数据处理系统，其包括连接到存储器和多个外围单元的中央处理单元。当从多个外围单元中的一个外围单元发出包含多次执行的处理的处理的单个外围请求时，存储指示当前设置的模式是宏服务处理模式的模式信息的中断控制部分响应于从外围单元发出的周边请求而输出模式信息。包含在中央处理单元中的执行部执行处理，同时在暂停至少程序计数器和程序状态字的状态下确定处理是否完成了预定数量的循环，而不将其保存在堆栈中，当模式信息表示宏服务处理模式。

16. 发明授权

US5491825A Microprocessor having a functionally multiplexed input and output terminal 失效
标题翻译：微处理器具有功能多路复用的输入和输出端子
公开(公告)号：US5491825A
公开(公告)日：1996-02-13
申请号：US56184
申请日：1993-05-03
申请人： Hajime Sakuma
发明人： Hajime Sakuma
IPC分类号： G06F13/12 , G06F13/38 , G06F15/78 , G06F12/00 , G11C8/00
CPC分类号： G06F13/385
摘要： A semiconductor integrated circuit is provided with a terminal functioning as a port terminal and a pulse circuit terminal, a port mode control register for storing data designating whether the terminal should function as the port terminal or the pulse circuit terminal, a port register for holding data to be externally output, a pulse circuit for outputting a pulse signal, a selector for supplying one of the outputs from the port register and the pulse circuit in response to the value held in the port mode control register, and a switching circuit coupled to the selector and set by a signal for writing data in the port register, for causing the selector to select the output from the port register regardless of the output from the port mode control register. When a voltage of the terminal is fixed to a predetermined voltage independent of a level of the output signal from the pulse circuit, predetermined data is written in the port register, and the switching circuit causes the selector to select the output from the port register.
摘要翻译：半导体集成电路设置有用作端口端子和脉冲电路端子的端子，用于存储指定端子是否用作端口端子或脉冲电路端子的端口模式控制寄存器，用于保持数据的端口寄存器外部输出，用于输出脉冲信号的脉冲电路，响应于端口模式控制寄存器中保持的值，从端口寄存器和脉冲电路提供输出中的一个的选择器，以及耦合到选择器并由用于在端口寄存器中写入数据的信号设置，以使选择器从端口寄存器中选择输出，而不管端口模式控制寄存器的输出如何。当端子的电压固定为与脉冲电路的输出信号的电平无关的预定电压时，将预定数据写入端口寄存器，并且切换电路使选择器选择端口寄存器的输出。

17. 发明授权

US5467461A Multiprocessor computer system having bus control circuitry for transferring data between microcomputers 失效
标题翻译：具有用于在微型计算机之间传送数据的总线控制电路的多处理器计算机系统
公开(公告)号：US5467461A
公开(公告)日：1995-11-14
申请号：US910780
申请日：1992-07-08
申请人： Masaki Nasu , Hajime Sakuma
发明人： Masaki Nasu , Hajime Sakuma
IPC分类号： G06F12/02 , G06F12/06 , G06F15/17 , G06F15/78 , G06F13/00 , G06F13/42
CPC分类号： G06F15/17 , G06F12/0284 , G06F12/0692
摘要： A multiprocessor system includes first and second microcomputers, a address decoding mechanism, and a ready signalling device. The address decoder is coupled to an address bus, to decode address information transferred by the second microcomputer, and supplies a request signal to a request signal input terminal of the first microcomputer. A bus control unit of the first microcomputer responds to the request signal to detect whether an internal bus of the first microcomputer is free from being used by the CPU, and outputs an acknowledge signal to an acknowledge signal output terminal when the internal bus is free. The ready signaling device is coupled to the acknowledge signal output terminal to supply the ready signal to a ready signal input terminal of the second microcomputer in response to the acknowledge signal outputted at the acknowledge signal output terminal and the request signal. The bus control unit of the first microcomputer further responds to a strobe signal transferred to a strobe signal input terminal through a strobe signal line from the second microcomputer to access an address of the internal memory by using the address information transferred to a set of first address terminals through the address bus and performs a data read/write operation on the address of the internal memory through the internal bus.
摘要翻译：多处理器系统包括第一和第二微型计算机，地址解码机制和就绪信号装置。地址解码器耦合到地址总线，以解码由第二微型计算机传送的地址信息，并将请求信号提供给第一微型计算机的请求信号输入端。第一微型计算机的总线控制单元响应于请求信号，以检测第一微型计算机的内部总线是否不被CPU使用，并且当内部总线空闲时将确认信号输出到确认信号输出端子。就绪信号装置耦合到确认信号输出端，以响应于在应答信号输出端输出的应答信号和请求信号，将就绪信号提供给第二微机的就绪信号输入端。第一微型计算机的总线控制单元还通过来自第二微型计算机的选通信号线响应被传送到选通信号输入端的选通信号，通过使用传送到一组第一地址的地址信息来访问内部存储器的地址终端通过地址总线，通过内部总线对内部存储器的地址执行数据读/写操作。

18. 发明授权

US5045286A Device for aspirating a fixed quantity of liquid 失效
标题翻译：用于吸取固定数量液体的装置
公开(公告)号：US5045286A
公开(公告)日：1991-09-03
申请号：US311463
申请日：1989-02-15
申请人： Masaichi Kitajima , Takayuki Aihara , Hajime Sakuma
发明人： Masaichi Kitajima , Takayuki Aihara , Hajime Sakuma
IPC分类号： G01F23/24 , G01N1/00 , G01N35/10
CPC分类号： G01N35/1016 , B01L3/0275 , G01F23/245 , G01N35/1011 , B01L2300/0645 , G01N2035/1025 , G01N2035/103 , G01N35/1083 , Y10T436/119163
摘要： A device for injecting a fixed quantity of sample liquid is provided with a unit for aspirating and injecting sample liquid. The sample aspirating and injection unit has a nozzle connecting portion. The liquid injection device is provided with an injection nozzle attached to and detachable from the nozzle connecting portion of the sample aspirating and injecting unit and electrodes are attached to the injection nozzle. Conductive members which are electrically connected to the electrodes of the injection nozzle are attached to the nozzle connecting portion of the sample aspirating and injecting unit, and a detecting unit which cooperates with the electrodes to detect the surface level of sample liquid is connected to the conductive members.
摘要翻译：用于注射固定量的样品液体的装置设置有用于吸取和注入样品液体的单元。样品抽吸和注射单元具有喷嘴连接部分。液体注射装置设置有附接到样品抽吸和注射单元的喷嘴连接部分并可拆卸的注射喷嘴，并且电极附接到注射喷嘴。与喷射喷嘴的电极电连接的导电构件安装在试样抽吸和注入单元的喷嘴连接部分上，与电极配合以检测样品液体的表面水平的检测单元连接到导电会员

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