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11. 发明授权

US07948772B2 Memory card with electrostatic discharge protection and manufacturing method thereof 有权
标题翻译：具有静电放电保护的存储卡及其制造方法
公开(公告)号：US07948772B2
公开(公告)日：2011-05-24
申请号：US12371794
申请日：2009-02-16
申请人： Yueh-Ming Tung , Kuo-Yang Sun , Chia-Ming Yang , Chung-Lun Lee , Jin-Chun Wen , Yuan-Wei Liu , Wei-Mao Hung
发明人： Yueh-Ming Tung , Kuo-Yang Sun , Chia-Ming Yang , Chung-Lun Lee , Jin-Chun Wen , Yuan-Wei Liu , Wei-Mao Hung
IPC分类号： H05K9/00
CPC分类号： H05K1/0259 , H05K2201/09336 , H05K2201/09354 , H05K2201/10159 , Y10T29/4913
摘要： A memory card with electrostatic discharge (ESD) protection and a manufacturing method thereof are provided. The memory card includes a circuit board, a set of contacts, at least one chip and an ESD protection path. The signal paths of the board is not exposed at the edge of the circuit board. The ESD protection path for transmitting ESD current is disposed on the circuit board. Furthermore, a part of the ESD protection path extends to the edge of the circuit board.
摘要翻译：提供一种具有静电放电（ESD）保护的存储卡及其制造方法。存储卡包括电路板，一组触点，至少一个芯片和ESD保护路径。板的信号路径不暴露在电路板的边缘。用于传输ESD电流的ESD保护路径设置在电路板上。此外，ESD保护路径的一部分延伸到电路板的边缘。

12. 发明申请

US20090253230A1 METHOD FOR MANUFACTURING STACK CHIP PACKAGE STRUCTURE 审中-公开
标题翻译：堆叠芯片包装结构的制造方法
公开(公告)号：US20090253230A1
公开(公告)日：2009-10-08
申请号：US12486256
申请日：2009-06-17
申请人： Yueh-Ming TUNG , Chia-Ming Yang , Shu-Hui Lin , Ta-Fa Lin , Mien-Fang Sung
发明人： Yueh-Ming TUNG , Chia-Ming Yang , Shu-Hui Lin , Ta-Fa Lin , Mien-Fang Sung
IPC分类号： H01L21/50
CPC分类号： H01L25/0657 , H01L23/3121 , H01L23/49833 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/13109 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/16 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/4911 , H01L2224/49175 , H01L2225/0651 , H01L2225/06527 , H01L2225/06562 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19107 , H01L2924/30105 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A method for manufacturing a stack chip package structure is disclosed. The method comprises: providing a first substrate; disposing a first chip on the first substrate; disposing a second chip and at least one second substrate on the first chip, wherein the second substrate is electrically connected to the first chip; bonding at least one first connecting wire connected between the second chip and the second substrate; bonding at least one second connecting wire connected between the first substrate and the second substrate; and forming a package body on the first substrate to encapsulate the first chip, the second chip, the second substrate, the first connecting wire and the second connecting wire.
摘要翻译：公开了一种制造堆叠芯片封装结构的方法。该方法包括：提供第一衬底; 在第一基板上设置第一芯片; 在第一芯片上设置第二芯片和至少一个第二基板，其中第二基板电连接到第一芯片; 接合连接在第二芯片和第二基板之间的至少一个第一连接线; 接合连接在第一基板和第二基板之间的至少一个第二连接线; 以及在所述第一基板上形成封装体以封装所述第一芯片，所述第二芯片，所述第二基板，所述第一连接线和所述第二连接线。

13. 发明申请

US20070032180A1 Slurry residence time enhancement system 审中-公开
标题翻译：泥浆停留时间增强系统
公开(公告)号：US20070032180A1
公开(公告)日：2007-02-08
申请号：US11199607
申请日：2005-08-08
申请人： Chien Hwang , Yu-Liang Lin , Chia-Ming Yang , Cheng Chan , Jean Wang , Chen-Hua Yu
发明人： Chien Hwang , Yu-Liang Lin , Chia-Ming Yang , Cheng Chan , Jean Wang , Chen-Hua Yu
IPC分类号： B24B29/00
CPC分类号： B24B57/02 , B24B37/04
摘要： A slurry residence time enhancement system for a chemical mechanical polishing apparatus having a base, a platen on the base, a polishing pad on the platen and a polishing head over the polishing pad is disclosed. The system includes at least one slurry distribution unit having a slurry distribution member for positioning on the polishing pad. In operation of the CMP apparatus, the slurry distribution member redirects polishing slurry on the polishing pad to the polishing head. The system may alternatively or additionally include a rim for upward extension from the base and a seal for insertion between the platen and the polishing pad adjacent to the rim.
摘要翻译：公开了一种用于化学机械抛光设备的浆料停留时间增强系统，其具有底座，底座上的压板，压板上的抛光垫和抛光垫上的抛光头。该系统包括至少一个浆料分配单元，其具有用于定位在抛光垫上的浆料分配构件。在CMP装置的操作中，浆料分配构件将抛光垫上的抛光浆料重新定向到抛光头。系统可以可选地或另外地包括用于从基座向上延伸的边缘和用于插入在压板和与边缘相邻的抛光垫之间的密封件。

14. 发明申请

US20060001134A1 PACKAGE STRUCTURE 有权
标题翻译：包装结构
公开(公告)号：US20060001134A1
公开(公告)日：2006-01-05
申请号：US10711794
申请日：2004-10-06
申请人： Kuo-Yang Sun , Chia-Ming Yang
发明人： Kuo-Yang Sun , Chia-Ming Yang
IPC分类号： H01L23/48
CPC分类号： H01L24/16 , H01L23/3107 , H01L23/49517 , H01L23/49548 , H01L24/48 , H01L2224/13099 , H01L2224/16245 , H01L2224/48247 , H01L2924/00011 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2224/0401 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A package structure includes a lead frame having a plurality of leads, each of which includes a first recession, at least a first device, and a plurality of solder joints respectively positioned in the first recessions for connecting the first device to the lead frame.
摘要翻译：封装结构包括具有多个引线的引线框架，每个引线包括第一凹陷，至少第一器件和分别位于第一凹部中的多个焊点，用于将第一器件连接到引线框架。

15. 发明申请

US20050270212A1 High-Speed Video Signal Processing System 有权
标题翻译：高速视频信号处理系统
公开(公告)号：US20050270212A1
公开(公告)日：2005-12-08
申请号：US10908743
申请日：2005-05-24
申请人： Sterling Smith , Chia-Ming Yang , Chih-Shiun Lu
发明人： Sterling Smith , Chia-Ming Yang , Chih-Shiun Lu
IPC分类号： H03M1/10 , H03M1/12
CPC分类号： H03M1/1028 , H03M1/1215
摘要： A high-speed video signal processing system, which includes a reception end for receiving analog signals; a plurality of analog to digital converters coupled to the reception end for converting analog signals received from the reception end to digital signals according to control signals; and an interleaving controller coupled to the plurality of analog to digital converters for generating the control signals to selectively enable the plurality of analog to digital converters according to a predetermined sequence.
摘要翻译：一种高速视频信号处理系统，包括用于接收模拟信号的接收端; 耦合到接收端的多个模数转换器，用于根据控制信号将从接收端接收的模拟信号转换成数字信号; 以及耦合到所述多个模数转换器的交织控制器，用于产生所述控制信号，以根据预定顺序选择性地启用所述多个模数转换器。

16. 发明授权

US08466504B2 DRAM with dopant stop layer and method of fabricating the same 有权
标题翻译：具有掺杂剂停止层的DRAM及其制造方法
公开(公告)号：US08466504B2
公开(公告)日：2013-06-18
申请号：US13231968
申请日：2011-09-14
申请人： Chia-Ming Yang , Yao-Hsien Wang , Chen-Kang Wei , Chien-Chi Lee , Ming Yean , Yi-Wei Chuang , Hsiao-Lung Chiang , Hung-Chang Liao , Chung-Yuan Lee , Ming-Chi Chao
发明人： Chia-Ming Yang , Yao-Hsien Wang , Chen-Kang Wei , Chien-Chi Lee , Ming Yean , Yi-Wei Chuang , Hsiao-Lung Chiang , Hung-Chang Liao , Chung-Yuan Lee , Ming-Chi Chao
IPC分类号： H01L29/94 , H01L31/119
CPC分类号： H01L27/10876 , H01L21/26506 , H01L21/26586 , H01L29/1083
摘要： A DRAM with dopant stop layer includes a substrate, a trench-type transistor and a capacitor electrically connected to the trench-type transistor. The trench-type transistor includes a gate structure embedded in the substrate. A source doping region and a drain doping region are disposed in the substrate at two sides of the gate structure. A boron doping region is disposed under the source doping region. A dopant stop layer is disposed within the boron doping region or below the boron doping region. The dopant stop layer includes a dopant selected from the group consisting of C, Si, Ge, Sn, Cl, F and Br.
摘要翻译：具有掺杂剂停止层的DRAM包括衬底，沟槽型晶体管和电连接到沟槽型晶体管的电容器。沟槽型晶体管包括嵌入在衬底中的栅极结构。源极掺杂区域和漏极掺杂区域设置在栅极结构的两侧的衬底中。硼掺杂区域设置在源极掺杂区域下方。掺杂剂停止层设置在硼掺杂区域内或硼掺杂区域的下方。掺杂剂停止层包括选自C，Si，Ge，Sn，Cl，F和Br的掺杂剂。

17. 发明申请

US20120329278A1 DISPENSER FOR CHEMICAL-MECHANICAL POLISHING (CMP) APPARATUS, CMP APPARATUS HAVING THE DISPENSER, AND CMP PROCESS USING THE CMP APPARATUS 有权
标题翻译：用于化学机械抛光（CMP）设备的分配器，具有分配器的CMP设备和使用CMP设备的CMP工艺
公开(公告)号：US20120329278A1
公开(公告)日：2012-12-27
申请号：US13165763
申请日：2011-06-21
申请人： Liang-Chuo Ham , Chin-Chuan Chih , Jiann-Mo Lee , Chia-Ming Yang , Wen-Yen Chen
发明人： Liang-Chuo Ham , Chin-Chuan Chih , Jiann-Mo Lee , Chia-Ming Yang , Wen-Yen Chen
IPC分类号： H01L21/306 , B24B57/00
CPC分类号： B24B57/02 , B24B3/02 , H01L21/32115 , H01L21/3212 , H01L21/67051 , H01L21/6708
摘要： A dispenser for a chemical-mechanical polishing (CMP) apparatus, includes a delivery arm disposed over a polishing pad of a CMP apparatus, at least a slurry delivery groove formed in the delivery arm and extending along a length of the delivery arm, and a plurality of first openings connected to the slurry delivery groove.
摘要翻译：一种用于化学机械抛光（CMP）设备的分配器，包括设置在CMP设备的抛光垫上的输送臂，至少形成在输送臂中并沿着输送臂的长度延伸的浆料输送槽，连接到浆料输送槽的多个第一开口。

18. 发明申请

US20120280297A1 DRAM WITH DOPANT STOP LAYER AND METHOD OF FABRICATING THE SAME 有权
标题翻译：具有停留层的DRAM及其制造方法
公开(公告)号：US20120280297A1
公开(公告)日：2012-11-08
申请号：US13231968
申请日：2011-09-14
申请人： Chia-Ming Yang , Yao-Hsien Wang , Chen-Kang Wei , Chien-Chi Lee , Ming Yean , Yi-Wei Chuang , Hsiao-Lung Chiang , Hung-Chang Liao , Chung-Yuan Lee , Ming-Chi Chao
发明人： Chia-Ming Yang , Yao-Hsien Wang , Chen-Kang Wei , Chien-Chi Lee , Ming Yean , Yi-Wei Chuang , Hsiao-Lung Chiang , Hung-Chang Liao , Chung-Yuan Lee , Ming-Chi Chao
IPC分类号： H01L27/108 , H01L21/8242
CPC分类号： H01L27/10876 , H01L21/26506 , H01L21/26586 , H01L29/1083
摘要： A DRAM with dopant stop layer includes a substrate, a trench-type transistor and a capacitor electrically connected to the trench-type transistor. The trench-type transistor includes a gate structure embedded in the substrate. A source doping region and a drain doping region are disposed in the substrate at two sides of the gate structure. A boron doping region is disposed under the source doping region. A dopant stop layer is disposed within the boron doping region or below the boron doping region. The dopant stop layer includes a dopant selected from the group consisting of C, Si, Ge, Sn, Cl, F and Br.
摘要翻译：具有掺杂剂停止层的DRAM包括衬底，沟槽型晶体管和电连接到沟槽型晶体管的电容器。沟槽型晶体管包括嵌入在衬底中的栅极结构。源极掺杂区域和漏极掺杂区域设置在栅极结构的两侧的衬底中。硼掺杂区域设置在源极掺杂区域下方。掺杂剂停止层设置在硼掺杂区域内或硼掺杂区域的下方。掺杂剂停止层包括选自C，Si，Ge，Sn，Cl，F和Br的掺杂剂。

19. 发明授权

US08041845B2 Method for detecting digital video interface off-line mode and associated receiver 有权
标题翻译：检测数字视频接口离线模式和相关接收机的方法
公开(公告)号：US08041845B2
公开(公告)日：2011-10-18
申请号：US12115239
申请日：2008-05-05
申请人： Chia-Ming Yang , Huimin Tsai
发明人： Chia-Ming Yang , Huimin Tsai
IPC分类号： G06F3/00 , H04N5/63
CPC分类号： G06F1/3203 , G06F1/3265 , Y02D10/153
摘要： A TMDS receiver includes a plurality of data channels, a clock channel, and an off-line mode detector. Each data channel receives a video signal and the clock channel receives a clock signal. Each data channel comprises a channel decoder for decoding the signals received by the corresponding receiving channel. The off-line mode detector detects an off-line mode detector, and then turns on a plurality of first data channels for a first predetermined period to determine an operation mode of video signal transmitted on said first data channels if the activity of the clock signal is valid. The off-line mode detector also activates a plurality of second data channels among the plurality of data channels according to the operation mode if the operation mode is determined as valid.
摘要翻译： TMDS接收机包括多个数据信道，时钟信道和离线模式检测器。每个数据通道接收视频信号，时钟信道接收时钟信号。每个数据信道包括用于对由相应接收信道接收的信号进行解码的信道解码器。离线模式检测器检测离线模式检测器，然后在第一预定周期内接通多个第一数据信道，以确定在所述第一数据信道上发送的视频信号的操作模式，如果时钟信号的活动已验证。如果操作模式被确定为有效，则离线模式检测器还根据操作模式激活多个数据通道中的多个第二数据通道。

20. 发明申请

US20100301399A1 Sensitive field effect transistor apparatus 有权
标题翻译：敏感场效应晶体管装置
公开(公告)号：US20100301399A1
公开(公告)日：2010-12-02
申请号：US12591466
申请日：2009-11-20
申请人： Chao-Sung Lai , Cheng-En Lue , Chia-Ming Yang , Szu-Chieh Wang
发明人： Chao-Sung Lai , Cheng-En Lue , Chia-Ming Yang , Szu-Chieh Wang
IPC分类号： H01L29/78
CPC分类号： G01N27/4148
摘要： The invention discloses a sensitive field effect transistor apparatus, which uses the inorganic membrane to sense hydrogen ions. The invention adopts the membrane with high deformation stress. The sensitivity of sensitive membrane on hydrogen ion is adjusted through altering the membrane thickness and changing the substrate type and doped concentration. The differential amplifier is used to read signal to form the inorganic Ion Sensitive Field Effect Transistor/Reference Field Effect Transistor apparatus.
摘要翻译：本发明公开了一种使用无机膜感测氢离子的敏感场效应晶体管装置。本发明采用具有高变形应力的膜。敏感膜对氢离子的敏感性通过改变膜厚度和改变衬底类型和掺杂浓度来调节。差分放大器用于读取信号以形成无机离子敏感场效应晶体管/参考场效应晶体管装置。

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