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    • 15. 发明授权
    • Pixel driving circuit and method, array substrate and liquid crystal display apparatus
    • 像素驱动电路及方法,阵列基板及液晶显示装置
    • US09378698B2
    • 2016-06-28
    • US14364185
    • 2013-10-30
    • BOE TECHNOLOGY GROUP CO., LTD.BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    • Baoqiang Wang
    • G09G3/36G02F1/133G02F1/1368
    • G09G3/3677G02F1/13306G02F1/1368G09G3/3659G09G2300/08G09G2310/0205G09G2310/0208G09G2310/0251G09G2320/02G09G2320/0252
    • A pixel driving circuit and method, an array substrate and a LCD apparatus, solve the problem of a deterioration of an image quality due to an insufficient charging to a pixel electrode when a refreshing frequency of the LCD is relatively high. The pixel driving circuit comprises n rows of scanning lines, where n is an integer and n≧3, and the pixel driving circuit further comprises a pre-charging unit connected to each row of scanning line, for activating the (i+2)th row of scanning line at the same time when the ith row of scanning line is activated, where i is an integer and 1≦i≦n−2. The array substrate comprises a number of pixel units distributed in a matrix, and further comprises the pixel driving circuit as described above. The LCD apparatus comprises the array substrate as described above. The pixel driving method is used for driving n rows of scanning lines, where n is an integer and n≧3, and activating the (i+2)th row of scanning line at the same time when the ith row of scanning line is activated, where i is an integer and 1≦i≦n−2.
    • 像素驱动电路和方法,阵列基板和LCD装置解决了当LCD的刷新频率相对较高时由于对像素电极的充电不充分而导致的图像质量劣化的问题。 像素驱动电路包括n行扫描线,其中n是整数,n≥3,并且像素驱动电路还包括连接到每行扫描线的预充电单元,用于激活第(i + 2) 扫描行第i行被激活,其中i是整数,1≦̸ i≦̸ n-2。 阵列基板包括分布在矩阵中的多个像素单元,并且还包括如上所述的像素驱动电路。 LCD装置包括如上所述的阵列基板。 像素驱动方法用于驱动n行扫描线,其中n是整数,n≥3,并且在第i行扫描线被激活的同时激活扫描线的第(i + 2)行 ,其中i是整数,1≦̸ i≦̸ n-2。
    • 17. 发明授权
    • Array substrate, manufacturing method thereof, liquid crystal panel and liquid crystal display
    • 阵列基板,其制造方法,液晶面板和液晶显示器
    • US09524988B2
    • 2016-12-20
    • US13995938
    • 2012-11-09
    • BOE Technology Group Co., Ltd.Beijing BOE Display Technology Co., Ltd.
    • Sha LiuBaoqiang Wang
    • H01L27/12G02F1/1362G02F1/1368G09G3/36G02F1/1343
    • H01L27/124G02F1/136286G02F1/1368G02F2001/134372G02F2001/13685G09G3/3614G09G3/3648G09G2300/0426G09G2320/0252H01L27/1214H01L27/1251H01L27/1262
    • An array substrate, a manufacturing method thereof, a liquid crystal panel and a liquid crystal display. An array substrate, comprises: a substrate (11), gate lines (2), data lines (4) and common electrode lines (3) disposed on said substrate (11), said gate lines (2) and said data lines (4) define a plurality of pixel units (20, 21); two transparent conductive film layers (12, 19) and thin film transistor are formed in each of said pixel units (20, 21); wherein, said pixel units (20, 21) comprise a first pixel unit (20) and a second pixel unit (21), and the first pixel unit (20) and the second pixel unit (21) are alternately arranged along the direction of said data lines (4); wherein, in said first pixel unit (20), a first transparent conductive film layer (12) is electrically connected with a common electrode line (3), a second transparent conductive film layer (19) is electrically connected with a drain electrode (16) of a thin film transistor; in said second pixel unit (21), a first transparent conductive film layer (12) is electrically connected with a drain electrode (16) of a thin film transistor, a second transparent conductive film layer (19) is electrically connected with a common electrode line (3); the common electrode lines (3) in the pixel units (20, 21) are electrically connected with each other.
    • 阵列基板,其制造方法,液晶面板和液晶显示器。 一种阵列基板,包括:基板(11),设置在所述基板(11)上的栅极线(2),数据线(4)和公共电极线(3),所述栅极线(2)和所述数据线 )限定多个像素单元(20,21); 在每个像素单元(20,21)中形成两个透明导电膜层(12,19)和薄膜晶体管; 其中,所述像素单元(20,21)包括第一像素单元(20)和第二像素单元(21),并且所述第一像素单元(20)和所述第二像素单元(21)沿着 所述数据线(4); 其中,在所述第一像素单元(20)中,第一透明导电膜层(12)与公共电极线(3)电连接,第二透明导电膜层(19)与漏极电极 )薄膜晶体管; 在所述第二像素单元(21)中,第一透明导电膜层(12)与薄膜晶体管的漏电极(16)电连接,第二透明导电膜层(19)与公共电极 行(3); 像素单元(20,21)中的公共电极线(3)彼此电连接。
    • 18. 发明申请
    • Array Substrate, Manufacturing Method Thereof, Liquid Crystal Panel And Liquid Crystal Display
    • 阵列基板,其制造方法,液晶面板和液晶显示器
    • US20150200206A1
    • 2015-07-16
    • US13995938
    • 2012-11-09
    • BOE TECHNOLOGY GROUP CO., LTD.BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    • Sha LiuBaoqiang Wang
    • H01L27/12G02F1/1362G02F1/1368
    • H01L27/124G02F1/136286G02F1/1368G02F2001/134372G02F2001/13685G09G3/3614G09G3/3648G09G2300/0426G09G2320/0252H01L27/1214H01L27/1251H01L27/1262
    • An array substrate, a manufacturing method thereof, a liquid crystal panel and a liquid crystal display. An array substrate, comprises: a substrate (11), gate lines (2), data lines (4) and common electrode lines (3) disposed on said substrate (11), said gate lines (2) and said data lines (4) define a plurality of pixel units (20, 21); two transparent conductive film layers (12, 19) and thin film transistor are formed in each of said pixel units (20, 21); wherein, said pixel units (20, 21) comprise a first pixel unit (20) and a second pixel unit (21), and the first pixel unit (20) and the second pixel unit (21) are alternately arranged along the direction of said data lines (4); wherein, in said first pixel unit (20), a first transparent conductive film layer (12) is electrically connected with a common electrode line (3), a second transparent conductive film layer (19) is electrically connected with a drain electrode (16) of a thin film transistor; in said second pixel unit (21), a first transparent conductive film layer (12) is electrically connected with a drain electrode (16) of a thin film transistor, a second transparent conductive film layer (19) is electrically connected with a common electrode line (3); the common electrode lines (3) in the pixel units (20, 21) are electrically connected with each other.
    • 阵列基板,其制造方法,液晶面板和液晶显示器。 一种阵列基板,包括:基板(11),设置在所述基板(11)上的栅极线(2),数据线(4)和公共电极线(3),所述栅极线(2)和所述数据线 )限定多个像素单元(20,21); 在每个像素单元(20,21)中形成两个透明导电膜层(12,19)和薄膜晶体管; 其中,所述像素单元(20,21)包括第一像素单元(20)和第二像素单元(21),并且所述第一像素单元(20)和所述第二像素单元(21)沿着 所述数据线(4); 其中,在所述第一像素单元(20)中,第一透明导电膜层(12)与公共电极线(3)电连接,第二透明导电膜层(19)与漏极电极 )薄膜晶体管; 在所述第二像素单元(21)中,第一透明导电膜层(12)与薄膜晶体管的漏电极(16)电连接,第二透明导电膜层(19)与公共电极 行(3); 像素单元(20,21)中的公共电极线(3)彼此电连接。