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11. 发明专利

JPH0730462A METHOD AND DEVICE FOR TRANSMITTING SOUND SIGNAL 失效
公开(公告)号：JPH0730462A
公开(公告)日：1995-01-31
申请号：JP17073193
申请日：1993-07-09
申请人： FUJITSU LTD
发明人： TSUBOI MITSURU , FUJINO SHOJI , MATSUO NAOJI , NOBUMOTO TOSHIAKI , EGUCHI OSAHIDE , OTA TOSHIYUKI , MURAKAWA MIKI
IPC分类号： G10L19/04 , G10L19/00 , H04B1/66 , H04B14/04 , G10L9/14 , G10L9/18
摘要： PURPOSE:To suppress the deterioration of quantity and to attain a low bit rate by compressing the time base of an input sound signal prior to the execution of a code excited LPC(CELP) encoding and extending the time base of a CELP-decoded sound signal. CONSTITUTION:The time base compression of an integral multiple is applied to an input sound signal, the sampling period of an input signal to the CELP encoder is set up to an integral multiple of the original sampling period and the frequency band of a signal is reduced to 1/integer times. The time base compressed sound signal is CELP-encoded by using plural samples as one vector and transmitted as a code consisting of plural bits. On the transmitting side, a time base compressing circuit 1 executes time base compression and a CELP encoding circuit 2 executes CELP encoding, and on the receiving side, a CELP decoding circuit 3 decodes CELP decoding and a time axis extending circuit 4 executes time base extension. In addition, pitch period information indicating how many samples are used for each time base compression on the transmitting side is informed to the receiving side.

12. 发明专利

JPH0683399A VOICE ELIMINATION PROCESSING SYSTEM FOR SPEECH ENCODER 失效
公开(公告)号：JPH0683399A
公开(公告)日：1994-03-25
申请号：JP25743092
申请日：1992-09-01
申请人： FUJITSU LTD
发明人： MATSUO NAOJI , OKAZAKI KOJI , NISHIYAMA NAOMI , FUJINO SHOJI , TSUBOI MITSURU , NOBUMOTO TOSHIAKI
IPC分类号： G10L19/00 , H03M7/30 , H03M7/42 , G10L9/18
摘要： PURPOSE:To provide voice elimination processing which continuously attenuates a speech level by utilizing information on the speech sound level in a decoder in the voice elimination processing system for speech encoding by vector quantization, difference encoder, etc. CONSTITUTION:A code vector selected from a code book 101 is inputted to a speech synthesizing filter 103 to synthesize a speech. In this voice encoding, a vector inputted to the speech synthesizing filter is switched by a decoder from the code vector of the code book to a zero or smaller vector as the voice elimination processing.

13. 发明专利

JPH0683397A SPEECH ENCODING DEVICE 失效
公开(公告)号：JPH0683397A
公开(公告)日：1994-03-25
申请号：JP25896192
申请日：1992-09-02
申请人： FUJITSU LTD
发明人： MATSUO NAOJI , OKAZAKI KOJI , NISHIYAMA NAOMI , FUJINO SHOJI , TSUBOI MITSURU , NOBUMOTO TOSHIAKI
IPC分类号： G10L11/06 , G10L11/02 , G10L19/06 , H03M7/30 , G10L9/14
摘要： PURPOSE:To improve the characteristics of the speech encoding device(CODEC) which encodes a speech on the basis of AbS(analysis by Synthesis) by coinciding the filter states of an encoder and a decoder according to information that they originally have without sending side information such as voiced/voiceless decision information, a reset signal, etc. CONSTITUTION:The speech encoding system encoder 5 which is equipped with filters for synthesis on its encoder and decoder sides and takes an analysis by synthesis is equipped with a voiceless state detecting means 52 which detects an input speech becoming voiceless when the voiceless state detecting means 52 detects the voiceless state, the encoder which lets its filter 51 reset to an initial value, and/or a voiceless state detecting means 62 which detects the input speech becoming voiceless in a speech encoding system decoder 6 in the same speech encoding system and when the voiceless state detecting means detects the voiceless state, its filter 61 is reset to an initial value.

14. 发明专利

JPH05206975A SYNCHRONIZATION ESTABLISHMENT SYSTEM 失效
公开(公告)号：JPH05206975A
公开(公告)日：1993-08-13
申请号：JP1366392
申请日：1992-01-29
申请人： FUJITSU LTD
发明人： FUJINO SHOJI , OKAZAKI KOJI , TSUBOI MITSURU , MATSUO NAOJI , NISHIYAMA NAOMI , NOBUMOTO TOSHIAKI
IPC分类号： H04J3/06 , H04J3/12 , H04L7/00 , H04N1/327 , H04Q11/04
摘要： PURPOSE:To reduce the existence of a switching transition process for the number of protection stages necessary for synchronization pulling-in and synchronization protection within negligible range in the case of having an individual synchronization pattern between modules and switching the module concerning a synchronization establishment system. CONSTITUTION:The synchronization establishment of a module 1 of a master side is notified from the module 1 of the master side to a module 2 of a slave side. In the module 2 side of the slave side, the synchronization operation of its own module is shifted into a waiting mode with the synchronization establishment notification from the module 1 of the master side and even the abnormality of the synchronization pattern over the number of the protection stages is detected, it is not judged to be step out and a pulled-in phase is held. When the module 2 receives a notification that the module 1 of the master side generates step out from the module 1 of the master side and then detects the normality of the synchronization pattern of the several stages immediately before, the processing operation of the module 2 on the side on the slave is restarted by judging the module 2 to be synchronized.

15. 发明专利

JP2006023974A Remainder calculation processor and remainder calculation processing method 审中-公开
标题翻译：剩余计算处理器和剩余计算处理方法
公开(公告)号：JP2006023974A
公开(公告)日：2006-01-26
申请号：JP2004201314
申请日：2004-07-08
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SENKAWA YUKA , NOBUMOTO TOSHIAKI , TERAJIMA YOSHIHIRO
IPC分类号： G06F7/52 , G09C1/00
摘要： PROBLEM TO BE SOLVED: To provide a remainder calculation processor and a remainder calculation processing method capable of performing remainder calculation by a multiplication method, and reducing the processing quantity of remainder calculation for an input value whose range is limited. SOLUTION: When an integer whose range is limited is defined as a dividend and the integer of a fixed value is defined as a divisor, a dividend (103) is multiplied (104) by an invert (100) of a fixed point display divisor, and a decimal part is extracted from the multiplication result of the invert (106), and the extraction result of the decimal part is multiplied (108) by a divisor (107), and an integral part is extracted (110) as a division calculation result from a multiplication result (109). In this case, an error to be generated due to the cutoff of non-display digits is guaranteed by adding 1 to the least significant digit of the valid display digits of the invert (100) of the divisor (102) to perform the above arithmetic processing. Also, the number of digits of the fixed point display decimal part is defined as the precisely guaranteed minimum number of digits, and when the decimal point is extracted (106), the decimal part is extracted by mask processing with the precisely guaranteed minimum number of bits. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够通过乘法执行余数计算的余数计算处理器和余数计算处理方法，并且减少其范围被限制的输入值的余数计算的处理量。范围限定的整数被定义为被除数，固定值的整数被定义为除数，除数（103）乘以固定点的反转（100）（104）显示除数，并且从反转（106）的相乘结果中提取小数部分，并且除数（107）将小数部分的提取结果乘以（108），并且提取积分部分（110）作为来自乘法结果（109）的分割计算结果。在这种情况下，通过将除数（102）的反转（100）的有效显示位数的最低有效数字加1来执行上述算术来保证由于非显示位数的切断而产生的错误处理。此外，固定点显示小数部分的位数被定义为精确保证的最小位数，并且当提取小数点时（106），小数部分通过掩模处理提取，具有精确保证的最小数量位。版权所有（C）2006，JPO＆NCIPI

16. 发明专利

JP2005275626A Approximation arithmetic processing method and approximation arithmetic processing unit capable of selecting arithmetic classification and precision 审中-公开
标题翻译：近似算法处理方法和近似算法能够选择算术分类和精度的算术处理单元
公开(公告)号：JP2005275626A
公开(公告)日：2005-10-06
申请号：JP2004085613
申请日：2004-03-23
申请人： Fujitsu Ltd , 富士通株式会社
发明人： OTONARI SHOEI , NOBUMOTO TOSHIAKI , SAITO MUTSUMI
IPC分类号： G06F17/17
摘要： PROBLEM TO BE SOLVED: To solve the problem that since an arithmetic processing unit is individually configured of circuits when a plurality of arithmetic classifications are required, the circuit scale is likely to be large, and that since the arithmetic processing unit is individually configured of circuits when arithmetic precision is different according to arithmetic parts even though there is only one arithmetic classification, the circuit scale is likely to be increased in the same way. SOLUTION: The process of arithmetic processing is divided into respective processes, that is, pre-processing, approximation polynomial selection, approximation arithmetic processing and post-processing, and the pre-processing, approximation polynomial group and post-processing suitable for an arithmetic classification signal to be inputted is selected, and the approximation polynomial of precision equivalent to the inputted arithmetic precision signal is selected from the selected approximation polynomial group, and approximation arithmetic processing is performed. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题为了解决由于算术处理单元在需要多个算术分类时单独地由电路构成的问题，电路规模可能变大，并且由于算术处理单元是单独的由算术精度不同的电路组成，即使仅有一种算术分类，电路规模也可能以相同的方式增加。解决方案：算术处理的过程分为各自的处理，即预处理，近似多项式选择，近似算术处理和后处理以及预处理近似多项式组和后处理，适用于选择要输入的算术分类信号，并且从所选择的近似多项式组中选择与输入的算术精度信号相当的精度的近似多项式，并执行近似运算处理。版权所有（C）2006，JPO＆NCIPI

17. 发明专利

JPH0784599A ADAPTIVE PREDICTOR 失效
公开(公告)号：JPH0784599A
公开(公告)日：1995-03-31
申请号：JP22978893
申请日：1993-09-16
申请人： FUJITSU LTD
发明人： MATSUO NAOJI , OKAZAKI KOJI , FUJINO SHOJI , TSUBOI MITSURU , NOBUMOTO TOSHIAKI
IPC分类号： G10L19/00 , G10L19/06 , G10L19/08 , G10L9/14 , G10L9/08 , G10L9/18
摘要： PURPOSE:To obtain the adaptive predictor which can prevent an autocorrelation matrix from being made singular and minimize distortion applied to an original signal. CONSTITUTION:This adaptive predictor finds one group of characteristic values (lambda1, lambda2... lambdap) of a square matrix of (p)th order by a correcting means which corrects an autocorrelation coefficient inputted to a prediction coefficient arithmetic means 2 and compares the respective found characteristic values lambdai (i=1, 2... p) with a specific threshold value alpha to adaptively correct the autocorrelation coefficient when lambdai =alpha. Further, the predictor finds respective principal small matrix expressions (D1, D2... Dp) of (r)th order (r=1, 2... p) of the square matrix of (p)th order by a correcting means 4 for the autocorrelation coefficient inputted to the prediction coefficient arithmetic means 2 and compares the respective found principal small matrix expressions Dr (r=1, 2... p) with a specific threshold value beta to adaptively correct the autocorrelation coefficient when Dr =beta.

18. 发明专利

JPH0784597A SPEECH ENCODING DEVICE AND SPEECH DECODING DEVICE 失效
公开(公告)号：JPH0784597A
公开(公告)日：1995-03-31
申请号：JP23270493
申请日：1993-09-20
申请人： FUJITSU LTD
发明人： NOBUMOTO TOSHIAKI , FUJINO SHOJI , TSUBOI MITSURU , MATSUO NAOJI , EGUCHI OSAHIDE
IPC分类号： G10L25/93 , H04B1/66 , H04B14/04 , G10L9/00
摘要： PURPOSE:To provide the speech encoding device and speech decoding device which improve the quality of a reproduced sound at the time of a voiceless sound signal with small periodicity and a consonant with large variation while maintaining the quality of a voiced sound with large periodicity when the time- base compression and time-base expansion of a speech are performed. CONSTITUTION:The speech encoding device equipped with a pitch period detection part 700 which detects the pitch period of a speech input signal is equipped with a speech kind decision means 200 which decides which of a voiced sound, a voiceless sound, and a consonant the speech input signal is, a signal converting means 400 which converts the speech input signal to a positive or negative certain value according to whether the signal is positive or negative when the speech signal is the voiceless sound or consonant, and switch means 300 and 500 which apply the speech input signal as it is when the speech input signal is the voiced sound or the output of the signal converting means to the pitch detection part when the voiceless sound or consonant according to the output of the voice kind decision means.

19. 发明专利

JPH06276557A VOICE SIGNAL PROCESSING UNIT 失效
公开(公告)号：JPH06276557A
公开(公告)日：1994-09-30
申请号：JP5849893
申请日：1993-03-18
申请人： FUJITSU LTD
发明人： FUJINO SHOJI , TSUBOI MITSURU , MATSUO NAOJI , OKAZAKI KOJI , NOBUMOTO TOSHIAKI
IPC分类号： H04B3/36 , H04Q3/42
摘要： PURPOSE:To provide the voice signal processing unit in which an end point and a relay point are discriminated independently of call connection using a digital signal and an analog signal and adverse effect by a synergistic action between the relay point and the end point is eliminated by stopping echo cancelling and sound quality improvement by the voice signal processing unit discriminated as the relay point. CONSTITUTION:A superimposing means 72 superimposes a discrimination signal of a predetermined frequency onto a voice signal and outputs the result to an exchange 71 of a subscriber network and a detection elimiation means 73 detects whether or not the discrimination signal is superimposed on the voice signal sent from the exchange 71. Then the discrimination signal is eliminated and only the voice signal is outputted and it is recognized that its own equipment is an end point representing the connection to a telephone set 74 subjected to call connection at the time of detection of the discrimination signal and its own equipment is a relay point existing between end points when the discrimination signal is not detected.

20. 发明专利

JPH064087A SPEECH ENCODING DEVICE 失效
公开(公告)号：JPH064087A
公开(公告)日：1994-01-14
申请号：JP15711392
申请日：1992-06-17
申请人： FUJITSU LTD
发明人： NISHIYAMA NAOMI , TSUBOI MITSURU , FUJINO SHOJI , OKAZAKI KOJI , MATSUO NAOJI , NOBUMOTO TOSHIAKI
IPC分类号： G10L11/02 , G10L21/04 , G10L3/00 , G10L3/02
摘要： PURPOSE:To reduce a feeling of incongruity to a reproduced sound at the time of switching between a voiced sound section and a voiceless sound section of the speech encoding device. CONSTITUTION:The speech encoding device, which has a voiceless sound detection part 1 detecting the voiceless section of an input speech signal and outputting voiceless sound information and an encoding part 2 encoding and outputting the voiceless sound information and inputting speech signal on the transmission side and a decoding part 3 decoding the received voiceless sound information and inputting speech signal and outputting a reproduced speech signal and the voiceless sound information and a noise insertion part 4 inserting a noise of specific level into the voiceless sound section of the reproduced sound signal according to the voiceless sound information outputted by the decoding part and outputting the resulting signal on the reception side, is provided with a time delay part 5 which is connected between the voiceless sound detection part 1 and encoding part 2 on the transmission side and outputs the voiceless sound information with specific time delay behind the point of time when the voiceless sound detection part decides the voiceless sound section; and the noise insertion part 4 on the reception side inserts the noise of specific level into the voiceless sound section of the reproduced speech signal and the certain section right before the voiceless sound section according to the voiceless sound information outputted by the decoding part and outputs the resulting signal.

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