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11. 发明授权

US08224259B2 Digital architecture for radio-frequency apparatus and associated methods 有权
标题翻译：射频设备数字架构及相关方法
公开(公告)号：US08224259B2
公开(公告)日：2012-07-17
申请号：US12715361
申请日：2010-03-01
申请人： Richard T. Behrens , Tod Paulus , Mark S. Spurbeck , Vishnu S. Srinivasan , Donald A. Kerth , Jeffrey W. Scott , G. Tyson Tuttle , G. Diwakar Vishakhadatta
发明人： Richard T. Behrens , Tod Paulus , Mark S. Spurbeck , Vishnu S. Srinivasan , Donald A. Kerth , Jeffrey W. Scott , G. Tyson Tuttle , G. Diwakar Vishakhadatta
IPC分类号： H04B1/38 , H04W24/00
CPC分类号： H04B1/28 , H04B1/0003 , H04B1/38 , H04B1/406 , H04B15/02 , H04B15/04 , H04B2215/064
摘要： A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.
摘要翻译：射频（RF）接收机包括接收机模拟电路和接收机数字电路。接收器模拟电路驻留在第一集成电路内，并且接收器数字电路位于第二集成电路内。第二集成电路通过一位数字接口耦合到第一集成电路。接收机模拟电路接收RF信号并处理所接收的RF信号以产生数字信号。接收机模拟电路将数字信号提供给接收机数字电路。接收机数字电路包括数字下变频器电路，其将数字信号与中频（IF）本地振荡器（LO）信号混合以产生数字下变频信号。接收机数字电路还包括数字滤波器电路，其对数字下变频信号进行滤波以产生经滤波的数字信号。

12. 发明授权

US07242912B2 Partitioning of radio-frequency apparatus 有权
标题翻译：射频设备分区
公开(公告)号：US07242912B2
公开(公告)日：2007-07-10
申请号：US10631166
申请日：2003-07-31
申请人： James Maligeorgos , Augusto M. Marques , Lysander Lim , G. Tyson Tuttle , Aslamali A. Rafi , Tod Paulus , Gregory T. Uehara , Jeffrey W. Scott , Richard T. Behrens , Donald A. Kerth , G. Diwakar Vishakhadatta , Vishnu S. Srinivasan , Caiyi Wang
发明人： James Maligeorgos , Augusto M. Marques , Lysander Lim , G. Tyson Tuttle , Aslamali A. Rafi , Tod Paulus , Gregory T. Uehara , Jeffrey W. Scott , Richard T. Behrens , Donald A. Kerth , G. Diwakar Vishakhadatta , Vishnu S. Srinivasan , Caiyi Wang
IPC分类号： H04B1/40
CPC分类号： H04B1/0003 , H03L7/085 , H03L7/087 , H03L7/091 , H03L7/099 , H03L7/187 , H03L7/199 , H03L7/23 , H04B1/28 , H04B1/406 , H04B15/02 , H04B15/04 , H04B2215/064
摘要： Components of a radio-frequency (RF) apparatus including transceiver circuitry and frequency modification circuitry of a crystal oscillator circuit that generates a reference signal with adjustable frequency may be partitioned in a variety of ways, for example, as one or more separate integrated circuits. The frequency modification circuitry may be implemented as part of a crystal oscillator circuit that includes digitally controlled crystal oscillator (“DCXO”) circuitry and a crystal. The frequency modification circuitry may include at least one variable capacitance device and may be employed to generate a reference signal with adjustable frequency. The adjustable reference signal may be provided to other components of the RF apparatus and/or the RF apparatus may be configured to provide the adjustable reference signal to baseband processor circuitry. Automatic frequency control (AFC) circuitry may be integrated with other components of RF circuitry and may generate frequency control signals for the frequency modification circuitry based on, for example, a signal received from a temperature sensor. Digital-to-analog converter (DAC) circuitry may be integrated with other components of RF circuitry to enable all-digital frequency control communications from baseband processor circuitry to RF circuitry.
摘要翻译：包括生成具有可变频率的参考信号的晶体振荡器电路的收发器电路和频率修改电路的射频（RF）设备的组件可以以各种方式被划分，例如作为一个或多个单独的集成电路。频率修改电路可以被实现为包括数字控制的晶体振荡器（“DCXO”）电路和晶体的晶体振荡器电路的一部分。频率修改电路可以包括至少一个可变电容器件，并且可以用于产生具有可调频率的参考信号。可调参考信号可以被提供给RF装置的其他部件，和/或RF装置可以被配置为向基带处理器电路提供可调参考信号。自动频率控制（AFC）电路可以与RF电路的其它组件集成，并且可以基于例如从温度传感器接收的信号来生成用于频率修改电路的频率控制信号。数模转换器（DAC）电路可以与RF电路的其他部件集成，以实现从基带处理器电路到RF电路的全数字频率控制通信。

13. 发明授权

US06970717B2 Digital architecture for radio-frequency apparatus and associated methods 有权
标题翻译：射频设备数字架构及相关方法
公开(公告)号：US06970717B2
公开(公告)日：2005-11-29
申请号：US10075122
申请日：2002-02-12
申请人： Richard T. Behrens , Tod Paulus , Mark S. Spurbeck , Vishnu S. Srinivasan , Donald A. Kerth , Jeffrey W. Scott , G. Tyson Tuttle , G. Diwakar Vishakhadatta
发明人： Richard T. Behrens , Tod Paulus , Mark S. Spurbeck , Vishnu S. Srinivasan , Donald A. Kerth , Jeffrey W. Scott , G. Tyson Tuttle , G. Diwakar Vishakhadatta
IPC分类号： H04B1/28 , H04B1/40 , H04B15/02 , H04B15/04 , H04M1/00
CPC分类号： H04B1/28 , H04B1/0003 , H04B1/38 , H04B1/406 , H04B15/02 , H04B15/04 , H04B2215/064
摘要： A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.
摘要翻译：射频（RF）接收机包括接收机模拟电路和接收机数字电路。接收器模拟电路驻留在第一集成电路内，并且接收器数字电路位于第二集成电路内。第二集成电路通过一位数字接口耦合到第一集成电路。接收机模拟电路接收RF信号并处理所接收的RF信号以产生数字信号。接收机模拟电路将数字信号提供给接收机数字电路。接收机数字电路包括数字下变频器电路，其将数字信号与中频（IF）本地振荡器（LO）信号混合以产生数字下变频信号。接收机数字电路还包括数字滤波器电路，其对数字下变频信号进行滤波以产生经滤波的数字信号。

14. 发明授权

US08648653B2 Method and apparatus for reducing interference 有权
标题翻译：减少干扰的方法和装置
公开(公告)号：US08648653B2
公开(公告)日：2014-02-11
申请号：US12650546
申请日：2009-12-31
申请人： David R. Welland , Donald A. Kerth , Caiyi Wang
发明人： David R. Welland , Donald A. Kerth , Caiyi Wang
IPC分类号： H03K5/00
CPC分类号： H05K9/00 , H03L7/18 , H05K1/0216 , H05K3/10 , Y10T29/49124
摘要： A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.
摘要翻译：提供一种减少电路干扰的方法和装置。提供管理策略，以减少参考杂散和电路干扰。管理策略使用一种或多种减少数字电流，最小化互感，利用场消除，防止泄漏电流和/或管理阻抗的技术的组合。这些技术可以单独使用，或者优选地彼此组合使用。

15. 发明授权

US08421529B2 Method and apparatus for reducing interference 有权
公开(公告)号：US08421529B2
公开(公告)日：2013-04-16
申请号：US12650543
申请日：2009-12-31
申请人： David R. Welland , Donald A. Kerth , Caiyi Wang
发明人： David R. Welland , Donald A. Kerth , Caiyi Wang
IPC分类号： H03K5/00
CPC分类号： H05K9/00 , H03L7/18 , H05K1/0216 , H05K3/10 , Y10T29/49124
摘要： A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

16. 发明授权

US07941102B2 Partitioned radio-frequency apparatus and associated methods 有权
标题翻译：分频射频设备及相关方法
公开(公告)号：US07941102B2
公开(公告)日：2011-05-10
申请号：US11931656
申请日：2007-10-31
申请人： Donald A. Kerth , Richard T. Behrens , Jeffrey W. Scott , G. Diwakar Vishakhadatta , G. Tyson Tuttle , Vishnu Shankar Srinivasan
发明人： Donald A. Kerth , Richard T. Behrens , Jeffrey W. Scott , G. Diwakar Vishakhadatta , G. Tyson Tuttle , Vishnu Shankar Srinivasan
IPC分类号： H04B1/40
CPC分类号： H04B1/109 , H04B1/0003 , H04B1/28 , H04B1/406 , H04B15/02 , H04B15/04 , H04B2215/064 , H04L27/2649
摘要： Radio-frequency (RF) apparatus includes receiver analog circuitry that receives an RF signal and provides at least one digital signal to receiver digital circuitry that functions in cooperation with the receiver analog circuitry. The receiver analog circuitry and the receiver digital circuitry are partitioned so that interference effects between the receiver analog circuitry and the receiver digital circuitry tend to be reduced.
摘要翻译：射频（RF）设备包括接收模拟电路，其接收RF信号并且向与接收机模拟电路协作起作用的接收机数字电路提供至少一个数字信号。接收机模拟电路和接收机数字电路被分割，使得接收机模拟电路和接收机数字电路之间的干扰效应趋于降低。

17. 发明申请

US20100167684A1 QUADRATURE SIGNAL GENERATION IN RADIO-FREQUENCY APPARATUS AND ASSOCIATED METHODS 有权
标题翻译：无线电频率装置和相关方法的平均信号产生
公开(公告)号：US20100167684A1
公开(公告)日：2010-07-01
申请号：US12579591
申请日：2009-10-15
申请人： Donald A. Kerth
发明人： Donald A. Kerth
IPC分类号： H04B1/16
CPC分类号： H04B1/0003 , H04B1/28 , H04B1/406 , H04B15/02 , H04B15/04 , H04B2215/064
摘要： A radio-frequency (RF) apparatus, which may reside in a receiver or transceiver, includes receive-path circuitry. The receive-path circuitry includes a poly-phase filter and a harmonic filter. The poly-phase filter accepts an input signal and generates two output signals. One output signal of the poly-phase filter constitutes an in-phase (I) signal. The other output signal of the poly-phase filter constitutes a quadrature (Q) signal. The a harmonic filter couples to the poly-phase filter. The harmonic filter accepts as input signals the in-phase and quadrature output signals of the poly-phase filter.
摘要翻译：可以驻留在接收机或收发机中的射频（RF）设备包括接收路径电路。接收路径电路包括多相滤波器和谐波滤波器。多相滤波器接受输入信号并产生两个输出信号。多相滤波器的一个输出信号构成同相（I）信号。多相滤波器的另一输出信号构成正交（Q）信号。谐波滤波器耦合到多相滤波器。谐波滤波器接收多相滤波器的同相和正交输出信号作为输入信号。

18. 发明申请

US20080002786A1 WIRELESS COMMUNICATION DEVICE WITH SELF CALIBRATION FEATURE FOR CONTROLLING POWER OUTPUT 有权
标题翻译：具有自校准功能的无线通信设备，用于控制电源输出
公开(公告)号：US20080002786A1
公开(公告)日：2008-01-03
申请号：US11427800
申请日：2006-06-30
申请人： Donald A. Kerth , Srinath Sridharan
发明人： Donald A. Kerth , Srinath Sridharan
IPC分类号： H04L25/49
CPC分类号： H04W52/52 , H04B17/13 , H04W52/04
摘要： A wireless communication device is disclosed which employs a minimal number of power calibrations to set the output power of the device to a specified output power level. In one embodiment, the disclosed communication device includes a self calibrating feature that sets the output power level during initialization of the device.
摘要翻译：公开了一种无线通信设备，其采用最小数量的功率校准来将设备的输出功率设置为指定的输出功率电平。在一个实施例中，所公开的通信设备包括在设备的初始化期间设置输出功率电平的自校准特征。

19. 发明授权

US07292091B1 Method and apparatus for reducing interference 有权
公开(公告)号：US07292091B1
公开(公告)日：2007-11-06
申请号：US11170380
申请日：2005-06-29
申请人： David R. Welland , Donald A. Kerth , Caiyi Wang
发明人： David R. Welland , Donald A. Kerth , Caiyi Wang
IPC分类号： H03K5/00
CPC分类号： H05K9/00 , H03L7/18 , H05K1/0216 , H05K3/10 , Y10T29/49124
摘要： A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

20. 发明授权

US06650264B1 Quadrature sampling architecture and method for analog-to-digital converters 有权
标题翻译：模数转换器的正交采样架构和方法
公开(公告)号：US06650264B1
公开(公告)日：2003-11-18
申请号：US09414209
申请日：1999-10-07
申请人： Brian P. Lum Shue Chan , Brian D. Green , Donald A. Kerth
发明人： Brian P. Lum Shue Chan , Brian D. Green , Donald A. Kerth
IPC分类号： H03M300
CPC分类号： H03M1/1215 , H03M3/40 , H03M3/47
摘要： Quadrature sampling architecture and method are disclosed for analog-to-digital converters that provide improved digital output signals over prior quadrature mixing implementations. Sampling circuitry according to the present invention samples an input signal with a first and second sampling signals to produce real and imaginary sampled output signals. The first sampling signal, which is associated with the real sampled output signal, is delayed by one-fourth cycle with respect to the second sampling signal, which is associated with the imaginary sampled output signal. This one-fourth cycle sampling signal difference allows for simplified construction of the sampling circuitry. In addition, filter circuitry according to the present invention processes the real and imaginary digital data output signals so that the imaginary digital data output signal is advanced by one-fourth cycle with respect to the real digital data output signal. This one-fourth cycle relative advance tends to eliminate undesirable magnitude distortion and error signals in complex digital output signals that have been mixed down to baseband. Furthermore, the real and imaginary signal paths may be interchanged and still take advantage of the present invention.
摘要翻译：公开了用于模数转换器的正交采样架构和方法，其在现有的正交混频实现方面提供改进的数字输出信号。根据本发明的采样电路用第一和第二采样信号对输入信号进行采样以产生实数和虚数采样的输出信号。与实际采样输出信号相关联的第一采样信号相对于与虚拟采样输出信号相关联的第二采样信号被延迟四分之一周期。这个四分之一周期采样信号差异允许采样电路的简化结构。此外，根据本发明的滤波器电路处理实数和虚数数字输出信号，使得虚数数字数据输出信号相对于实数数字数据输出信号提前四分之一。这个四分之一周期的相对提前趋向于消除已经被混合到基带的复杂数字输出信号中的不期望的幅度失真和误差信号。此外，实信号路径和虚信号路径可以互换，并且仍然利用本发明。

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