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11. 发明申请

US20130222664A1 IMAGE PICKUP APPARATUS 有权
标题翻译：图像拾取装置
公开(公告)号：US20130222664A1
公开(公告)日：2013-08-29
申请号：US13777378
申请日：2013-02-26
申请人： Masafumi TAKAHASHI , Takashi Ando
发明人： Masafumi TAKAHASHI , Takashi Ando
IPC分类号： H04N5/225
CPC分类号： H04N5/2328 , G03B2205/0038 , H04N5/2254 , H04N5/23287
摘要： Provided in an image pickup apparatus are an imaging optical system (12), an image pickup element (22), a fixed member (22) whose position relative to the imaging optical axis OA is fixed, a plurality of movable supporting balls (62), each movably supported with attraction of magnetic force, a movable member (41) in which the image pickup element is provided and which is movably supported by the fixed member with magnetic force through each movable supporting ball (62), a driving mechanism (44, 46, 54, 55, 56, 57) to generate driving force to relatively move the movable member with respect to the fixed member, a display unit (18), a mounting plate to mount the display unit in the casing (11), wherein the mounting plate (70) is provided with a protruding arm portion (74) protruding toward the movable member.
摘要翻译：在图像拾取装置中设置有成像光学系统（12），相对于成像光轴OA的位置固定的摄像元件（22），固定部件（22），多个可动支撑球（62），每个都可移动地受到磁力的吸引力;可移动构件（41），其中设置有图像拾取元件，并且通过每个可移动支撑球（62）以磁力可动地由固定构件支撑，驱动机构（44）以产生相对于固定构件相对移动可动构件的驱动力，显示单元（18），将显示单元安装在壳体（11）中的安装板，其中所述安装板（70）设置有朝向所述可动构件突出的突出臂部（74）。

12. 发明申请

US20130161763A1 SOURCE-DRAIN EXTENSION FORMATION IN REPLACEMENT METAL GATE TRANSISTOR DEVICE 有权
标题翻译：替代金属栅极晶体管器件中的源极 - 漏极扩展形成
公开(公告)号：US20130161763A1
公开(公告)日：2013-06-27
申请号：US13332991
申请日：2011-12-21
申请人： Takashi Ando , Huiming Bu , Ramachandra Divakaruni , Bruce B. Doris , Chung-Hsun Lin , Huiling Shang , Tenko Yamashita
发明人： Takashi Ando , Huiming Bu , Ramachandra Divakaruni , Bruce B. Doris , Chung-Hsun Lin , Huiling Shang , Tenko Yamashita
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7833 , H01L21/26506 , H01L21/2658 , H01L21/26586 , H01L21/268 , H01L29/42384 , H01L29/4908 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/6653 , H01L29/66537 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/78621
摘要： A method includes forming on a surface of a semiconductor a dummy gate structure comprised of a plug; forming a first spacer surrounding the plug, the first spacer being a sacrificial spacer; and performing an angled ion implant so as to implant a dopant species into the surface of the semiconductor adjacent to an outer sidewall of the first spacer to form a source extension region and a drain extension region, where the implanted dopant species extends under the outer sidewall of the first spacer by an amount that is a function of the angle of the ion implant. The method further includes performing a laser anneal to activate the source extension and the drain extension implant. The method further includes forming a second spacer surrounding the first spacer, removing the first spacer and the plug to form an opening, and depositing a gate stack in the opening.
摘要翻译：一种方法包括在半导体的表面上形成由插头构成的虚拟栅极结构; 形成围绕所述插塞的第一间隔件，所述第一间隔件是牺牲间隔件; 以及执行成角度的离子注入，以便将掺杂剂物质注入与所述第一间隔物的外侧壁相邻的所述半导体的表面中，以形成源延伸区域和漏极延伸区域，其中所述注入的掺杂剂物质在所述外侧壁的第一间隔物的量是离子注入的角度的函数。该方法还包括执行激光退火以激活源延伸和漏极延伸植入。该方法还包括形成围绕第一间隔件的第二间隔件，去除第一间隔件和插塞以形成开口，以及在开口中沉积栅极堆叠。

13. 发明授权

US08471347B2 Solid-state imaging device capable of suppressing generation of dark current and imaging apparatus 有权
标题翻译：能够抑制暗电流的产生的固态成像装置和摄像装置
公开(公告)号：US08471347B2
公开(公告)日：2013-06-25
申请号：US12977756
申请日：2010-12-23
申请人： Itaru Oshiyama , Takashi Ando , Susumu Hiyama , Tetsuji Yamaguchi , Yuko Ohgishi , Harumi Ikeda
发明人： Itaru Oshiyama , Takashi Ando , Susumu Hiyama , Tetsuji Yamaguchi , Yuko Ohgishi , Harumi Ikeda
IPC分类号： H01L31/02
CPC分类号： H01L27/14636 , H01L27/1461 , H01L27/1462 , H01L27/14621 , H01L27/14623 , H01L27/14625 , H01L27/14627 , H01L27/14629 , H01L27/1464 , H01L27/14643 , H01L27/14645 , H01L27/14683 , H01L27/14818 , H01L27/14868
摘要： A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section.
摘要翻译：具有执行入射光的光电转换的光感测部的固态成像装置包括：形成在感光部的受光面上的绝缘层; 在绝缘层上形成具有负电荷的层; 以及形成在光检测部的光接收表面上的空穴积聚层。

14. 发明授权

US08471314B2 Solid-state imaging device, method for producing same, and camera 有权
公开(公告)号：US08471314B2
公开(公告)日：2013-06-25
申请号：US12703848
申请日：2010-02-11
申请人： Yasushi Maruyama , Tetsuji Yamaguchi , Takashi Ando , Susumu Hiyama , Yuko Ohgishi
发明人： Yasushi Maruyama , Tetsuji Yamaguchi , Takashi Ando , Susumu Hiyama , Yuko Ohgishi
IPC分类号： H01L31/062
CPC分类号： H01L27/14609 , H01L27/1464 , H01L27/14643 , H01L27/14685 , H01L31/022466 , H01L31/022475
摘要： A solid-state imaging device includes a substrate having a first surface and a second surface, light being incident on the second surface side; a wiring layer disposed on the first surface side; a photodetector formed in the substrate and including a first region of a first conductivity type; a transfer gate disposed on the first surface of the substrate and adjacent to the photodetector, the transfer gate transferring a signal charge accumulated in the photodetector; and at least one control gate disposed on the first surface of the substrate and superposed on the photodetector, the control gate controlling the potential of the photodetector in the vicinity of the first surface.

15. 发明授权

US08420473B2 Replacement gate devices with barrier metal for simultaneous processing 失效
标题翻译：具有隔离金属的替换门装置用于同时处理
公开(公告)号：US08420473B2
公开(公告)日：2013-04-16
申请号：US12960586
申请日：2010-12-06
申请人： Takashi Ando , Michael P. Chudzik , Siddarth A. Krishnan , Unoh Kwon , Vijay Narayanan
发明人： Takashi Ando , Michael P. Chudzik , Siddarth A. Krishnan , Unoh Kwon , Vijay Narayanan
IPC分类号： H01L21/8238 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/823842 , H01L29/165 , H01L29/4966 , H01L29/51 , H01L29/66545 , H01L29/66606 , H01L29/7848
摘要： A method of simultaneously fabricating n-type and p type field effect transistors can include forming a first replacement gate having a first gate metal layer adjacent a gate dielectric layer in a first opening in a dielectric region overlying a first active semiconductor region. A second replacement gate including a second gate metal layer can be formed adjacent a gate dielectric layer in a second opening in a dielectric region overlying a second active semiconductor region. At least portions of the first and second gate metal layers can be stacked in a direction of their thicknesses and separated from each other by at least a barrier metal layer. The NFET resulting from the method can include the first active semiconductor region, the source/drain regions therein and the first replacement gate, and the PFET resulting from the method can include the second active semiconductor region, source/drain regions therein and the second replacement gate.
摘要翻译：同时制造n型和p型场效应晶体管的方法可以包括在覆盖第一有源半导体区域的电介质区域中的第一开口中形成具有与栅极电介质层相邻的第一栅极金属层的第一替代栅极。包括第二栅极金属层的第二替代栅极可以在覆盖在第二有源半导体区域上的电介质区域中的第二开口中邻近栅极电介质层形成。第一和第二栅极金属层的至少一部分可以沿其厚度的方向堆叠并且通过至少阻挡金属层彼此分离。由该方法产生的NFET可以包括第一有源半导体区域，其中的源极/漏极区域和第一替换栅极，并且由该方法产生的PFET可以包括第二有源半导体区域，其中的源/漏区域和第二替换门。

16. 发明申请

US20130027083A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
标题翻译：半导体集成电路设备
公开(公告)号：US20130027083A1
公开(公告)日：2013-01-31
申请号：US13562144
申请日：2012-07-30
申请人： Takashi Ando , Keiichi Kusumoto , Kenji Shimazaki , Kazuyuki Nakanishi , Tetsurou Toubou
发明人： Takashi Ando , Keiichi Kusumoto , Kenji Shimazaki , Kazuyuki Nakanishi , Tetsurou Toubou
IPC分类号： H01L25/00
CPC分类号： H01L27/0207 , H01L27/11807 , H01L2027/11822
摘要： A semiconductor integrated circuit device includes cells A-1, B-1, and C-1 that have the same logic. Cell B-1 has cell width W2 larger than a cell width of cell A-1, but gate length L1 of a MOS transistor is equal to that of cell A-1. Cell C-1 has cell width W2 equal to a cell width of cell B-1, but has a MOS transistor having large gate length L2. A circuit delay of cell C-1 becomes large as compared with that of cells A-1 and B-1, but leak current becomes small. Therefore, by replacing cell A-1 adjacent to a space area with cell B-1, and by replacing cell B-1 in a path having room in timing with cell C-1, for example, leak current can be suppressed without increasing a chip area.
摘要翻译：半导体集成电路器件包括具有相同逻辑的单元A-1，B-1和C-1。单元B-1具有大于单元A-1的单元宽度的单元宽度W2，但是MOS晶体管的栅极长度L1等于单元A-1的单元宽度。单元C-1具有等于单元B-1的单元宽度的单元宽度W2，但是具有栅极长度L2大的MOS晶体管。与电池A-1和B-1相比，电池C-1的电路延迟变大，但泄漏电流变小。因此，通过用小区B-1替换与空间区域相邻的小区A-1，并且例如通过用小区C-1定时的具有空间的路径替换小区B-1，可以抑制泄漏电流而不增加芯片面积。

17. 发明申请

US20130015496A1 Power Semiconductor Device 有权
标题翻译：功率半导体器件
公开(公告)号：US20130015496A1
公开(公告)日：2013-01-17
申请号：US13544339
申请日：2012-07-09
申请人： Akitoyo Konno , Katsunori Azuma , Takashi Ando
发明人： Akitoyo Konno , Katsunori Azuma , Takashi Ando
IPC分类号： H01L25/16
CPC分类号： H01L23/49 , H01L23/49811 , H01L24/45 , H01L24/49 , H01L25/072 , H01L29/417 , H01L2224/0603 , H01L2224/45015 , H01L2224/45124 , H01L2224/45147 , H01L2224/48137 , H01L2224/48139 , H01L2224/49111 , H01L2224/49113 , H01L2924/01047 , H01L2924/01322 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/30107 , H01L2924/00 , H01L2924/2076 , H01L2924/00014
摘要： A power semiconductor device is provided in which reliability can be improved when the parallel number of semiconductor devices increases. When a bonding face on collector electrode is on an upper side, and a bonding face on emitter electrode is on a lower side, a collector electrode joint region as a joint region between a collector trace and a collector electrode on a chip mounted substrate and an emitter electrode joint region as a joint region between an emitter trace and an emitter electrode are located at a same position in an up-and-down direction and are adjacent in a right-and-left direction at an interval of 2 mm or more and 4 mm or less.
摘要翻译：提供一种功率半导体器件，其中当半导体器件的平行数量增加时可以提高可靠性。当集电极上的接合面在上侧，发射电极的接合面位于下侧时，集电极接合区域作为芯片安装基板上的集电体迹线与集电极之间的接合区域，作为发射极和发射极之间的接合区域的发射极电极接合区域位于上下方向的相同位置，并且在左右方向上以2mm以上的间隔相邻， 4毫米或更小。

18. 发明申请

US20120299123A1 Gate-Last Fabrication of Quarter-Gap MGHK FET 失效
标题翻译：最近制造四分之一间隙MGHK FET
公开(公告)号：US20120299123A1
公开(公告)日：2012-11-29
申请号：US13570388
申请日：2012-08-09
申请人： Takashi Ando , Kisik Choi , Vijay Narayanan , Tenko Yamashita , Junli Wang
发明人： Takashi Ando , Kisik Choi , Vijay Narayanan , Tenko Yamashita , Junli Wang
IPC分类号： H01L29/78
CPC分类号： H01L29/517 , H01L21/28079 , H01L21/28088 , H01L29/4958 , H01L29/4966 , H01L29/66545
摘要： A quarter-gap p-type field effect transistor (PFET) formed by gate-last fabrication includes a gate stack formed on a silicon substrate, the gate stack including: a high-k dielectric layer located on the silicon substrate; and a gate metal layer located over the high-k dielectric layer, the gate metal layer including titanium nitride and having a thickness of about 20 angstroms; and a metal contact formed over the gate stack. A quarter-gap n-type field effect transistor (NFET) formed by gate-last fabrication includes a gate stack formed on a silicon substrate, the gate stack including: a high-k dielectric layer located on the silicon substrate; and a first gate metal layer located over the high-k dielectric layer, the first gate metal layer including titanium nitride; and a metal contact formed over the gate stack.
摘要翻译：通过栅极最终制造形成的四分之一间隙p型场效应晶体管（PFET）包括形成在硅衬底上的栅极堆叠，所述栅极堆叠包括：位于硅衬底上的高k电介质层; 以及位于高k电介质层上方的栅极金属层，所述栅极金属层包括氮化钛并且具有约20埃的厚度; 以及形成在栅极堆叠上的金属接触。通过栅极最后制造形成的四分之一间隙n型场效应晶体管（NFET）包括形成在硅衬底上的栅极堆叠，该栅极堆叠包括：位于硅衬底上的高k电介质层; 以及位于所述高k电介质层上方的第一栅极金属层，所述第一栅极金属层包括氮化钛; 以及形成在栅极堆叠上的金属接触。

19. 发明授权

US08317081B2 Reflow bonding method and method of manufacturing head suspension 有权
标题翻译：回流焊接方法及其制造方法
公开(公告)号：US08317081B2
公开(公告)日：2012-11-27
申请号：US12907406
申请日：2010-10-19
申请人： Shogo Ogaki , Takashi Ando , Masaru Inoue
发明人： Shogo Ogaki , Takashi Ando , Masaru Inoue
IPC分类号： B23K31/02
CPC分类号： B23K3/04 , B23K1/0016 , G11B5/4833
摘要： A reflow bonding method easily bonds first and second wiring members together by reflowing solder arranged on at least one of first and second bonding parts that are defined on the first and second wiring members, respectively. The method includes positioning the first and second wiring members so that the first and second bonding parts face each other with the solder interposed between them and heating and pressing one of the first and second bonding parts from behind with a pressing face of a heater chip so that the first and second bonding parts lie one on another and so that the solder is heated and reflows to bond the first and second wiring members together.
摘要翻译：回流焊接方法通过分别在第一和第二布线构件上限定的第一和第二接合部中的至少一个上的回流焊料容易地将第一和第二布线构件接合在一起。该方法包括：定位第一和第二布线构件，使得第一和第二接合部分彼此面对，并且夹在它们之间的焊料并且用加热器片的按压面从后面加热和加压第一和第二接合部分中的一个，从而第一和第二接合部分彼此位于一起并且使得焊料被加热并且回流以将第一和第二配线构件结合在一起。

20. 发明授权

US08309265B2 Electrolyte membrane for fuel cells, its production and fuel cell using the same 有权
标题翻译：用于燃料电池的电解质膜，其生产和燃料电池使用相同
公开(公告)号：US08309265B2
公开(公告)日：2012-11-13
申请号：US10929370
申请日：2004-08-31
申请人： Akihiro Miyauchi , Kenichi Souma , Shuichi Suzuki , Yoshiyuki Takamori , Masahiko Ogino , Takashi Ando , Hidetoshi Honbo
发明人： Akihiro Miyauchi , Kenichi Souma , Shuichi Suzuki , Yoshiyuki Takamori , Masahiko Ogino , Takashi Ando , Hidetoshi Honbo
IPC分类号： H01M8/10
CPC分类号： H01M8/1004 , H01M8/1065 , H01M8/1067 , H01M8/1093 , Y02P70/56
摘要： The present invention provides an electrolyte membrane for a fuel cell that has a minute projection cluster on one side or both sides of a polymer electrolyte membrane. Further, the present invention provides a production method of an electrolyte membrane for a fuel cell, wherein a mold comprising convex portions having a fixed planar pattern is pressed on one side or both sides of a polymer electrolyte membrane, then while concave portions of the polymer electrolyte membrane formed in the concave portions are being stretched, the mold is removed from the polymer electrolyte membrane for forming a minute projection cluster.
摘要翻译：本发明提供一种用于燃料电池的电解质膜，其在聚合物电解质膜的一侧或两侧具有微小的突起簇。此外，本发明提供一种燃料电池用电解质膜的制造方法，其特征在于，在聚合物电解质膜的一侧或两侧压入具有固定平面图案的凸部的模具，然后在聚合物的凹部在凹部中形成的电解质膜被拉伸，从用于形成微小突起簇的聚合物电解质膜中除去模具。

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