专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US08753899B2 Magnetoresistive random access memory (MRAM) device and fabrication methods thereof 有权
标题翻译：磁阻随机存取存储器（MRAM）器件及其制造方法
公开(公告)号：US08753899B2
公开(公告)日：2014-06-17
申请号：US13215389
申请日：2011-08-23
申请人： Bang-Tai Tang , Cheng-Yuan Tsai
发明人： Bang-Tai Tang , Cheng-Yuan Tsai
IPC分类号： H01L41/20 , H01L41/06 , G11B5/39 , H01L21/285 , H01L21/64 , H01L29/88
CPC分类号： H01L43/12 , H01L43/08
摘要： A method includes patterning a plurality of magnetic tunnel junction (MTJ) layers to form an MTJ cell, and forming a dielectric cap layer over a top surface and on a sidewall of the MTJ cell. The step of patterning and the step of forming the dielectric cap layer are in-situ formed in a same vacuum environment. A plasma treatment is performed on the dielectric cap layer to transform the dielectric cap layer into a treated dielectric cap layer, whereby the treated dielectric cap layer improves protection from H2O or O2, and thus degradation.
摘要翻译：一种方法包括图案化多个磁性隧道结（MTJ）层以形成MTJ电池，以及在MTJ电池的顶表面和侧壁上形成电介质盖层。图案化步骤和形成电介质盖层的步骤在相同的真空环境中原位形成。在电介质盖层上进行等离子体处理，以将电介质盖层转变成经处理的电介质盖层，由此处理的电介质盖层改善了对H 2 O或O 2的保护，从而改善了降解。

12. 发明授权

US08501610B2 Non-volatile memories and methods of fabrication thereof 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US08501610B2
公开(公告)日：2013-08-06
申请号：US12714194
申请日：2010-02-26
申请人： Chih-Wei Lin , Yi-Fang Lee , Cheng-Ta Wu , Cheng-Yuan Tsai
发明人： Chih-Wei Lin , Yi-Fang Lee , Cheng-Ta Wu , Cheng-Yuan Tsai
IPC分类号： H01L21/3205
CPC分类号： H01L29/788 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/513 , H01L29/7881
摘要： Non-volatile memories and methods of fabrication thereof are described. In one embodiment, a method of fabricating a semiconductor device includes forming an oxide layer over a semiconductor substrate, and exposing the oxide layer to a first nitridation step to form a first nitrogen rich region. The first nitrogen rich region is disposed adjacent an interface between the oxide layer and the semiconductor substrate. After the first nitridation step, the oxide layer is exposed to a second nitridation step to form a second nitrogen rich region. A first gate electrode is formed on the oxide layer, wherein the second nitrogen rich region is disposed adjacent an interface between the oxide layer and the first gate electrode.
摘要翻译：描述了非易失性存储器及其制造方法。在一个实施例中，制造半导体器件的方法包括在半导体衬底上形成氧化物层，并将氧化物层暴露于第一氮化步骤以形成第一富氮区域。第一富氮区域设置在氧化物层和半导体衬底之间的界面附近。在第一次氮化步骤之后，将氧化物层暴露于第二氮化步骤以形成第二富氮区域。第一栅电极形成在氧化物层上，其中第二富氮区邻近氧化物层和第一栅电极之间的界面设置。

13. 发明申请

US20130075839A1 STRUCTURE AND METHOD FOR A MRAM DEVICE WITH AN OXYGEN ABSORBING CAP LAYER 有权
标题翻译：具有氧吸收层的MRAM器件的结构和方法
公开(公告)号：US20130075839A1
公开(公告)日：2013-03-28
申请号：US13244349
申请日：2011-09-24
申请人： Chih-Ming Chen , Ya-Chen Kao , Ming-Te Liu , Chung-Yi Yu , Cheng-Yuan Tsai , Chun-Jung Lin
发明人： Chih-Ming Chen , Ya-Chen Kao , Ming-Te Liu , Chung-Yi Yu , Cheng-Yuan Tsai , Chun-Jung Lin
IPC分类号： H01L29/82 , H01L21/8246
CPC分类号： H01L43/12 , G11C11/15 , G11C11/161 , H01L43/08
摘要： The present disclosure provides a MTJ stack for an MRAM device. The MTJ stack includes a pinned ferromagnetic layer over a pinning layer; a tunneling barrier layer over the pinned ferromagnetic layer; a free ferromagnetic layer over the tunneling barrier layer; a conductive oxide layer over the free ferromagnetic layer; and a oxygen-based cap layer over the conductive oxide layer.
摘要翻译：本公开提供了一种用于MRAM设备的MTJ堆叠。 MTJ堆叠包括钉扎层上的钉扎铁磁层; 在被钉扎铁磁层上的隧道势垒层; 在隧道势垒层上的自由铁磁层; 在自由铁磁层上的导电氧化物层; 以及在导电氧化物层上的氧基覆盖层。

14. 发明授权

US08377733B2 Antireflective layer for backside illuminated image sensor and method of manufacturing same 有权
标题翻译：用于背面照明图像传感器的抗反射层及其制造方法
公开(公告)号：US08377733B2
公开(公告)日：2013-02-19
申请号：US12890913
申请日：2010-09-27
申请人： Chih-Hui Huang , Cheng-Yuan Tsai , Yeur-Luen Tu , Chia-Shiung Tsai , Dun-Nian Yaung , Jen-Cheng Liu
发明人： Chih-Hui Huang , Cheng-Yuan Tsai , Yeur-Luen Tu , Chia-Shiung Tsai , Dun-Nian Yaung , Jen-Cheng Liu
IPC分类号： H01L21/00
CPC分类号： H01L27/1464 , H01L27/14625 , H01L27/14685
摘要： The present disclosure provides an image sensor device that exhibits improved quantum efficiency. For example, a backside illuminated (BSI) image sensor device is provided that includes a substrate having a front surface and a back surface; a light sensing region disposed at the front surface of the substrate; and an antireflective layer disposed over the back surface of the substrate. The antireflective layer has an index of refraction greater than or equal to about 2.2 and an extinction coefficient less than or equal to about 0.05 when measured at a wavelength less than 700 nm.
摘要翻译：本公开提供了一种显示出提高的量子效率的图像传感器装置。例如，提供了背面照明（BSI）图像传感器装置，其包括具有前表面和后表面的基板; 设置在所述基板的前表面的感光区域; 以及设置在基板的背面上的抗反射层。当在小于700nm的波长下测量时，抗反射层的折射率大于或等于约2.2，消光系数小于或等于约0.05。

15. 发明授权

US08344343B2 Composite film for phase change memory devices 有权
标题翻译：用于相变存储器件的复合膜
公开(公告)号：US08344343B2
公开(公告)日：2013-01-01
申请号：US12750323
申请日：2010-03-30
申请人： Tung-Ti Yeh , Neng-Kuo Chen , Cheng-Yuan Tsai , Chung-Yi Yu , Chia-Shiung Tsai
发明人： Tung-Ti Yeh , Neng-Kuo Chen , Cheng-Yuan Tsai , Chung-Yi Yu , Chia-Shiung Tsai
IPC分类号： H01L29/04 , H01L29/02 , H01L47/00 , H01L21/06
CPC分类号： H01L45/1226 , H01L45/06 , H01L45/144 , H01L45/1675
摘要： A phase change memory device and a method of manufacture are provided. The phase change memory device includes a phase change layer electrically coupled to a top electrode and a bottom electrode, the phase change layer comprising a phase change material. A mask layer is formed overlying the phase change layer. A first sealing layer is formed overlying the mask layer, and a second sealing layer is formed overlying the first sealing layer.
摘要翻译：提供了一种相变存储器件及其制造方法。相变存储器件包括电耦合到顶电极和底电极的相变层，所述相变层包括相变材料。掩模层形成在相变层上。形成覆盖在掩模层上的第一密封层，并且形成覆盖在第一密封层上的第二密封层。

16. 发明授权

US08173516B2 Method of forming shallow trench isolation structure 有权
标题翻译：形成浅沟槽隔离结构的方法
公开(公告)号：US08173516B2
公开(公告)日：2012-05-08
申请号：US12703979
申请日：2010-02-11
申请人： Neng-Kuo Chen , Kuo-Hwa Tzeng , Cheng-Yuan Tsai
发明人： Neng-Kuo Chen , Kuo-Hwa Tzeng , Cheng-Yuan Tsai
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： An embodiment of the disclosure includes a method of forming a shallow trench isolation structure. A substrate is provided. The substrate includes a top surface. A trench is formed extending from the top surface into the substrate. The trench has sidewalls and a bottom surface. A liner oxide layer is formed on the sidewalls and the bottom surface. The liner oxide layer is treated in a plasma environment comprises at least one of NF3, F2, and BF2. The trench is filled with a dielectric layer.
摘要翻译：本公开的实施例包括形成浅沟槽隔离结构的方法。提供基板。衬底包括顶表面。从顶表面延伸到衬底中形成沟槽。沟槽具有侧壁和底面。衬里氧化物层形成在侧壁和底表面上。在等离子体环境中处理衬里氧化物层包括NF3，F2和BF2中的至少一种。沟槽填充有介电层。

17. 发明申请

US20120038015A1 ANTIREFLECTIVE LAYER FOR BACKSIDE ILLUMINATED IMAGE SENSOR AND METHOD OF MANUFACTURING SAME 有权
标题翻译：背面照明图像传感器的反射层及其制造方法
公开(公告)号：US20120038015A1
公开(公告)日：2012-02-16
申请号：US12890913
申请日：2010-09-27
申请人： Chih-Hui Huang , Cheng-Yuan Tsai , Yeur-Luen Tu , Chia-Shiung Tsai , Dun-Nian Yaung , Jen-Cheng Liu
发明人： Chih-Hui Huang , Cheng-Yuan Tsai , Yeur-Luen Tu , Chia-Shiung Tsai , Dun-Nian Yaung , Jen-Cheng Liu
IPC分类号： H01L31/0216
CPC分类号： H01L27/1464 , H01L27/14625 , H01L27/14685
摘要： The present disclosure provides an image sensor device that exhibits improved quantum efficiency. For example, a backside illuminated (BSI) image sensor device is provided that includes a substrate having a front surface and a back surface; a light sensing region disposed at the front surface of the substrate; and an antireflective layer disposed over the back surface of the substrate. The antireflective layer has an index of refraction greater than or equal to about 2.2 and an extinction coefficient less than or equal to about 0.05 when measured at a wavelength less than 700 nm.
摘要翻译：本公开提供了一种显示出提高的量子效率的图像传感器装置。例如，提供了背面照明（BSI）图像传感器装置，其包括具有前表面和后表面的基板; 设置在所述基板的前表面的感光区域; 以及设置在基板的背面上的抗反射层。当在小于700nm的波长下测量时，抗反射层的折射率大于或等于约2.2，消光系数小于或等于约0.05。

18. 发明申请

US20120028473A1 Method of Reducing Delamination in the Fabrication of Small-Pitch Devices 有权
标题翻译：减小小间距器件制造中分层的方法
公开(公告)号：US20120028473A1
公开(公告)日：2012-02-02
申请号：US13253694
申请日：2011-10-05
申请人： Chih-Yu Lai , Cheng-Ta Wu , Neng-Kuo Chen , Cheng-Yuan Tsai
发明人： Chih-Yu Lai , Cheng-Ta Wu , Neng-Kuo Chen , Cheng-Yuan Tsai
IPC分类号： H01L21/302
CPC分类号： H01L21/0337
摘要： A method of forming an integrated circuit structure includes providing a substrate; forming a first hard mask layer over the substrate; forming a second hard mask layer over the first hard mask layer; patterning the second hard mask layer to form a hard mask; and, after the step of patterning the second hard mask layer, baking the substrate, the first hard mask layer, and the hard mask. After the step of baking, a spacer layer is formed, which includes a first portion on a top of the hard mask, and a second portion and a third portion on opposite sidewalls of the hard mask. The method further includes removing the first portion of the spacer layer; removing the hard mask; and using the second portion and the third portion of the spacer layer as masks to pattern the first hard mask layer.
摘要翻译：形成集成电路结构的方法包括提供基板; 在衬底上形成第一硬掩模层; 在所述第一硬掩模层上形成第二硬掩模层; 图案化第二硬掩模层以形成硬掩模; 并且在图案化第二硬掩模层的步骤之后，烘烤基板，第一硬掩模层和硬掩模。在烘烤步骤之后，形成间隔层，其包括在硬掩模的顶部上的第一部分和硬掩模的相对侧壁上的第二部分和第三部分。该方法还包括去除间隔层的第一部分; 去除硬面膜; 并且使用间隔层的第二部分和第三部分作为掩模来对第一硬掩模层进行图案化。

19. 发明申请

US20100270604A1 Non-Volatile Memories and Methods of Fabrication Thereof 有权
标题翻译：非易失性记忆及其制作方法
公开(公告)号：US20100270604A1
公开(公告)日：2010-10-28
申请号：US12714194
申请日：2010-02-26
申请人： Chih-Wei Lin , Yi-Fang Lee , Cheng-Ta Wu , Cheng-Yuan Tsai
发明人： Chih-Wei Lin , Yi-Fang Lee , Cheng-Ta Wu , Cheng-Yuan Tsai
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/788 , H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/513 , H01L29/7881
摘要： Non-volatile memories and methods of fabrication thereof are described. In one embodiment, a method of fabricating a semiconductor device includes forming an oxide layer over a semiconductor substrate, and exposing the oxide layer to a first nitridation step to form a first nitrogen rich region. The first nitrogen rich region is disposed adjacent an interface between the oxide layer and the semiconductor substrate. After the first nitridation step, the oxide layer is exposed to a second nitridation step to form a second nitrogen rich region. A first gate electrode is formed on the oxide layer, wherein the second nitrogen rich region is disposed adjacent an interface between the oxide layer and the first gate electrode.
摘要翻译：描述了非易失性存储器及其制造方法。在一个实施例中，制造半导体器件的方法包括在半导体衬底上形成氧化物层，并将氧化物层暴露于第一氮化步骤以形成第一富氮区域。第一富氮区域设置在氧化物层和半导体衬底之间的界面附近。在第一次氮化步骤之后，将氧化物层暴露于第二氮化步骤以形成第二富氮区域。第一栅电极形成在氧化物层上，其中第二富氮区邻近氧化物层和第一栅电极之间的界面设置。

20. 发明授权

US07655532B1 STI film property using SOD post-treatment 有权
标题翻译： STI膜性质采用SOD后处理
公开(公告)号：US07655532B1
公开(公告)日：2010-02-02
申请号：US12179892
申请日：2008-07-25
申请人： Neng-Kuo Chen , Kuo-Hwa Tzeng , Cheng-Yuan Tsai
发明人： Neng-Kuo Chen , Kuo-Hwa Tzeng , Cheng-Yuan Tsai
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , H01L21/02164 , H01L21/02222 , H01L21/02282 , H01L21/02337 , H01L21/3105 , H01L21/3125 , H01L21/316
摘要： A method of forming a shallow trench isolation region includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; filling a precursor into the opening using spin-on; performing a steam cure to the precursor to generate a dielectric material; after the steam cure, performing a chemical mechanical polish (CMP) to the dielectric material; and after the CMP, performing a steam anneal to the dielectric material.
摘要翻译：形成浅沟槽隔离区域的方法包括提供包括顶表面的半导体衬底; 形成从所述顶表面延伸到所述半导体衬底中的开口; 使用旋转将前体填充到开口中; 对前体进行蒸汽固化以产生电介质材料; 在蒸汽固化之后，对电介质材料进行化学机械抛光（CMP）; 并且在CMP之后，对电介质材料进行蒸汽退火。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式