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    • 18. 发明申请
    • Low Latency, High Bandwidth Data Communications Between Compute Nodes in a Parallel Computer
    • 并行计算机中计算节点之间的低延迟,高带宽数据通信
    • US20080281997A1
    • 2008-11-13
    • US11746333
    • 2007-05-09
    • Charles J. ArcherMichael A. BlocksomeJoseph D. RattermanBrian E. Smith
    • Charles J. ArcherMichael A. BlocksomeJoseph D. RattermanBrian E. Smith
    • G06F13/28
    • G06F13/4269
    • Methods, parallel computers, and computer program products are disclosed for low latency, high bandwidth data communications between compute nodes in a parallel computer. Embodiments include receiving, by an origin direct memory access (‘DMA’) engine of an origin compute node, data for transfer to a target compute node; sending, by the origin DMA engine of the origin compute node to a target DMA engine on the target compute node, a request to send (‘RTS’) message; transferring, by the origin DMA engine, a predetermined portion of the data to the target compute node using memory FIFO operation; determining, by the origin DMA engine whether an acknowledgement of the RTS message has been received from the target DMA engine; if the an acknowledgement of the RTS message has not been received, transferring, by the origin DMA engine, another predetermined portion of the data to the target compute node using a memory FIFO operation; and if the acknowledgement of the RTS message has been received by the origin DMA engine, transferring, by the origin DMA engine, any remaining portion of the data to the target compute node using a direct put operation.
    • 公开了并行计算机和计算机程序产品的方法,用于并行计算机中的计算节点之间的低延迟,高带宽数据通信。 实施例包括通过原始计算节点的原始直接存储器访问(“DMA”)引擎接收用于传送到目标计算节点的数据; 由原始计算节点的原始DMA引擎发送到目标计算节点上的目标DMA引擎,发送('RTS')消息的请求; 由原始DMA引擎使用存储器FIFO操作将预定部分的数据传送到目标计算节点; 由原始DMA引擎确定是否从目标DMA引擎接收到RTS消息的确认; 如果尚未接收到RTS消息的确认,则由原始DMA引擎使用存储器FIFO操作将另一预定部分的数据传送到目标计算节点; 并且如果原始DMA引擎已经接收到RTS消息的确认,则由原始DMA引擎使用直接放置操作将数据的剩余部分传送到目标计算节点。