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    • 13. 发明申请
    • Camera module
    • 相机模块
    • US20080278608A1
    • 2008-11-13
    • US12149611
    • 2008-05-05
    • Byung Hoon KimWon Tae Choi
    • Byung Hoon KimWon Tae Choi
    • H04N5/217
    • H04N5/357H04N5/2258
    • There is provided a camera module including dual image sensors used for different purposes, which corrects optical defects of images imaged by the dual image sensors individually to suit purposes and processes the imaged images into image signals. The camera module includes: a plurality of image sensors imaging images with different optical properties from one another; a plurality of auxiliary image processors electrically connected to the plurality of image sensors, individually, the auxiliary image processors correcting different optical defects of the images from corresponding ones of the image sensors, respectively; and an image signal processing part selecting at least one of corrected images from the auxiliary image processors to process into an image signal capable of being displayed.
    • 提供了一种包括用于不同目的的双重图像传感器的相机模块,其单独校正由双图像传感器成像的图像的光学缺陷,以适应目的并将成像的图像处理成图像信号。 相机模块包括:对彼此具有不同光学特性的图像成像的多个图像传感器; 多个辅助图像处理器分别电连接到多个图像传感器,辅助图像处理器分别从对应的图像传感器校正图像的不同光学缺陷; 以及图像信号处理部分,从辅助图像处理器中选择校正图像中的至少一个,以处理能够显示的图像信号。
    • 14. 发明授权
    • Output buffer circuit
    • 输出缓冲电路
    • US07414441B2
    • 2008-08-19
    • US11422568
    • 2006-06-06
    • Youn Joong LeeWon Tae ChoiChan Woo ParkByung Hoon Kim
    • Youn Joong LeeWon Tae ChoiChan Woo ParkByung Hoon Kim
    • H03K3/00
    • H03F3/347H03F1/301H03F1/303H03F3/45753H03F2203/45212
    • An output buffer circuit includes an input stage of which one end receives an input voltage and the other end receives an output voltage; a class AB output stage that increases a current flowing in the output stage when the difference between the input and output voltages is larger than 0; a floating current source that biases the class AB output stage; a summing circuit that is connected to the input stage, the floating current source, and the class AB output stage so as to sum up the current supplied from the input stage and the internal current supplied from the floating current source; and an offset compensating circuit that is connected to the input stage and is composed of a plurality of switching elements and resistors so as to detect an offset voltage to compensate.
    • 输出缓冲电路包括输入级,其一端接收输入电压,另一端接收输出电压; AB类输出级,当输入和输出电压之间的差大于0时,增加在输出级中流动的电流; 偏置AB类输出级的浮动电流源; 连接到输入级,浮动电流源和AB类输出级的求和电路,以便对从输入级提供的电流和从浮动电流源提供的内部电流求和; 以及偏移补偿电路,其连接到输入级,并且由多个开关元件和电阻器组成,以便检测偏移电压以进行补偿。
    • 15. 发明授权
    • Three-dimensional nanodevices including nanostructures
    • 包括纳米结构在内的三维纳米器件
    • US08263964B2
    • 2012-09-11
    • US12672995
    • 2008-05-19
    • Han Young YuByung Hoon KimAn Soon KimIn Bok BaekChil Seong AhJong Heon YangChan Woo ParkChang Geun Ahn
    • Han Young YuByung Hoon KimAn Soon KimIn Bok BaekChil Seong AhJong Heon YangChan Woo ParkChang Geun Ahn
    • H01L29/06
    • H01J49/4205B81B7/0025B81B2201/0214B81B2201/0271B82Y10/00B82Y40/00G01N2291/0257H01J49/0018H01L29/0673H01L29/7613H01L29/775H03H2009/02314
    • Provided are three-dimensional (3D) nanodevices including 3D nanostructures. The 3D nanodevice includes at least one nanostructure, each nanostructure including an oscillation portion floating over a substrate and support portions for supporting both lengthwise end portions of the oscillation portion, supports disposed on the substrate to support the support portions of each of the nanostructures, at least one controller disposed at an upper portion of the substrate, a lower portion of the substrate, or both the upper and lower portions of the substrate to control each of the nanostructures, and a sensing unit disposed on each of the oscillation portions to sense an externally supplied adsorption material. Thus, unlike in a typical planar device, generation of impurities between a nanodevice and a substrate can be reduced, and mechanical vibration can be caused. In particular, since 3D nanostructures have mechanical and electrical characteristics, 3D nanodevices including new 3D nanostructures can be provided using nano-electro-mechanical systems (NEMS). Also, a single electron device, a spin device, or a single electron transistor (SET)-field effect transistor (FET) hybrid device can be formed using a simple process unlike in planar devices.
    • 提供了三维(3D)纳米器件,包括3D纳米结构。 3D纳米装置包括至少一个纳米结构,每个纳米结构包括漂浮在基板上的振荡部分和支撑部分,用于支撑振荡部分的两个纵向端部,支撑件设置在基板上以支撑每个纳米结构的支撑部分, 设置在基板的上部,基板的下部或基板的上部和下部的至少一个控制器,以控制每个纳米结构;以及感测单元,设置在每个振荡部分上以感测 外部供应的吸附材料。 因此,与典型的平面器件不同,可以减少纳米器件与衬底之间的杂质的产生,并且可能引起机械振动。 特别地,由于3D纳米结构具有机械和电学特性,可以使用纳米机电系统(NEMS)提供包括新的3D纳米结构的3D纳米器件。 此外,可以使用与平面器件不同的简单工艺来形成单电子器件,自旋器件或单电子晶体管(SET)场效应晶体管(FET)混合器件。
    • 16. 发明申请
    • THREE-DIMENSIONAL NANODEVICES INCLUDING NANOSTRUCTURES
    • 包括纳米结构的三维纳米器件
    • US20110193052A1
    • 2011-08-11
    • US12672995
    • 2008-05-19
    • Han Young YuByung Hoon KimAn Soon KimIn Bok BaekChil Seong AhJong Heon YangChan Woo ParkChang Geun Ahn
    • Han Young YuByung Hoon KimAn Soon KimIn Bok BaekChil Seong AhJong Heon YangChan Woo ParkChang Geun Ahn
    • H01L29/06B82Y99/00
    • H01J49/4205B81B7/0025B81B2201/0214B81B2201/0271B82Y10/00B82Y40/00G01N2291/0257H01J49/0018H01L29/0673H01L29/7613H01L29/775H03H2009/02314
    • Provided are three-dimensional (3D) nanodevices including 3D nanostructures. The 3D nanodevice includes at least one nanostructure, each nanostructure including an oscillation portion floating over a substrate and support portions for supporting both lengthwise end portions of the oscillation portion, supports disposed on the substrate to support the support portions of each of the nanostructures, at least one controller disposed at an upper portion of the substrate, a lower portion of the substrate, or both the upper and lower portions of the substrate to control each of the nanostructures, and a sensing unit disposed on each of the oscillation portions to sense an externally supplied adsorption material. Thus, unlike in a typical planar device, generation of impurities between a nanodevice and a substrate can be reduced, and mechanical vibration can be caused. In particular, since 3D nanostructures have mechanical and electrical characteristics, 3D nanodevices including new 3D nanostructures can be provided using nano-electro-mechanical systems (NEMS). Also, a single electron device, a spin device, or a single electron transistor (SET)-field effect transistor (FET) hybrid device can be formed using a simple process unlike in planar devices.
    • 提供了三维(3D)纳米器件,包括3D纳米结构。 3D纳米装置包括至少一个纳米结构,每个纳米结构包括漂浮在基板上的振荡部分和支撑部分,用于支撑振荡部分的两个纵向端部,支撑件设置在基板上以支撑每个纳米结构的支撑部分, 设置在基板的上部,基板的下部或基板的上部和下部的至少一个控制器,以控制每个纳米结构;以及感测单元,设置在每个振荡部分上以感测 外部供应的吸附材料。 因此,与典型的平面器件不同,可以减少纳米器件与衬底之间的杂质的产生,并且可能引起机械振动。 特别地,由于3D纳米结构具有机械和电学特性,可以使用纳米机电系统(NEMS)提供包括新的3D纳米结构的3D纳米器件。 此外,可以使用与平面器件不同的简单工艺来形成单电子器件,自旋器件或单电子晶体管(SET)场效应晶体管(FET)混合器件。
    • 17. 发明授权
    • Digital/analog converter
    • 数字/模拟转换器
    • US07646321B2
    • 2010-01-12
    • US12023805
    • 2008-01-31
    • Byung Hoon KimWon Tae Choi
    • Byung Hoon KimWon Tae Choi
    • H03M1/66
    • H03M1/0863H03M1/682H03M1/765
    • Provided is a digital/analog converter including a voltage dividing unit that includes a plurality of voltage dividing elements and divides a reference voltage by voltage division; a first decoder that selects a plurality of voltages among the voltages divided by the voltage dividing unit; a first voltage output unit that is connected to nodes among adjacent voltage dividing elements of the voltage dividing unit and the first decoder, and outputs a plurality of voltages selected by the first decoder; a second decoder that selects any one of the plurality of voltages output from the first voltage output unit; and a second voltage output unit that is connected to the first voltage output unit and the second decoder and outputs the voltage selected by the second decoder.
    • 提供一种数字/模拟转换器,包括:分压单元,其包括多个分压元件,并通过分压划分参考电压; 第一解码器,其选择由所述分压单元分压的电压中的多个电压; 第一电压输出单元,连接到分压单元和第一解码器的相邻分压元件之间的节点,并输出由第一解码器选择的多个电压; 第二解码器,其选择从所述第一电压输出单元输出的所述多个电压中的任一个; 以及第二电压输出单元,其连接到所述第一电压输出单元和所述第二解码器,并输出由所述第二解码器选择的电压。
    • 18. 发明授权
    • Output buffer circuit
    • 输出缓冲电路
    • US07482845B2
    • 2009-01-27
    • US11469219
    • 2006-08-31
    • Youn Joong LeeWon Tae ChoiChan Woo ParkByung Hoon Kim
    • Youn Joong LeeWon Tae ChoiChan Woo ParkByung Hoon Kim
    • H03B1/00
    • H03F3/45219H03F3/3022H03F3/45183H03F2203/45118H03F2203/45248H03F2203/45366H03F2203/45536H03F2203/45626
    • Provided is an output buffer circuit having a slew rate increasing part configured with a switching element. The output buffer circuit can obtain an output voltage having a high slew rate even though a smaller amount of a bias current than that required in a conventional output buffer is used. Therefore, the output buffer circuit can reduce power consumption. In the output buffer circuit with a compensation capacitive load, an input part has two input terminal receiving differential input voltage signals, and an output part increases a gain of the differential input voltages. A current source biases the output part, and a slew rate increasing part is connected to the output part and the compensation capacitive load. The slew rate increasing part includes a switching element to increase a slew rate of the output buffer circuit.
    • 提供一种具有由开关元件构成的压摆率增加部分的输出缓冲器电路。 即使使用比常规输出缓冲器中所需的偏置电流更小的量,输出缓冲器电路也可以获得具有高转换速率的输出电压。 因此,输出缓冲电路可以降低功耗。 在具有补偿容性负载的输出缓冲电路中,输入部分具有两个输入端接收差分输入电压信号,输出部分增加差分输入电压的增益。 电流源偏置输出部分,并且转换速率增加部分连接到输出部分和补偿电容性负载。 压摆率增加部分包括提高输出缓冲电路的转换速率的开关元件。