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11. 发明授权

US07989033B2 Silicon precursors to make ultra low-K films with high mechanical properties by plasma enhanced chemical vapor deposition 有权
标题翻译：通过等离子体增强化学气相沉积制备具有高机械性能的超低K膜的硅前体
公开(公告)号：US07989033B2
公开(公告)日：2011-08-02
申请号：US12183915
申请日：2008-07-31
申请人： Kang Sub Yim , Alexandros T. Demos
发明人： Kang Sub Yim , Alexandros T. Demos
IPC分类号： C23C16/00 , B05D3/00 , B29C71/02 , B29C71/04 , C04B41/00 , C08J7/18
CPC分类号： C23C16/401 , C23C16/56
摘要： A method for depositing a low dielectric constant film on a substrate is provided. The low dielectric constant film is deposited by a process comprising reacting one or more organosilicon compounds and a porogen and then post-treating the film to create pores in the film. The one or more organosilicon compounds include compounds that have the general structure Si—CX—Si or —Si—O—(CH2)n—O—Si—. Low dielectric constant films provided herein include films that include Si—CX—Si bonds both before and after the post-treatment of the films. The low dielectric constant films have good mechanical and adhesion properties, and a desirable dielectric constant.
摘要翻译：提供了一种在基片上沉积低介电常数膜的方法。低介电常数膜通过包括使一种或多种有机硅化合物和致孔剂反应的方法沉积，然后对膜进行后处理以在膜中产生孔。一种或多种有机硅化合物包括具有通式结构Si-CX-Si或-Si-O-（CH2）n-O-Si-的化合物。本文提供的低介电常数膜包括在膜的后处理之前和之后包括Si-CX-Si键的膜。低介电常数膜具有良好的机械和粘附性能以及期望的介电常数。

12. 发明授权

US07879683B2 Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay 有权
标题翻译：在电介质层中产生气隙以减少RC延迟的方法和装置
公开(公告)号：US07879683B2
公开(公告)日：2011-02-01
申请号：US11869396
申请日：2007-10-09
申请人： Amir Al-Bayati , Alexandros T. Demos , Kang Sub Yim , Mehul Naik , Zhenjiang “David” Cui , Mihaela Balseanu , Meiyee (Maggie Le) Shek , Li-Qun Xia
发明人： Amir Al-Bayati , Alexandros T. Demos , Kang Sub Yim , Mehul Naik , Zhenjiang “David” Cui , Mihaela Balseanu , Meiyee (Maggie Le) Shek , Li-Qun Xia
IPC分类号： H01L21/76
CPC分类号： H01L21/7682 , H01L21/3105 , H01L21/31111 , H01L21/31144 , H01L21/76825 , H01L21/76834 , H01L21/76849 , H01L21/76885
摘要： A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.
摘要翻译：一种用于在互连结构的电介质材料中产生气隙的方法和装置。一个实施例提供了一种用于形成半导体结构的方法，包括在衬底上沉积第一介电层，在第一介电层中形成沟槽，用导电材料填充沟槽，平坦化导电材料以暴露第一介电层，在导电材料和暴露的第一电介质层上的阻挡膜，在介电阻挡膜上沉积硬掩模层，在介电阻挡膜和硬掩模层中形成图案，以暴露衬底的选定区域，氧化至少一部分在衬底的选定区域中的第一介电层，去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽，以及在反向沟槽中形成气隙，同时在反向沟槽中沉积第二电介质材料。

13. 发明授权

US07611996B2 Multi-stage curing of low K nano-porous films 有权
标题翻译：低K纳米多孔膜的多阶段固化
公开(公告)号：US07611996B2
公开(公告)日：2009-11-03
申请号：US11085416
申请日：2005-03-21
申请人： Francimar Schmitt , Yi Zheng , Kang Sub Yim , Sang H. Ahn , Lester A. D'Cruz , Dustin W. Ho , Alexandros T. Demos , Li-Qun Xia , Derek R. Witty , Hichem M'Saad
发明人： Francimar Schmitt , Yi Zheng , Kang Sub Yim , Sang H. Ahn , Lester A. D'Cruz , Dustin W. Ho , Alexandros T. Demos , Li-Qun Xia , Derek R. Witty , Hichem M'Saad
IPC分类号： H01L21/469 , H01L21/31
CPC分类号： H01L21/76825 , C23C16/401 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02208 , H01L21/02274 , H01L21/02304 , H01L21/02351 , H01L21/02362 , H01L21/3105 , H01L21/3121 , H01L21/31695 , H01L21/76811 , H01L21/76813 , H01L21/7682 , H01L2221/1047 , Y10T428/249978
摘要： Embodiments in accordance with the present invention relate to multi-stage curing processes for chemical vapor deposited low K materials. In certain embodiments, a combination of electron beam irradiation and thermal exposure steps may be employed to control selective outgassing of porogens incorporated into the film, resulting in the formation of nanopores. In accordance with one specific embodiment, a low K layer resulting from reaction between a silicon-containing component and a non-silicon containing component featuring labile groups, may be cured by the initial application of thermal energy, followed by the application of radiation in the form of an electron beam.
摘要翻译：根据本发明的实施方案涉及用于化学气相沉积的低K材料的多阶段固化方法。在某些实施方案中，可以采用电子束照射和热暴露步骤的组合来控制掺入薄膜中的孔原子的选择性除气，从而形成纳米孔。根据一个具体实施方案，由含硅组分和含有不稳定基团的不含硅组分之间的反应产生的低K层可以通过初始施加热能来固化，随后在形式的电子束。

14. 发明申请

US20090017231A1 NOVEL SILICON PRECURSORS TO MAKE ULTRA LOW-K FILMS WITH HIGH MECHANICAL PROPERTIES BY PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION 有权
标题翻译：通过等离子体增强化学蒸气沉积法制造具有高机械性能的超低K膜的新型硅前驱体
公开(公告)号：US20090017231A1
公开(公告)日：2009-01-15
申请号：US12183915
申请日：2008-07-31
申请人： Kang Sub Yim , Alexandros T. Demos
发明人： Kang Sub Yim , Alexandros T. Demos
IPC分类号： H05H1/24
CPC分类号： C23C16/401 , C23C16/56
摘要： A method for depositing a low dielectric constant film on a substrate is provided. The low dielectric constant film is deposited by a process comprising reacting one or more organosilicon compounds and a porogen and then post-treating the film to create pores in the film. The one or more organosilicon compounds include compounds that have the general structure Si—CX—Si or —Si—O—(CH2)n—O—Si—. Low dielectric constant films provided herein include films that include Si—CX—Si bonds both before and after the post-treatment of the films. The low dielectric constant films have good mechanical and adhesion properties, and a desirable dielectric constant.
摘要翻译：提供了一种在基片上沉积低介电常数膜的方法。低介电常数膜通过包括使一种或多种有机硅化合物和致孔剂反应的方法沉积，然后对膜进行后处理以在膜中产生孔。一种或多种有机硅化合物包括具有通式结构Si-CX-Si或-Si-O-（CH2）n-O-Si-的化合物。本文提供的低介电常数膜包括在膜的后处理之前和之后包括Si-CX-Si键的膜。低介电常数膜具有良好的机械和粘附性能以及期望的介电常数。

15. 发明申请

US20110206857A1 ULTRA LOW DIELECTRIC MATERIALS USING HYBRID PRECURSORS CONTAINING SILICON WITH ORGANIC FUNCTIONAL GROUPS BY PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION 审中-公开
标题翻译：超级低介电材料使用含有有机功能组合物的混合前驱体通过等离子体增强化学气相沉积
公开(公告)号：US20110206857A1
公开(公告)日：2011-08-25
申请号：US13028823
申请日：2011-02-16
申请人： Kang Sub Yim , Alexandros T. Demos
发明人： Kang Sub Yim , Alexandros T. Demos
IPC分类号： C08F2/48 , C08F2/46
CPC分类号： H01L21/02126 , H01L21/02203 , H01L21/02211 , H01L21/02216 , H01L21/02274 , H01L21/02348 , H01L21/7681
摘要： Methods for depositing a low dielectric constant layer on a substrate are provided. In one embodiment, the method includes introducing one or more organosilicon compounds into a chamber, wherein the one or more organosilicon compounds comprise a silicon atom and a porogen component bonded to the silicon atom, reacting the one or more organosilicon compounds in the presence of RF power to deposit a low dielectric constant layer on a substrate in the chamber, and post-treating the low dielectric constant layer to substantially remove the porogen component from the low dielectric constant layer. Optionally, an inert carrier gas, an oxidizing gas, or both may be introduced into the processing chamber with the one or more organosilicon compounds. The post-treatment process may be an ultraviolet radiation cure of the deposited material. The UV cure process may be used concurrently or serially with a thermal or e-beam curing process. The low dielectric constant layers have good mechanical properties and a desirable dielectric constant.
摘要翻译：提供了在基片上沉积低介电常数层的方法。在一个实施方案中，所述方法包括将一种或多种有机硅化合物引入室中，其中所述一种或多种有机硅化合物包含与硅原子键合的硅原子和致孔剂组分，在RF存在下使所述一种或多种有机硅化合物反应在室中的基板上沉积低介电常数层的功能，并且对低介电常数层进行后处理，以从低介电常数层基本上除去致孔剂成分。任选地，可以使用一种或多种有机硅化合物将惰性载气，氧化气体或二者引入处理室。后处理过程可以是沉积材料的紫外线辐射固化。 UV固化工艺可以与热或电子束固化工艺同时使用或连续使用。低介电常数层具有良好的机械性能和所需的介电常数。

16. 发明申请

US20090093112A1 METHODS AND APPARATUS OF CREATING AIRGAP IN DIELECTRIC LAYERS FOR THE REDUCTION OF RC DELAY 有权
标题翻译：用于减少RC延迟的电介质层中产生气泡的方法和装置
公开(公告)号：US20090093112A1
公开(公告)日：2009-04-09
申请号：US11869396
申请日：2007-10-09
申请人： AMIR AL-BAYATI , Alexandros T. Demos , Kang Sub Yim , Mehul Naik , Zhenjiang 'David' Cui , Mihaela Balseanu , Meiyee (Maggie Le) Shek , Li-Qun Xia
发明人： AMIR AL-BAYATI , Alexandros T. Demos , Kang Sub Yim , Mehul Naik , Zhenjiang 'David' Cui , Mihaela Balseanu , Meiyee (Maggie Le) Shek , Li-Qun Xia
IPC分类号： H01L21/4763
CPC分类号： H01L21/7682 , H01L21/3105 , H01L21/31111 , H01L21/31144 , H01L21/76825 , H01L21/76834 , H01L21/76849 , H01L21/76885
摘要： A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.
摘要翻译：一种用于在互连结构的电介质材料中产生气隙的方法和装置。一个实施例提供了一种用于形成半导体结构的方法，包括在衬底上沉积第一介电层，在第一介电层中形成沟槽，用导电材料填充沟槽，平坦化导电材料以暴露第一介电层，在导电材料和暴露的第一电介质层上的阻挡膜，在介电阻挡膜上沉积硬掩模层，在介电阻挡膜和硬掩模层中形成图案，以暴露衬底的选定区域，氧化至少一部分在衬底的选定区域中的第一介电层，去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽，以及在反向沟槽中形成气隙，同时在反向沟槽中沉积第二电介质材料。

17. 发明申请

US20110104891A1 METHODS AND APPARATUS OF CREATING AIRGAP IN DIELECTRIC LAYERS FOR THE REDUCTION OF RC DELAY 审中-公开
标题翻译：用于减少RC延迟的电介质层中产生气泡的方法和装置
公开(公告)号：US20110104891A1
公开(公告)日：2011-05-05
申请号：US12986809
申请日：2011-01-07
申请人： AMIR AL-BAYATI , Alexandros T. Demos , Kang Sub Yim , Mehul Naik , Zhenjiang David Cui , Mihaela Balseanu , Meiyee Maggie Le Shek , Li-Qun Xia
发明人： AMIR AL-BAYATI , Alexandros T. Demos , Kang Sub Yim , Mehul Naik , Zhenjiang David Cui , Mihaela Balseanu , Meiyee Maggie Le Shek , Li-Qun Xia
IPC分类号： H01L21/768
CPC分类号： H01L21/7682 , H01L21/3105 , H01L21/31111 , H01L21/31144 , H01L21/76825 , H01L21/76834 , H01L21/76849 , H01L21/76885
摘要： A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.
摘要翻译：一种用于在互连结构的电介质材料中产生气隙的方法和装置。一个实施例提供了一种用于形成半导体结构的方法，包括在衬底上沉积第一介电层，在第一介电层中形成沟槽，用导电材料填充沟槽，平坦化导电材料以暴露第一介电层，在导电材料和暴露的第一电介质层上的阻挡膜，在介电阻挡膜上沉积硬掩模层，在介电阻挡膜和硬掩模层中形成图案，以暴露衬底的选定区域，氧化至少一部分在衬底的选定区域中的第一介电层，去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽，以及在反向沟槽中形成气隙，同时在反向沟槽中沉积第二电介质材料。

18. 发明申请

US20120121823A1 PROCESS FOR LOWERING ADHESION LAYER THICKNESS AND IMPROVING DAMAGE RESISTANCE FOR THIN ULTRA LOW-K DIELECTRIC FILM 审中-公开
标题翻译：降低粘结层厚度的方法，提高薄膜超低介电膜的耐损伤性
公开(公告)号：US20120121823A1
公开(公告)日：2012-05-17
申请号：US12945625
申请日：2010-11-12
申请人： MAHENDRA CHHABRA , Kang Sub Yim , Alexandros T. Demos
发明人： MAHENDRA CHHABRA , Kang Sub Yim , Alexandros T. Demos
IPC分类号： C23C8/06
CPC分类号： C23C16/401 , C23C8/10 , C23C16/45523 , C23C16/56
摘要： An improved method for depositing an ultra low dielectric constant film stack is provided. Embodiments of the invention minimize k (dielectric constant) impact from initial stages of depositing the ultra low dielectric constant film stack by reducing a thickness of an oxide adhesion layer in the ultra low dielectric film stack (
摘要翻译：提供了一种用于沉积超低介电常数膜堆叠的改进方法。本发明的实施例通过将超低介电膜堆叠（<2k）中的氧化物粘附层的厚度减小到大约或小于200来来最小化沉积超低介电常数膜堆叠的初始阶段的k（介电常数）冲击从而将薄膜叠层的厚度不均匀性降低到小于2％。改进的方法在较低的沉积速率和较低的等离子体密度下结合较高的总流速沉积了超低介电膜堆叠中的氧化物粘附层和本体层，从而在膜沉积期间共同沉积物质的更好的填充/排序这导致较高的机械强度和较低的孔隙率。改进的粘附层提供高粘附能量，以更好地与超低介电常数膜粘合到下面的阻挡层/衬层层上。所得到的低电介质膜具有纳米尺寸的孔和更紧密的孔径分布，产生介电常数为约2.5或更小的低介电常数膜。

19. 发明授权

US07998536B2 Silicon precursors to make ultra low-K films of K<2.2 with high mechanical properties by plasma enhanced chemical vapor deposition 有权
标题翻译：通过等离子体增强化学气相沉积法制备具有高机械性能的K <2.2的超低K膜的硅前体
公开(公告)号：US07998536B2
公开(公告)日：2011-08-16
申请号：US11777185
申请日：2007-07-12
申请人： Kang Sub Yim , Alexandros T. Demos
发明人： Kang Sub Yim , Alexandros T. Demos
IPC分类号： C23C16/00 , B05D3/00 , B29C71/02 , B29C71/04 , C04B41/00 , C08J7/18
CPC分类号： C23C16/401 , C23C16/56
摘要： A method for depositing a low dielectric constant film on a substrate is provided. The low dielectric constant film is deposited by a process comprising reacting one or more organosilicon compounds and a porogen and then post-treating the film to create pores in the film. The one or more organosilicon compounds include compounds that have the general structure Si—CX—Si or —Si—O—(CH2)n—O—Si—. Low dielectric constant films provided herein include films that include Si—CX—Si bonds both before and after the post-treatment of the films. The low dielectric constant films have good mechanical and adhesion properties, and a desirable dielectric constant.
摘要翻译：提供了一种在基片上沉积低介电常数膜的方法。低介电常数膜通过包括使一种或多种有机硅化合物和致孔剂反应的方法沉积，然后对膜进行后处理以在膜中产生孔。一种或多种有机硅化合物包括具有通式结构Si-CX-Si或-Si-O-（CH2）n-O-Si-的化合物。本文提供的低介电常数膜包括在膜的后处理之前和之后包括Si-CX-Si键的膜。低介电常数膜具有良好的机械和粘附性能以及期望的介电常数。

20. 发明申请

US20090017639A1 NOVEL SILICON PRECURSORS TO MAKE ULTRA LOW-K FILMS OF K<2.2 WITH HIGH MECHANICAL PROPERTIES BY PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION 有权
标题翻译：通过等离子体增强化学蒸气沉积法制备具有高机械性能的K <2.2的超低K膜的新型硅前驱体
公开(公告)号：US20090017639A1
公开(公告)日：2009-01-15
申请号：US11777185
申请日：2007-07-12
申请人： Kang Sub Yim , Alexandros T. Demos
发明人： Kang Sub Yim , Alexandros T. Demos
IPC分类号： H01L21/31
CPC分类号： C23C16/401 , C23C16/56
摘要： A method for depositing a low dielectric constant film on a substrate is provided. The low dielectric constant film is deposited by a process comprising reacting one or more organosilicon compounds and a porogen and then post-treating the film to create pores in the film. The one or more organosilicon compounds include compounds that have the general structure Si—CX—Si or —Si—O—(CH2)n—O—Si—. Low dielectric constant films provided herein include films that include Si—CX—Si bonds both before and after the post-treatment of the films. The low dielectric constant films have good mechanical and adhesion properties, and a desirable dielectric constant.
摘要翻译：提供了一种在基片上沉积低介电常数膜的方法。低介电常数膜通过包括使一种或多种有机硅化合物和致孔剂反应的方法沉积，然后对膜进行后处理以在膜中产生孔。一种或多种有机硅化合物包括具有通式结构Si-CX-Si或-Si-O-（CH2）n-O-Si-的化合物。本文提供的低介电常数膜包括在膜的后处理之前和之后包括Si-CX-Si键的膜。低介电常数膜具有良好的机械和粘附性能以及期望的介电常数。

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