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11. 发明授权

US6127025A Circuit board with wiring sealing filled holes 失效
公开(公告)号：US6127025A
公开(公告)日：2000-10-03
申请号：US21772
申请日：1998-03-10
申请人： Anilkumar Chinuprasad Bhatt , Donald Herman Glatzel , Allen F. Moring , Voya Rista Markovich , Kostas Papathomas , David John Russell
发明人： Anilkumar Chinuprasad Bhatt , Donald Herman Glatzel , Allen F. Moring , Voya Rista Markovich , Kostas Papathomas , David John Russell
IPC分类号： H05K1/11 , H05K3/00 , H05K3/02 , H05K3/24 , H05K3/40 , H05K3/42 , H05K3/46 , B32B15/00
CPC分类号： H05K3/4652 , H05K1/113 , H05K3/4069 , H05K3/4602 , H01L2224/48091 , H01L2224/73204 , H01L2924/12044 , H05K2201/0347 , H05K2201/0355 , H05K2201/092 , H05K2201/0959 , H05K2203/0191 , H05K2203/025 , H05K2203/0278 , H05K2203/0338 , H05K2203/0554 , H05K3/0023 , H05K3/0094 , H05K3/025 , H05K3/246 , H05K3/429 , Y10S428/901 , Y10T29/49126 , Y10T29/4913 , Y10T29/49139 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917 , Y10T428/24926 , Y10T428/24942 , Y10T428/249996
摘要： Circuit boards are manufactured by forming a substrate with a dielectric surface, laminating a metal foil and a peelable film to the substrate, and forming holes in the substrate through the peelable film and foil. A filler material with an organic base may be filled with electroconductive particles or dielectric thermoconductive particles. The filler material is deposited onto a sacrificial carrier and the filler material is heated to at least partially cure it. The filler material is laminated onto the peelable film with sufficient heat and pressure to force the filler material to fill the holes. For thermoconductive filler the holes are filled sufficient for electrical connection through the holes. The peelable layer, sacrificial carrier and filler material remaining therebetween are peeled off the copper foil. The filler material is abraded to the level of the foil and is then copper plated. The copper is patterned to form a wiring layer. A permanent dielectric photoresist layer is formed over the wiring layer and via holes are formed through the photoimagable dielectric over pads and conductors of the wiring layer. Holes are formed through the substrate and the photoimagable dielectric, walls of the via holes, and walls of the through holes are copper plated. The copper plating on the photoimagable dielectric is patterned to form an exterior wiring layer which is covered by solder resist with windows over lands around the through holes and surface mount connection pads of the exterior wiring layer to form a high density circuitized substrate. Surface mount components and/or pin in hole components are attached to the circuitized substrate with solder joints between terminals of the components and the lands and/or connection pads to form a high density circuit board assembly. One or more of the circuit board assemblies are mounted in an enclosure with a power supply, CPU, RAM, and I/O means to form an improved information handling system with increased performance due to shorter signal flight times due to the high component density.

12. 发明授权

US6000129A Process for manufacturing a circuit with filled holes 失效
标题翻译：用于制造具有填充孔的电路的工艺
公开(公告)号：US6000129A
公开(公告)日：1999-12-14
申请号：US41845
申请日：1998-03-12
申请人： Anilkumar Chinuprasad Bhatt , Donald Herman Glatzel , Allen F. Moring , Voya Rista Markovich , Kostas Papathomas , David John Russell
发明人： Anilkumar Chinuprasad Bhatt , Donald Herman Glatzel , Allen F. Moring , Voya Rista Markovich , Kostas Papathomas , David John Russell
IPC分类号： H05K1/11 , H05K3/00 , H05K3/02 , H05K3/24 , H05K3/40 , H05K3/42 , H05K3/46 , H01K3/10
CPC分类号： H05K3/4652 , H05K1/113 , H05K3/4069 , H05K3/4602 , H01L2224/48091 , H01L2224/73204 , H01L2924/12044 , H05K2201/0347 , H05K2201/0355 , H05K2201/092 , H05K2201/0959 , H05K2203/0191 , H05K2203/025 , H05K2203/0278 , H05K2203/0338 , H05K2203/0554 , H05K3/0023 , H05K3/0094 , H05K3/025 , H05K3/246 , H05K3/429 , Y10S428/901 , Y10T29/49126 , Y10T29/4913 , Y10T29/49139 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917 , Y10T428/24926 , Y10T428/24942 , Y10T428/249996
摘要： Circuit boards are manufactured by forming a substrate with a dielectric surface, laminating a metal foil to the substrate, and forming holes in the substrate through the foil. A filler material with an organic base may be filled with electroconductive particles or dielectric thermoconductive particles. The filler material is deposited into the holes and is heated to at least partially cure it. The surface of the filler material is seeded and electrolessly plated to form a conductive coating on the metal foil and the filler material. The coating is then patterned to form a wiring layer. A second set of holes may be formed in the circuitized substrate after the hole filling step, which are also electrolessly plated.
摘要翻译：电路板通过形成具有电介质表面的基板，将金属箔层压到基板上，并通过箔形成在基板中的孔来制造。具有有机基底的填充材料可以填充有导电颗粒或介电导热颗粒。填充材料沉积到孔中并被加热至少部分地固化。填充材料的表面接种并化学镀，以在金属箔和填料上形成导电涂层。然后将涂层图案化以形成布线层。可以在孔填充步骤之后的电路化基板中形成第二组孔，其也是无电镀的。

13. 发明授权

US5822856A Manufacturing circuit board assemblies having filled vias 失效
标题翻译：具有填充通孔的制造电路板组件
公开(公告)号：US5822856A
公开(公告)日：1998-10-20
申请号：US672292
申请日：1996-06-28
申请人： Anilkumar Chinuprasad Bhatt , Donald Herman Glatzel , Allen F. Moring , Voya Rista Markovich , Kostas Papathomas , David John Russell
发明人： Anilkumar Chinuprasad Bhatt , Donald Herman Glatzel , Allen F. Moring , Voya Rista Markovich , Kostas Papathomas , David John Russell
IPC分类号： H05K1/11 , H05K3/00 , H05K3/02 , H05K3/24 , H05K3/40 , H05K3/42 , H05K3/46 , H05K3/30
CPC分类号： H05K3/4652 , H05K1/113 , H05K3/4069 , H05K3/4602 , H01L2224/48091 , H01L2224/73204 , H01L2924/12044 , H05K2201/0347 , H05K2201/0355 , H05K2201/092 , H05K2201/0959 , H05K2203/0191 , H05K2203/025 , H05K2203/0278 , H05K2203/0338 , H05K2203/0554 , H05K3/0023 , H05K3/0094 , H05K3/025 , H05K3/246 , H05K3/429 , Y10S428/901 , Y10T29/49126 , Y10T29/4913 , Y10T29/49139 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917 , Y10T428/24926 , Y10T428/24942 , Y10T428/249996
摘要： Circuit boards are manufactured by forming a substrate with a dielectric surface, laminating a metal foil and a peelable film to the substrate, and forming holes in the substrate through the peelable film and foil. A filler material with an organic base may be filled with electroconductive particles or dielectric thermoconductive particles. The filler material is laminated onto the peelable film with sufficient heat and pressure to force the filler material to fill the holes. For thermoconductive filler the holes are filled sufficient for electrical connection through the holes. The filler material is abraded to the level of the foil and is then copper plated. The copper is patterned to form a wiring layer. A permanent dielectric photoresist layer is formed over the wiring layer and via holes are formed through the photoimageable dielectric over pads and conductors of the wiring layer. Holes are formed through the substrate and the photoimageable dielectric, walls of the via holes, and walls of the through holes are copper plated. The copper plating on the photoimageable dielectric is patterned of form an exterior wiring layer. Components and/or pins are attached to the surface of the circuitized substrate with solder joints to form a high density circuit board assembly.
摘要翻译：通过形成具有电介质表面的基板，将金属箔和可剥离膜层压到基板上，通过可剥离膜和箔形成在基板中的孔来制造电路板。具有有机基底的填充材料可以填充有导电颗粒或介电导热颗粒。填充材料以足够的热和压力层压到可剥离膜上，以迫使填充材料填充孔。对于导热填料，孔充满足以通过孔电连接。填充材料磨损到箔的水平面，然后镀铜。铜被图案化以形成布线层。在布线层之上形成永久介电光致抗蚀剂层，并且通过布线层的焊盘和导体上的可光成像电介质形成通孔。通过基板形成孔，并且可光成像的电介质，通孔的壁和通孔的壁是镀铜的。可光成像电介质上的镀铜图案化为外部布线层。组件和/或引脚通过焊接接头附接到电路化基板的表面以形成高密度电路板组件。

14. 发明授权

US06255208B1 Selective wafer-level testing and burn-in 失效
标题翻译：选择性晶圆级测试和老化
公开(公告)号：US06255208B1
公开(公告)日：2001-07-03
申请号：US09236927
申请日：1999-01-25
申请人： William Emmett Bernier , Claude Louis Bertin , Anilkumar Chinuprasad Bhatt , Michael Anthony Gaynes , Erik Leigh Hedberg , Nikhil M. Murdeshwar , Mark Vincent Pierson , William R. Tonti , Paul A. Totta , Joseph John Van Horn , Jerzy Maria Zalesinski
发明人： William Emmett Bernier , Claude Louis Bertin , Anilkumar Chinuprasad Bhatt , Michael Anthony Gaynes , Erik Leigh Hedberg , Nikhil M. Murdeshwar , Mark Vincent Pierson , William R. Tonti , Paul A. Totta , Joseph John Van Horn , Jerzy Maria Zalesinski
IPC分类号： H01L2144
CPC分类号： H01L24/12 , H01L24/11 , H01L24/16 , H01L24/29 , H01L24/83 , H01L2224/05568 , H01L2224/05573 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/1134 , H01L2224/13111 , H01L2224/13116 , H01L2224/13144 , H01L2224/13164 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/8319 , H01L2224/838 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0781 , H01L2924/09701 , H01L2924/14 , H01L2924/15747 , H01L2924/30107 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2924/3512
摘要： Selective electrical connections between an electronic component and a test substrate are made using an electrical conductive material. The conductive material of the present invention is a dissolvable material, allowing for rework and repair of a wafer at the wafer-level, and retesting at the wafer-level. In addition, the conductive material may also be used in a permanent package, since the conductive material of the present invention provides complete electrical conductivity and connection between the electronic component and the substrate.
摘要翻译：使用导电材料制成电子部件和测试基板之间的选择性电连接。本发明的导电材料是可溶解的材料，允许在晶片级对晶片进行返修和修复，并且在晶片级重新测试。此外，由于本发明的导电材料提供完整的导电性和电子元件与基片之间的连接，导电材料也可用于永久性封装。

15. 发明授权

US5953594A Method of making a circuitized substrate for chip carrier structure 失效
标题翻译：制造用于芯片载体结构的电路化基板的方法
公开(公告)号：US5953594A
公开(公告)日：1999-09-14
申请号：US820995
申请日：1997-03-20
申请人： Anilkumar Chinuprasad Bhatt , Thomas Richard Miller , Allen Frederick Moring , James Paul Walsh
发明人： Anilkumar Chinuprasad Bhatt , Thomas Richard Miller , Allen Frederick Moring , James Paul Walsh
IPC分类号： H01L21/48 , H01L23/13 , H01L23/498 , H05K1/02 , H05K1/18 , H05K3/10 , H05K3/40 , H05K3/42 , H01L21/44
CPC分类号： H05K3/403 , H01L21/481 , H01L21/486 , H01L23/13 , H01L23/49805 , H01L24/49 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49 , H01L2224/854 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/1517 , H01L2924/15787 , H01L2924/3011 , H05K1/0203 , H05K1/021 , H05K1/182 , H05K2201/09127 , H05K2203/0191 , H05K2203/0264 , H05K2203/0574 , H05K3/0061 , H05K3/108 , H05K3/427
摘要： An improved method of making a circuitized substrate which may be utilized as a chip carrier structure. The method involves the steps of providing a dielectric member and partially routing this member to define a temporary support portion therein. Metallization and circuitization may then occur, following which the temporary support portion is removed, and at least one added layer of metallization is then applied to assure an entirely conductive opening between the member's opposing surfaces. The temporary support assures effective support for the dry film photoresist used as part of the circuitization process. Thus, the photoresist is capable of being applied in sheetlike form for spanning the relatively small openings of the dielectric without sagging, bowing, etc., which may adversely impact subsequent processing steps. As taught herein, the entire sidewall portions defining the opening previously occupied by the temporary support portion are metallized to provide enhanced electrical characteristics for the finished product.
摘要翻译：制造可用作芯片载体结构的电路化衬底的改进方法。该方法包括提供电介质构件并部分地布置该构件以在其中限定临时支撑部分的步骤。然后可以发生金属化和电路化，随后除去临时支撑部分，然后施加至少一个附加的金属化层，以确保构件相对表面之间的完全导电的开口。临时支撑确保有效地支持用作电路化过程的一部分的干膜光致抗蚀剂。因此，光致抗蚀剂能够以片状形式施加以跨越电介质的相对小的开口而不会下垂，弯曲等，这可能不利地影响随后的处理步骤。如本文所教导的，限定先前由临时支撑部分占据的开口的整个侧壁部分被金属化以提供成品的增强的电特性。

16. 发明授权

US06569604B1 Blind via formation in a photoimageable dielectric material 失效
标题翻译：通过在可光成像的电介质材料中形成盲目
公开(公告)号：US06569604B1
公开(公告)日：2003-05-27
申请号：US09345723
申请日：1999-06-30
申请人： Anilkumar Chinuprasad Bhatt , Francis Joseph Downes, Jr. , Robert Lee Lewis , Voya R. Markovich
发明人： Anilkumar Chinuprasad Bhatt , Francis Joseph Downes, Jr. , Robert Lee Lewis , Voya R. Markovich
IPC分类号： G03C500
CPC分类号： H01L23/49816 , H01L23/49827 , H01L2224/16 , H05K3/0023 , H05K3/0035 , H05K3/4602 , H05K2201/09827 , H05K2203/1476
摘要： A blind via structure, and associated laser ablation methods of formation, that includes a blind via within a photoimageable dielectric (PID) layer on a substrate, such that the sidewall of the blind via makes an obtuse angle with the blind end of the blind via. The obtuse-angled sidewall may be formed by executing two processes in sequence. In the first process, photoimaging of the PID layer, with selective exposure to ultraviolet light, results in one or more blind vias having acute-angled sidewalls. The photoimaging cross links the PID material that had been selectively exposed to ultraviolet light such that a subsequent developing step removes PID material not cross linked, or weakly cross linked, to simultaneously form multiple blind vias having different sized openings. In the second process, laser ablation is selectively employed to remove the acute-angled sidewalls from particular blind vias in a way that forms replacement obtuse-angled sidewalls in the laser-ablated blind vias. Alternatively, the first process involving photoimaging may be omitted such that the second step involving laser ablation forms the entire obtuse-angled blind via. The resultant blind via structure includes at least one blind via having an obtuse-angled sidewall, and optionally, at least one blind via having an acute-angled sidewall.
摘要翻译：盲通孔结构和相关联的激光烧蚀消融方法，其包括在衬底上的可光成像电介质（PID）层内的盲通孔，使得盲通孔的侧壁与盲孔的盲端通过钝角。可以通过依次执行两个过程来形成钝角侧壁。在第一个过程中，通过选择性地暴露在紫外线下的PID层的光成像产生一个或多个具有锐角侧壁的盲孔。光学成像将选择性暴露于紫外线的PID材料交叉连接，使得随后的显影步骤除去未交联或弱交联的PID材料，以同时形成具有不同尺寸开口的多个盲孔。在第二过程中，激光烧蚀被选择性地用于在激光烧蚀的盲孔中形成置换钝角侧壁的方式从特定的盲孔中去除锐角侧壁。或者，可以省略涉及光成像的第一过程，使得涉及激光烧蚀的第二步骤形成整个钝角盲孔。所得到的盲通孔结构包括至少一个具有钝角侧壁的盲孔，并且可选地，至少一个具有锐角侧壁的盲孔。

17. 发明授权

US06110650A Method of making a circuitized substrate 失效
标题翻译：制造电路化基板的方法
公开(公告)号：US06110650A
公开(公告)日：2000-08-29
申请号：US42898
申请日：1998-03-17
申请人： Anilkumar Chinuprasad Bhatt , Thomas Richard Miller , Allen Frederick Moring , James Paul Walsh
发明人： Anilkumar Chinuprasad Bhatt , Thomas Richard Miller , Allen Frederick Moring , James Paul Walsh
IPC分类号： H01L21/48 , H01L23/13 , H01L23/498 , H05K1/02 , H05K1/18 , H05K3/06 , H05K3/10 , H05K3/40 , H05K3/42 , G03F7/00
CPC分类号： H01L23/13 , H01L21/481 , H01L21/486 , H01L23/49805 , H05K3/403 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/01013 , H01L2924/01028 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H05K1/0203 , H05K1/021 , H05K1/182 , H05K2201/09127 , H05K2203/0191 , H05K2203/0264 , H05K3/0061 , H05K3/064 , H05K3/108 , H05K3/427
摘要： A method of making a circuitized substrate wherein a chip-accommodating cavity is formed along with a plurality of conductive elements (e.g., pads, lines, etc.) which form part of the substrate's circuitry. Metallization is facilitated by the use of a photoimageable member that allows for initial removal (peeling) of its sacrificial layer, followed by eventual removal of the photoimaging layer which also forms part of this member. Exposure of the photoimaging layer may occur either through the protective sacrificial layer or subsequent removal thereof.
摘要翻译：一种制造电路化基板的方法，其中与形成基板电路的一部分的多个导电元件（例如，焊盘，线等）一起形成芯片容纳腔。通过使用允许其牺牲层的初始去除（剥离），然后最终去除也成为该部件的一部分的光成像层，可以实现金属化。光成像层的曝光可以通过保护性牺牲层或随后的去除而发生。

18. 发明授权

US06386890B1 Printed circuit board to module mounting and interconnecting structure and method 失效
标题翻译：印刷电路板到模块安装和互连结构和方法
公开(公告)号：US06386890B1
公开(公告)日：2002-05-14
申请号：US09804529
申请日：2001-03-12
申请人： Anilkumar Chinuprasad Bhatt , William Louis Brodsky , Benson Chan
发明人： Anilkumar Chinuprasad Bhatt , William Louis Brodsky , Benson Chan
IPC分类号： G01R1200
CPC分类号： H05K3/325 , H01R12/7047
摘要： The present invention provides a method and structure for connecting a module to a printed circuit board, wherein a substantially rigid interposer having resilient conductors is disposed between a module and a printed circuit board. A clamping means urges the module and printed circuit board toward each other with compressive force upon an interposer positioned therebetween, preferably causing the module and printed circuit board to deform and thereby align their electrical contacts with the surfaces of the interposer. The interposer further comprises a plurality of apertures, each aperture further having a deformable resilient conductor means for connecting a module contact to a PCB contact. The conductor is deformable in shear, which may travel and, therefore, makeup the CTE dimensional mismatch between the module and the PCB. The conductors are detachable, electrically connecting the module and PCB contacts without the requirement of solder or other permanent means.
摘要翻译：本发明提供一种用于将模块连接到印刷电路板的方法和结构，其中具有弹性导体的基本上刚性的插入件设置在模块和印刷电路板之间。夹紧装置通过压缩力将模块和印刷电路板朝向彼此朝向插入器定位在其间的优选地引导模块和印刷电路板变形，从而使它们的电触点与插入器的表面对齐。插入器还包括多个孔，每个孔还具有用于将模块接触件连接到PCB触点的可变形的弹性导体装置。导体可以在剪切中变形，其可以移动，并因此补偿模块和PCB之间的CTE尺寸失配。导体是可拆卸的，电连接模块和PCB触点，而不需要焊料或其他永久手段。

19. 发明授权

US06225028B1 Method of making an enhanced organic chip carrier package 失效
标题翻译：制造增强型有机芯片载体封装的方法
公开(公告)号：US06225028B1
公开(公告)日：2001-05-01
申请号：US09482548
申请日：2000-01-13
申请人： Anilkumar Chinuprasad Bhatt , Thomas Richard Miller , Allen Frederick Moring , James Paul Walsh
发明人： Anilkumar Chinuprasad Bhatt , Thomas Richard Miller , Allen Frederick Moring , James Paul Walsh
IPC分类号： G03F700
CPC分类号： H01L23/13 , H01L21/481 , H01L21/486 , H01L23/49805 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/01013 , H01L2924/01028 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H05K1/0203 , H05K1/021 , H05K1/182 , H05K3/0061 , H05K3/064 , H05K3/108 , H05K3/403 , H05K3/427 , H05K2201/09127 , H05K2203/0191 , H05K2203/0264 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A method of making a circuitized substrate wherein a chip-accommodating cavity is formed along with a plurality of conductive elements (e.g., pads, lines, etc.) which form part of the substrate's circuitry. Metallization is facilitated by the use of a photoimageable member that allows for initial removal (peeling) of its sacrificial layer, followed by eventual removal of the photoimaging layer which also forms part of this member. Exposure of the photoimaging layer may occur either through the protective sacrificial layer or subsequent removal thereof.
摘要翻译：一种制造电路化基板的方法，其中与形成基板电路的一部分的多个导电元件（例如，焊盘，线等）一起形成芯片容纳腔。通过使用允许其牺牲层的初始去除（剥离），然后最终去除也成为该部件的一部分的光成像层，可以实现金属化。光成像层的曝光可以通过保护性牺牲层或随后的去除而发生。

20. 发明授权

US6127097A Photoresist develop and strip solvent compositions and method for their use 失效
标题翻译：光刻胶开发和剥离其使用的溶剂组合物和方法
公开(公告)号：US6127097A
公开(公告)日：2000-10-03
申请号：US819277
申请日：1997-03-18
申请人： Nageshwer Rao Bantu , Anilkumar Chinuprasad Bhatt , Ashwinkumar Chinuprasad Bhatt , Joseph Alphonse Kotylo , Gerald Walter Jones , Robert John Owen , Kostas Papathomas , Anaya Kumar Vardya
发明人： Nageshwer Rao Bantu , Anilkumar Chinuprasad Bhatt , Ashwinkumar Chinuprasad Bhatt , Joseph Alphonse Kotylo , Gerald Walter Jones , Robert John Owen , Kostas Papathomas , Anaya Kumar Vardya
IPC分类号： G03F7/32 , G03F7/42 , H05K3/06
CPC分类号： G03F7/422 , G03F7/325
摘要： Simple, environmentally friendly developers and strippers are disclosed for free radical-initiated, addition polymerizable resists, cationically cured resists and solder masks and photoresists. Both the developers and the strippers include benzyl alcohol, optionally also including a minor amount of methanol, ethanol, isopropyl alcohol, propylene glycol monomethylacetate, ethylene glycol monomethyl ether, formamide, nitromethane, propylene oxide, or methyl ethyl ketone, acetone and water.
摘要翻译：公开了简单的，环保的显影剂和剥离剂，用于自由基引发的可加成聚合的抗蚀剂，阳离子固化的抗蚀剂和焊接掩模和光致抗蚀剂。显影剂和脱模剂都包括苄醇，任选地还包括少量甲醇，乙醇，异丙醇，丙二醇单甲基乙酸酯，乙二醇单甲醚，甲酰胺，硝基甲烷，环氧丙烷或甲基乙基酮，丙酮和水。

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